{"id":"https://openalex.org/W1592541804","doi":"https://doi.org/10.1109/iscas.2003.1206018","title":"A cost-effective 2-D discrete cosine transform processor with reconfigurable datapath","display_name":"A cost-effective 2-D discrete cosine transform processor with reconfigurable datapath","publication_year":2003,"publication_date":"2003-10-15","ids":{"openalex":"https://openalex.org/W1592541804","doi":"https://doi.org/10.1109/iscas.2003.1206018","mag":"1592541804"},"language":"en","primary_location":{"id":"doi:10.1109/iscas.2003.1206018","is_oa":false,"landing_page_url":"https://doi.org/10.1109/iscas.2003.1206018","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"Proceedings of the 2003 International Symposium on Circuits and Systems, 2003. ISCAS '03.","raw_type":"proceedings-article"},"type":"conference-paper","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5008507157","display_name":"Yeong-Kang Lai","orcid":"https://orcid.org/0000-0002-5465-7935"},"institutions":[{"id":"https://openalex.org/I162838928","display_name":"National Chung Hsing University","ror":"https://ror.org/05vn3ca78","country_code":"TW","type":"education","lineage":["https://openalex.org/I162838928"]}],"countries":["TW"],"is_corresponding":false,"raw_author_name":"Yeong-Kang Lai","raw_affiliation_strings":["Department of Electrical Engineering, National Chung Hsing University, Taiwan","Dept. of Electr. Eng., National Chung Hsing Univ., Taichung, Taiwan"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Department of Electrical Engineering, National Chung Hsing University, Taiwan","institution_ids":["https://openalex.org/I162838928"]},{"raw_affiliation_string":"Dept. of Electr. Eng., National Chung Hsing Univ., Taichung, Taiwan","institution_ids":["https://openalex.org/I162838928"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5103358764","display_name":"Han-Jen Hsu","orcid":null},"institutions":[{"id":"https://openalex.org/I162838928","display_name":"National Chung Hsing University","ror":"https://ror.org/05vn3ca78","country_code":"TW","type":"education","lineage":["https://openalex.org/I162838928"]}],"countries":["TW"],"is_corresponding":false,"raw_author_name":"Han-Jen Hsu","raw_affiliation_strings":["Department of Electrical Engineering, National Chung Hsing University, Taiwan","Dept. of Electr. Eng., National Chung Hsing Univ., Taichung, Taiwan"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Department of Electrical Engineering, National Chung Hsing University, Taiwan","institution_ids":["https://openalex.org/I162838928"]},{"raw_affiliation_string":"Dept. of Electr. Eng., National Chung Hsing Univ., Taichung, Taiwan","institution_ids":["https://openalex.org/I162838928"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":1,"corresponding_author_ids":[],"corresponding_institution_ids":["https://openalex.org/I162838928"],"apc_list":null,"apc_paid":null,"fwci":1.8015,"has_fulltext":false,"cited_by_count":5,"citation_normalized_percentile":{"value":0.83147436,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":{"min":90,"max":94},"biblio":{"volume":"2","issue":null,"first_page":"II","last_page":"492"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10323","display_name":"Analog and Mixed-Signal Circuit Design","score":0.9991999864578247,"subfield":{"id":"https://openalex.org/subfields/2204","display_name":"Biomedical Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10323","display_name":"Analog and Mixed-Signal Circuit Design","score":0.9991999864578247,"subfield":{"id":"https://openalex.org/subfields/2204","display_name":"Biomedical Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11034","display_name":"Digital Filter Design and Implementation","score":0.9990000128746033,"subfield":{"id":"https://openalex.org/subfields/1711","display_name":"Signal Processing"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11417","display_name":"Advancements in PLL and VCO Technologies","score":0.9958000183105469,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/datapath","display_name":"Datapath","score":0.971442461013794},{"id":"https://openalex.org/keywords/discrete-cosine-transform","display_name":"Discrete cosine transform","score":0.8059333562850952},{"id":"https://openalex.org/keywords/very-large-scale-integration","display_name":"Very-large-scale integration","score":0.701793909072876},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.6760568618774414},{"id":"https://openalex.org/keywords/multiplexer","display_name":"Multiplexer","score":0.6662747859954834},{"id":"https://openalex.org/keywords/cmos","display_name":"CMOS","score":0.5432078242301941},{"id":"https://openalex.org/keywords/parallel-computing","display_name":"Parallel computing","score":0.45999109745025635},{"id":"https://openalex.org/keywords/transform-coding","display_name":"Transform coding","score":0.4590119421482086},{"id":"https://openalex.org/keywords/computer-architecture","display_name":"Computer architecture","score":0.4412979483604431},{"id":"https://openalex.org/keywords/computer-hardware","display_name":"Computer hardware","score":0.4348289966583252},{"id":"https://openalex.org/keywords/embedded-system","display_name":"Embedded system","score":0.41333261132240295},{"id":"https://openalex.org/keywords/electronic-engineering","display_name":"Electronic engineering","score":0.33716773986816406},{"id":"https://openalex.org/keywords/multiplexing","display_name":"Multiplexing","score":0.22098535299301147},{"id":"https://openalex.org/keywords/engineering","display_name":"Engineering","score":0.12892329692840576},{"id":"https://openalex.org/keywords/telecommunications","display_name":"Telecommunications","score":0.0767238438129425},{"id":"https://openalex.org/keywords/artificial-intelligence","display_name":"Artificial intelligence","score":0.0735761821269989}],"concepts":[{"id":"https://openalex.org/C2781198647","wikidata":"https://www.wikidata.org/wiki/Q1633673","display_name":"Datapath","level":2,"score":0.971442461013794},{"id":"https://openalex.org/C2221639","wikidata":"https://www.wikidata.org/wiki/Q2877","display_name":"Discrete cosine transform","level":3,"score":0.8059333562850952},{"id":"https://openalex.org/C14580979","wikidata":"https://www.wikidata.org/wiki/Q876049","display_name":"Very-large-scale integration","level":2,"score":0.701793909072876},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.6760568618774414},{"id":"https://openalex.org/C70970002","wikidata":"https://www.wikidata.org/wiki/Q189434","display_name":"Multiplexer","level":3,"score":0.6662747859954834},{"id":"https://openalex.org/C46362747","wikidata":"https://www.wikidata.org/wiki/Q173431","display_name":"CMOS","level":2,"score":0.5432078242301941},{"id":"https://openalex.org/C173608175","wikidata":"https://www.wikidata.org/wiki/Q232661","display_name":"Parallel computing","level":1,"score":0.45999109745025635},{"id":"https://openalex.org/C169805256","wikidata":"https://www.wikidata.org/wiki/Q1361381","display_name":"Transform coding","level":4,"score":0.4590119421482086},{"id":"https://openalex.org/C118524514","wikidata":"https://www.wikidata.org/wiki/Q173212","display_name":"Computer architecture","level":1,"score":0.4412979483604431},{"id":"https://openalex.org/C9390403","wikidata":"https://www.wikidata.org/wiki/Q3966","display_name":"Computer hardware","level":1,"score":0.4348289966583252},{"id":"https://openalex.org/C149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","level":1,"score":0.41333261132240295},{"id":"https://openalex.org/C24326235","wikidata":"https://www.wikidata.org/wiki/Q126095","display_name":"Electronic engineering","level":1,"score":0.33716773986816406},{"id":"https://openalex.org/C19275194","wikidata":"https://www.wikidata.org/wiki/Q222903","display_name":"Multiplexing","level":2,"score":0.22098535299301147},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.12892329692840576},{"id":"https://openalex.org/C76155785","wikidata":"https://www.wikidata.org/wiki/Q418","display_name":"Telecommunications","level":1,"score":0.0767238438129425},{"id":"https://openalex.org/C154945302","wikidata":"https://www.wikidata.org/wiki/Q11660","display_name":"Artificial intelligence","level":1,"score":0.0735761821269989},{"id":"https://openalex.org/C115961682","wikidata":"https://www.wikidata.org/wiki/Q860623","display_name":"Image (mathematics)","level":2,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/iscas.2003.1206018","is_oa":false,"landing_page_url":"https://doi.org/10.1109/iscas.2003.1206018","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"Proceedings of the 2003 International Symposium on Circuits and Systems, 2003. ISCAS '03.","raw_type":"proceedings-article"}],"best_oa_location":null,"sustainable_development_goals":[{"id":"https://metadata.un.org/sdg/7","score":0.6299999952316284,"display_name":"Affordable and clean energy"}],"awards":[],"funders":[],"has_content":{"grobid_xml":false,"pdf":false},"content_urls":null,"referenced_works_count":12,"referenced_works":["https://openalex.org/W1492910281","https://openalex.org/W1561725608","https://openalex.org/W2019558918","https://openalex.org/W2100177142","https://openalex.org/W2108791478","https://openalex.org/W2117758050","https://openalex.org/W2133875196","https://openalex.org/W2150576912","https://openalex.org/W2161005890","https://openalex.org/W2167942214","https://openalex.org/W6677591943","https://openalex.org/W6683403973"],"related_works":["https://openalex.org/W2534955606","https://openalex.org/W2022568231","https://openalex.org/W2094583657","https://openalex.org/W1594300462","https://openalex.org/W2158009109","https://openalex.org/W1606460848","https://openalex.org/W1706111048","https://openalex.org/W2115252864","https://openalex.org/W2129927873","https://openalex.org/W2112852877"],"abstract_inverted_index":{"In":[0],"this":[1],"paper,":[2],"a":[3,11],"cost-effective":[4],"2D":[5,47],"discrete":[6],"cosine":[7],"transform":[8],"processor":[9,27,49],"using":[10,60],"reconfigurable":[12],"datapath":[13],"is":[14,40],"described.":[15],"The":[16,45],"proposed":[17,38,46],"architecture":[18,39],"uses":[19],"some":[20],"multiplexers":[21],"to":[22],"reduce":[23],"computational":[24],"complexity.":[25],"This":[26],"operates":[28],"on":[29],"8/spl":[30],"times/8":[31],"blocks.":[32],"Unlike":[33],"other":[34],"direct":[35],"methods,":[36],"the":[37],"regular":[41],"for":[42],"VLSI":[43],"implementation.":[44],"DCT":[48],"costs":[50],"38598":[51],"transistors,":[52],"with":[53],"an":[54],"operating":[55],"frequency":[56],"of":[57],"100":[58],"MHz,":[59],"0.35":[61],"/spl":[62],"mu/m":[63],"CMOS":[64],"technology.":[65]},"counts_by_year":[{"year":2019,"cited_by_count":1}],"updated_date":"2026-07-29T14:22:42.915294","created_date":"2025-10-10T00:00:00"}
