{"id":"https://openalex.org/W1528897842","doi":"https://doi.org/10.1109/iscas.2003.1205790","title":"GDFT types mapping algorithms and structured regular FPGA implementation","display_name":"GDFT types mapping algorithms and structured regular FPGA implementation","publication_year":2003,"publication_date":"2003-11-04","ids":{"openalex":"https://openalex.org/W1528897842","doi":"https://doi.org/10.1109/iscas.2003.1205790","mag":"1528897842"},"language":"en","primary_location":{"id":"doi:10.1109/iscas.2003.1205790","is_oa":false,"landing_page_url":"https://doi.org/10.1109/iscas.2003.1205790","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"Proceedings of the 2003 International Symposium on Circuits and Systems, 2003. ISCAS '03.","raw_type":"proceedings-article"},"type":"conference-paper","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5000734505","display_name":"H. I. Saleh","orcid":"https://orcid.org/0000-0001-5395-2214"},"institutions":[],"countries":[],"is_corresponding":false,"raw_author_name":"H.I. Saleh","raw_affiliation_strings":["AEA, NCRRT, Cairo, Egypt","[AEA, NCRRT, Cairo, Egypt]"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"AEA, NCRRT, Cairo, Egypt","institution_ids":[]},{"raw_affiliation_string":"[AEA, NCRRT, Cairo, Egypt]","institution_ids":[]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5113787855","display_name":"M. Ashour","orcid":null},"institutions":[],"countries":[],"is_corresponding":false,"raw_author_name":"M.A. Ashour","raw_affiliation_strings":["AEA, NCRRT, Cairo, Egypt","[AEA, NCRRT, Cairo, Egypt]"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"AEA, NCRRT, Cairo, Egypt","institution_ids":[]},{"raw_affiliation_string":"[AEA, NCRRT, Cairo, Egypt]","institution_ids":[]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5102509421","display_name":"A.E. Salama","orcid":null},"institutions":[{"id":"https://openalex.org/I145487455","display_name":"Cairo University","ror":"https://ror.org/03q21mh05","country_code":"EG","type":"education","lineage":["https://openalex.org/I145487455"]}],"countries":["EG"],"is_corresponding":false,"raw_author_name":"A.E. Salama","raw_affiliation_strings":["Faculty of Engineering, Cairo University, Giza, Egypt"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Faculty of Engineering, Cairo University, Giza, Egypt","institution_ids":["https://openalex.org/I145487455"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":1,"corresponding_author_ids":[],"corresponding_institution_ids":[],"apc_list":null,"apc_paid":null,"fwci":0.0,"has_fulltext":false,"cited_by_count":0,"citation_normalized_percentile":{"value":0.04660951,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":null,"biblio":{"volume":"4","issue":null,"first_page":"IV","last_page":"129"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T11034","display_name":"Digital Filter Design and Implementation","score":0.9998999834060669,"subfield":{"id":"https://openalex.org/subfields/1711","display_name":"Signal Processing"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T11034","display_name":"Digital Filter Design and Implementation","score":0.9998999834060669,"subfield":{"id":"https://openalex.org/subfields/1711","display_name":"Signal Processing"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11697","display_name":"Numerical Methods and Algorithms","score":0.9997000098228455,"subfield":{"id":"https://openalex.org/subfields/1703","display_name":"Computational Theory and Mathematics"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11417","display_name":"Advancements in PLL and VCO Technologies","score":0.9976000189781189,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/twiddle-factor","display_name":"Twiddle factor","score":0.8924323320388794},{"id":"https://openalex.org/keywords/field-programmable-gate-array","display_name":"Field-programmable gate array","score":0.8517962694168091},{"id":"https://openalex.org/keywords/fast-fourier-transform","display_name":"Fast Fourier transform","score":0.7934319972991943},{"id":"https://openalex.org/keywords/algorithm","display_name":"Algorithm","score":0.6890712976455688},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.6190622448921204},{"id":"https://openalex.org/keywords/realization","display_name":"Realization (probability)","score":0.4953657388687134},{"id":"https://openalex.org/keywords/gate-array","display_name":"Gate array","score":0.48804178833961487},{"id":"https://openalex.org/keywords/permutation","display_name":"Permutation (music)","score":0.4840673506259918},{"id":"https://openalex.org/keywords/multiplicative-inverse","display_name":"Multiplicative inverse","score":0.46934735774993896},{"id":"https://openalex.org/keywords/point","display_name":"Point (geometry)","score":0.44469499588012695},{"id":"https://openalex.org/keywords/prime-factor-fft-algorithm","display_name":"Prime-factor FFT algorithm","score":0.4257010519504547},{"id":"https://openalex.org/keywords/parallel-computing","display_name":"Parallel computing","score":0.3446967601776123},{"id":"https://openalex.org/keywords/inverse","display_name":"Inverse","score":0.26478350162506104},{"id":"https://openalex.org/keywords/mathematics","display_name":"Mathematics","score":0.21749070286750793},{"id":"https://openalex.org/keywords/computer-hardware","display_name":"Computer hardware","score":0.20817846059799194},{"id":"https://openalex.org/keywords/fourier-transform","display_name":"Fourier transform","score":0.19774264097213745},{"id":"https://openalex.org/keywords/fourier-analysis","display_name":"Fourier analysis","score":0.09880831837654114},{"id":"https://openalex.org/keywords/fractional-fourier-transform","display_name":"Fractional Fourier transform","score":0.09522360563278198}],"concepts":[{"id":"https://openalex.org/C4697666","wikidata":"https://www.wikidata.org/wiki/Q7857913","display_name":"Twiddle factor","level":5,"score":0.8924323320388794},{"id":"https://openalex.org/C42935608","wikidata":"https://www.wikidata.org/wiki/Q190411","display_name":"Field-programmable gate array","level":2,"score":0.8517962694168091},{"id":"https://openalex.org/C75172450","wikidata":"https://www.wikidata.org/wiki/Q623950","display_name":"Fast Fourier transform","level":2,"score":0.7934319972991943},{"id":"https://openalex.org/C11413529","wikidata":"https://www.wikidata.org/wiki/Q8366","display_name":"Algorithm","level":1,"score":0.6890712976455688},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.6190622448921204},{"id":"https://openalex.org/C2781089630","wikidata":"https://www.wikidata.org/wiki/Q21856745","display_name":"Realization (probability)","level":2,"score":0.4953657388687134},{"id":"https://openalex.org/C114237110","wikidata":"https://www.wikidata.org/wiki/Q114901","display_name":"Gate array","level":3,"score":0.48804178833961487},{"id":"https://openalex.org/C21308566","wikidata":"https://www.wikidata.org/wiki/Q7169365","display_name":"Permutation (music)","level":2,"score":0.4840673506259918},{"id":"https://openalex.org/C157351203","wikidata":"https://www.wikidata.org/wiki/Q216906","display_name":"Multiplicative inverse","level":3,"score":0.46934735774993896},{"id":"https://openalex.org/C28719098","wikidata":"https://www.wikidata.org/wiki/Q44946","display_name":"Point (geometry)","level":2,"score":0.44469499588012695},{"id":"https://openalex.org/C77928272","wikidata":"https://www.wikidata.org/wiki/Q7243214","display_name":"Prime-factor FFT algorithm","level":5,"score":0.4257010519504547},{"id":"https://openalex.org/C173608175","wikidata":"https://www.wikidata.org/wiki/Q232661","display_name":"Parallel computing","level":1,"score":0.3446967601776123},{"id":"https://openalex.org/C207467116","wikidata":"https://www.wikidata.org/wiki/Q4385666","display_name":"Inverse","level":2,"score":0.26478350162506104},{"id":"https://openalex.org/C33923547","wikidata":"https://www.wikidata.org/wiki/Q395","display_name":"Mathematics","level":0,"score":0.21749070286750793},{"id":"https://openalex.org/C9390403","wikidata":"https://www.wikidata.org/wiki/Q3966","display_name":"Computer hardware","level":1,"score":0.20817846059799194},{"id":"https://openalex.org/C102519508","wikidata":"https://www.wikidata.org/wiki/Q6520159","display_name":"Fourier transform","level":2,"score":0.19774264097213745},{"id":"https://openalex.org/C203024314","wikidata":"https://www.wikidata.org/wiki/Q1365258","display_name":"Fourier analysis","level":3,"score":0.09880831837654114},{"id":"https://openalex.org/C76563020","wikidata":"https://www.wikidata.org/wiki/Q4817582","display_name":"Fractional Fourier transform","level":4,"score":0.09522360563278198},{"id":"https://openalex.org/C166386157","wikidata":"https://www.wikidata.org/wiki/Q1477735","display_name":"Short-time Fourier transform","level":4,"score":0.0},{"id":"https://openalex.org/C121332964","wikidata":"https://www.wikidata.org/wiki/Q413","display_name":"Physics","level":0,"score":0.0},{"id":"https://openalex.org/C105795698","wikidata":"https://www.wikidata.org/wiki/Q12483","display_name":"Statistics","level":1,"score":0.0},{"id":"https://openalex.org/C2524010","wikidata":"https://www.wikidata.org/wiki/Q8087","display_name":"Geometry","level":1,"score":0.0},{"id":"https://openalex.org/C134306372","wikidata":"https://www.wikidata.org/wiki/Q7754","display_name":"Mathematical analysis","level":1,"score":0.0},{"id":"https://openalex.org/C24890656","wikidata":"https://www.wikidata.org/wiki/Q82811","display_name":"Acoustics","level":1,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/iscas.2003.1205790","is_oa":false,"landing_page_url":"https://doi.org/10.1109/iscas.2003.1205790","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"Proceedings of the 2003 International Symposium on Circuits and Systems, 2003. ISCAS '03.","raw_type":"proceedings-article"}],"best_oa_location":null,"sustainable_development_goals":[],"awards":[],"funders":[],"has_content":{"pdf":false,"grobid_xml":false},"content_urls":null,"referenced_works_count":11,"referenced_works":["https://openalex.org/W1515014773","https://openalex.org/W1905108610","https://openalex.org/W1973109866","https://openalex.org/W1977842954","https://openalex.org/W2019264751","https://openalex.org/W2029769546","https://openalex.org/W2056180735","https://openalex.org/W2061171222","https://openalex.org/W2086393337","https://openalex.org/W2126172705","https://openalex.org/W2160415569"],"related_works":["https://openalex.org/W1984254719","https://openalex.org/W2031343199","https://openalex.org/W2149121524","https://openalex.org/W4229456379","https://openalex.org/W2017578039","https://openalex.org/W2958343630","https://openalex.org/W2151986570","https://openalex.org/W4255785774","https://openalex.org/W2351401773","https://openalex.org/W2371538653"],"abstract_inverted_index":{"In":[0],"this":[1],"paper,":[2],"regular":[3,27,38],"and":[4,28,85],"non-multiplicative":[5],"mapping":[6,21,64],"algorithms":[7,22,102],"between":[8],"different":[9],"types":[10],"of":[11,53,57],"Generalized":[12],"Discrete":[13],"Fourier":[14],"Transform":[15],"(GDFT)":[16],"are":[17,23,98],"proposed.":[18],"The":[19],"proposed":[20,63,101],"used":[24],"to":[25],"build":[26],"real":[29,67],"twiddle":[30,68,74],"factors":[31,69,75],"FFT":[32,78],"algorithms.":[33],"It":[34],"presents":[35],"a":[36,104],"mote":[37],"FIT":[39],"than":[40,72],"the":[41,62,108],"recently":[42],"presented":[43],"GDFT":[44],"type-1,":[45],"which":[46],"in":[47,76,82,107],"addition":[48],"requires":[49],"log":[50],"(N/2)":[51],"stages":[52],"permutation.":[54],"Hardware":[55],"realization":[56],"16-point":[58],"FFT,":[59],"based":[60],"on":[61],"algorithms,":[65,79],"with":[66,95],"butterfly":[70],"rather":[71],"complex":[73],"traditional":[77],"is":[80],"implemented":[81],"Xilinx":[83],"XC4000":[84],"Vertix":[86],"series":[87],"Field":[88],"Programmable":[89],"Gate":[90],"Array":[91],"(FPGA).":[92],"Cost":[93],"comparisons":[94],"alternative":[96],"approaches":[97],"presented.":[99],"Our":[100],"achieve":[103],"significant":[105],"improvement":[106],"FPGA-based":[109],"designs.":[110]},"counts_by_year":[],"updated_date":"2026-07-29T14:22:42.915294","created_date":"2025-10-10T00:00:00"}