{"id":"https://openalex.org/W1518057417","doi":"https://doi.org/10.1109/iscas.2003.1205067","title":"A 32 \u00d7 32 cellular test chip targeting new functionalities","display_name":"A 32 \u00d7 32 cellular test chip targeting new functionalities","publication_year":2003,"publication_date":"2003-11-21","ids":{"openalex":"https://openalex.org/W1518057417","doi":"https://doi.org/10.1109/iscas.2003.1205067","mag":"1518057417"},"language":"en","primary_location":{"id":"doi:10.1109/iscas.2003.1205067","is_oa":false,"landing_page_url":"https://doi.org/10.1109/iscas.2003.1205067","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"Proceedings of the 2003 International Symposium on Circuits and Systems, 2003. ISCAS '03.","raw_type":"proceedings-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5038944203","display_name":"A. Paasio","orcid":"https://orcid.org/0000-0003-2543-7391"},"institutions":[{"id":"https://openalex.org/I155660961","display_name":"University of Turku","ror":"https://ror.org/05vghhr25","country_code":"FI","type":"education","lineage":["https://openalex.org/I155660961"]}],"countries":["FI"],"is_corresponding":true,"raw_author_name":"A. Paasio","raw_affiliation_strings":["Electronic Circuit Design Laboratory, Helsinki University of Technology, Espoo, Finland","Laboratory of Electronics and Communication Systems, University of Turku, Finland"],"affiliations":[{"raw_affiliation_string":"Electronic Circuit Design Laboratory, Helsinki University of Technology, Espoo, Finland","institution_ids":[]},{"raw_affiliation_string":"Laboratory of Electronics and Communication Systems, University of Turku, Finland","institution_ids":["https://openalex.org/I155660961"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5052855358","display_name":"Mika Laiho","orcid":"https://orcid.org/0000-0002-3794-0800"},"institutions":[],"countries":[],"is_corresponding":false,"raw_author_name":"M. Laiho","raw_affiliation_strings":["Electronic Circuit Design Laboratory, Helsinki University of Technology, Espoo, Finland"],"affiliations":[{"raw_affiliation_string":"Electronic Circuit Design Laboratory, Helsinki University of Technology, Espoo, Finland","institution_ids":[]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5077812866","display_name":"A. Kananen","orcid":null},"institutions":[],"countries":[],"is_corresponding":false,"raw_author_name":"A. Kananen","raw_affiliation_strings":["Electronic Circuit Design Laboratory, Helsinki University of Technology, Espoo, Finland"],"affiliations":[{"raw_affiliation_string":"Electronic Circuit Design Laboratory, Helsinki University of Technology, Espoo, Finland","institution_ids":[]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5066316803","display_name":"K. Halonen","orcid":"https://orcid.org/0000-0002-4385-9689"},"institutions":[],"countries":[],"is_corresponding":false,"raw_author_name":"K. Halonen","raw_affiliation_strings":["Electronic Circuit Design Laboratory, Helsinki University of Technology, Espoo, Finland"],"affiliations":[{"raw_affiliation_string":"Electronic Circuit Design Laboratory, Helsinki University of Technology, Espoo, Finland","institution_ids":[]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5068173798","display_name":"Jussi Poikonen","orcid":null},"institutions":[{"id":"https://openalex.org/I155660961","display_name":"University of Turku","ror":"https://ror.org/05vghhr25","country_code":"FI","type":"education","lineage":["https://openalex.org/I155660961"]}],"countries":["FI"],"is_corresponding":false,"raw_author_name":"J. Poikonen","raw_affiliation_strings":["Laboratory of Electronics and Communication Systems, University of Turku, Finland"],"affiliations":[{"raw_affiliation_string":"Laboratory of Electronics and Communication Systems, University of Turku, Finland","institution_ids":["https://openalex.org/I155660961"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":5,"corresponding_author_ids":["https://openalex.org/A5038944203"],"corresponding_institution_ids":["https://openalex.org/I155660961"],"apc_list":null,"apc_paid":null,"fwci":1.1804,"has_fulltext":false,"cited_by_count":5,"citation_normalized_percentile":{"value":0.82672659,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":null,"biblio":{"volume":"3","issue":null,"first_page":"III","last_page":"506"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T11347","display_name":"Neural Networks Stability and Synchronization","score":0.9997000098228455,"subfield":{"id":"https://openalex.org/subfields/1705","display_name":"Computer Networks and Communications"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T11347","display_name":"Neural Networks Stability and Synchronization","score":0.9997000098228455,"subfield":{"id":"https://openalex.org/subfields/1705","display_name":"Computer Networks and Communications"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10502","display_name":"Advanced Memory and Neural Computing","score":0.9973999857902527,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10323","display_name":"Analog and Mixed-Signal Circuit Design","score":0.9943000078201294,"subfield":{"id":"https://openalex.org/subfields/2204","display_name":"Biomedical Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.6818968057632446},{"id":"https://openalex.org/keywords/analog-computer","display_name":"Analog computer","score":0.6657643914222717},{"id":"https://openalex.org/keywords/chip","display_name":"Chip","score":0.6257523894309998},{"id":"https://openalex.org/keywords/massively-parallel","display_name":"Massively parallel","score":0.6233943104743958},{"id":"https://openalex.org/keywords/microprocessor","display_name":"Microprocessor","score":0.5864176154136658},{"id":"https://openalex.org/keywords/converters","display_name":"Converters","score":0.4667902886867523},{"id":"https://openalex.org/keywords/computer-architecture","display_name":"Computer architecture","score":0.45561158657073975},{"id":"https://openalex.org/keywords/computer-hardware","display_name":"Computer hardware","score":0.43687963485717773},{"id":"https://openalex.org/keywords/hybrid-computer","display_name":"Hybrid computer","score":0.4226672947406769},{"id":"https://openalex.org/keywords/embedded-system","display_name":"Embedded system","score":0.41285213828086853},{"id":"https://openalex.org/keywords/parallel-computing","display_name":"Parallel computing","score":0.29810553789138794},{"id":"https://openalex.org/keywords/engineering","display_name":"Engineering","score":0.16510117053985596},{"id":"https://openalex.org/keywords/electrical-engineering","display_name":"Electrical engineering","score":0.13054734468460083},{"id":"https://openalex.org/keywords/telecommunications","display_name":"Telecommunications","score":0.10475832223892212},{"id":"https://openalex.org/keywords/operating-system","display_name":"Operating system","score":0.09680888056755066},{"id":"https://openalex.org/keywords/voltage","display_name":"Voltage","score":0.0731610655784607}],"concepts":[{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.6818968057632446},{"id":"https://openalex.org/C90915687","wikidata":"https://www.wikidata.org/wiki/Q63759","display_name":"Analog computer","level":2,"score":0.6657643914222717},{"id":"https://openalex.org/C165005293","wikidata":"https://www.wikidata.org/wiki/Q1074500","display_name":"Chip","level":2,"score":0.6257523894309998},{"id":"https://openalex.org/C190475519","wikidata":"https://www.wikidata.org/wiki/Q544384","display_name":"Massively parallel","level":2,"score":0.6233943104743958},{"id":"https://openalex.org/C2780728072","wikidata":"https://www.wikidata.org/wiki/Q5297","display_name":"Microprocessor","level":2,"score":0.5864176154136658},{"id":"https://openalex.org/C2778422915","wikidata":"https://www.wikidata.org/wiki/Q10302051","display_name":"Converters","level":3,"score":0.4667902886867523},{"id":"https://openalex.org/C118524514","wikidata":"https://www.wikidata.org/wiki/Q173212","display_name":"Computer architecture","level":1,"score":0.45561158657073975},{"id":"https://openalex.org/C9390403","wikidata":"https://www.wikidata.org/wiki/Q3966","display_name":"Computer hardware","level":1,"score":0.43687963485717773},{"id":"https://openalex.org/C18789546","wikidata":"https://www.wikidata.org/wiki/Q1341206","display_name":"Hybrid computer","level":2,"score":0.4226672947406769},{"id":"https://openalex.org/C149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","level":1,"score":0.41285213828086853},{"id":"https://openalex.org/C173608175","wikidata":"https://www.wikidata.org/wiki/Q232661","display_name":"Parallel computing","level":1,"score":0.29810553789138794},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.16510117053985596},{"id":"https://openalex.org/C119599485","wikidata":"https://www.wikidata.org/wiki/Q43035","display_name":"Electrical engineering","level":1,"score":0.13054734468460083},{"id":"https://openalex.org/C76155785","wikidata":"https://www.wikidata.org/wiki/Q418","display_name":"Telecommunications","level":1,"score":0.10475832223892212},{"id":"https://openalex.org/C111919701","wikidata":"https://www.wikidata.org/wiki/Q9135","display_name":"Operating system","level":1,"score":0.09680888056755066},{"id":"https://openalex.org/C165801399","wikidata":"https://www.wikidata.org/wiki/Q25428","display_name":"Voltage","level":2,"score":0.0731610655784607}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/iscas.2003.1205067","is_oa":false,"landing_page_url":"https://doi.org/10.1109/iscas.2003.1205067","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"Proceedings of the 2003 International Symposium on Circuits and Systems, 2003. ISCAS '03.","raw_type":"proceedings-article"}],"best_oa_location":null,"sustainable_development_goals":[{"display_name":"Affordable and clean energy","score":0.5,"id":"https://metadata.un.org/sdg/7"}],"awards":[],"funders":[],"has_content":{"grobid_xml":false,"pdf":false},"content_urls":null,"referenced_works_count":21,"referenced_works":["https://openalex.org/W1479963575","https://openalex.org/W1499250693","https://openalex.org/W1518213859","https://openalex.org/W1561417609","https://openalex.org/W1823480186","https://openalex.org/W1969544220","https://openalex.org/W2000906384","https://openalex.org/W2104839467","https://openalex.org/W2114650652","https://openalex.org/W2116173532","https://openalex.org/W2130416988","https://openalex.org/W2155007720","https://openalex.org/W2170348785","https://openalex.org/W2311776885","https://openalex.org/W2611660823","https://openalex.org/W4252977769","https://openalex.org/W6628855273","https://openalex.org/W6629827740","https://openalex.org/W6677289950","https://openalex.org/W6737289691","https://openalex.org/W7018489537"],"related_works":["https://openalex.org/W2320813363","https://openalex.org/W2108147958","https://openalex.org/W2569822091","https://openalex.org/W2109909498","https://openalex.org/W2138949813","https://openalex.org/W2054763705","https://openalex.org/W1493200273","https://openalex.org/W1524344239","https://openalex.org/W2982554291","https://openalex.org/W48639756"],"abstract_inverted_index":{"In":[0],"this":[1],"paper":[2],"the":[3,48,71,77],"design":[4,30,74],"of":[5,20,34,62,79],"a":[6,32,56,60],"cellular":[7,35],"computer":[8],"with":[9,59],"32/spl":[10,63,72],"times/32":[11,64,73],"cells":[12],"is":[13,31],"discussed":[14],"by":[15],"referencing":[16],"to":[17,54,75],"different":[18],"points":[19],"alternatives":[21],"for":[22,47,103],"realizing":[23],"massively":[24],"parallel":[25],"analogue":[26],"processor":[27],"arrays.":[28],"The":[29],"combination":[33],"nonlinear":[36],"network":[37],"type":[38],"computing":[39,83],"and":[40,89],"an":[41],"analog":[42,86,90,104],"microprocessor.":[43],"Motivations":[44],"are":[45,52,68,96,106],"given":[46],"selected":[49],"solutions":[50,67,102],"that":[51],"used":[53,69],"implement":[55],"test":[57],"chip":[58],"resolution":[61],"cells.":[65],"Digital":[66],"in":[70,82,98],"mitigate":[76],"effect":[78],"traditional":[80],"bottlenecks":[81],"speed,":[84],"namely":[85],"weight":[87],"programming":[88],"I/O.":[91],"Furthermore,":[92],"as":[93],"A/D/A":[94],"converters":[95],"included":[97],"each":[99],"cell,":[100],"alternative":[101],"storage":[105],"highlighted.":[107]},"counts_by_year":[],"updated_date":"2025-11-06T03:46:38.306776","created_date":"2025-10-10T00:00:00"}
