{"id":"https://openalex.org/W2148976901","doi":"https://doi.org/10.1109/iscas.2002.1010645","title":"Static timing analysis based circuit-limited-yield estimation","display_name":"Static timing analysis based circuit-limited-yield estimation","publication_year":2003,"publication_date":"2003-06-25","ids":{"openalex":"https://openalex.org/W2148976901","doi":"https://doi.org/10.1109/iscas.2002.1010645","mag":"2148976901"},"language":"en","primary_location":{"id":"doi:10.1109/iscas.2002.1010645","is_oa":false,"landing_page_url":"https://doi.org/10.1109/iscas.2002.1010645","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2002 IEEE International Symposium on Circuits and Systems. Proceedings (Cat. No.02CH37353)","raw_type":"proceedings-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5026865205","display_name":"Anne Gattiker","orcid":null},"institutions":[{"id":"https://openalex.org/I4210156936","display_name":"IBM Research - Austin","ror":"https://ror.org/05gjbbg60","country_code":"US","type":"facility","lineage":["https://openalex.org/I1341412227","https://openalex.org/I4210114115","https://openalex.org/I4210156936"]}],"countries":["US"],"is_corresponding":true,"raw_author_name":"A. Gattiker","raw_affiliation_strings":["IBM Austin Research Laboratory, USA"],"affiliations":[{"raw_affiliation_string":"IBM Austin Research Laboratory, USA","institution_ids":["https://openalex.org/I4210156936"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5046886936","display_name":"Sani Nassif","orcid":"https://orcid.org/0000-0002-5096-4794"},"institutions":[{"id":"https://openalex.org/I4210156936","display_name":"IBM Research - Austin","ror":"https://ror.org/05gjbbg60","country_code":"US","type":"facility","lineage":["https://openalex.org/I1341412227","https://openalex.org/I4210114115","https://openalex.org/I4210156936"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"S. Nassif","raw_affiliation_strings":["IBM Austin Research Laboratory, USA"],"affiliations":[{"raw_affiliation_string":"IBM Austin Research Laboratory, USA","institution_ids":["https://openalex.org/I4210156936"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5028005463","display_name":"R. Dinakar","orcid":null},"institutions":[],"countries":[],"is_corresponding":false,"raw_author_name":"R. Dinakar","raw_affiliation_strings":["IBM Microelectronics, USA"],"affiliations":[{"raw_affiliation_string":"IBM Microelectronics, USA","institution_ids":[]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5000341207","display_name":"Cheng Long","orcid":null},"institutions":[],"countries":[],"is_corresponding":false,"raw_author_name":"C. Long","raw_affiliation_strings":["IBM Microelectronics, USA"],"affiliations":[{"raw_affiliation_string":"IBM Microelectronics, USA","institution_ids":[]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":4,"corresponding_author_ids":["https://openalex.org/A5026865205"],"corresponding_institution_ids":["https://openalex.org/I4210156936"],"apc_list":null,"apc_paid":null,"fwci":2.782,"has_fulltext":false,"cited_by_count":13,"citation_normalized_percentile":{"value":0.90763022,"is_in_top_1_percent":false,"is_in_top_10_percent":true},"cited_by_percentile_year":null,"biblio":{"volume":"5","issue":null,"first_page":"V","last_page":"81"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10363","display_name":"Low-power high-performance VLSI design","score":0.9998000264167786,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10363","display_name":"Low-power high-performance VLSI design","score":0.9998000264167786,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11032","display_name":"VLSI and Analog Circuit Testing","score":0.9998000264167786,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11522","display_name":"VLSI and FPGA Design Techniques","score":0.9997000098228455,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/powerpc","display_name":"PowerPC","score":0.7878748178482056},{"id":"https://openalex.org/keywords/static-timing-analysis","display_name":"Static timing analysis","score":0.669776439666748},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.6631084084510803},{"id":"https://openalex.org/keywords/parametric-statistics","display_name":"Parametric statistics","score":0.6544402241706848},{"id":"https://openalex.org/keywords/key","display_name":"Key (lock)","score":0.5715400576591492},{"id":"https://openalex.org/keywords/path","display_name":"Path (computing)","score":0.4892289638519287},{"id":"https://openalex.org/keywords/microprocessor","display_name":"Microprocessor","score":0.4404814839363098},{"id":"https://openalex.org/keywords/quality","display_name":"Quality (philosophy)","score":0.4364062547683716},{"id":"https://openalex.org/keywords/time-to-market","display_name":"Time to market","score":0.4120086133480072},{"id":"https://openalex.org/keywords/computer-engineering","display_name":"Computer engineering","score":0.3805916905403137},{"id":"https://openalex.org/keywords/embedded-system","display_name":"Embedded system","score":0.21706882119178772},{"id":"https://openalex.org/keywords/mathematics","display_name":"Mathematics","score":0.08606827259063721}],"concepts":[{"id":"https://openalex.org/C56005371","wikidata":"https://www.wikidata.org/wiki/Q209860","display_name":"PowerPC","level":3,"score":0.7878748178482056},{"id":"https://openalex.org/C93682380","wikidata":"https://www.wikidata.org/wiki/Q2025226","display_name":"Static timing analysis","level":2,"score":0.669776439666748},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.6631084084510803},{"id":"https://openalex.org/C117251300","wikidata":"https://www.wikidata.org/wiki/Q1849855","display_name":"Parametric statistics","level":2,"score":0.6544402241706848},{"id":"https://openalex.org/C26517878","wikidata":"https://www.wikidata.org/wiki/Q228039","display_name":"Key (lock)","level":2,"score":0.5715400576591492},{"id":"https://openalex.org/C2777735758","wikidata":"https://www.wikidata.org/wiki/Q817765","display_name":"Path (computing)","level":2,"score":0.4892289638519287},{"id":"https://openalex.org/C2780728072","wikidata":"https://www.wikidata.org/wiki/Q5297","display_name":"Microprocessor","level":2,"score":0.4404814839363098},{"id":"https://openalex.org/C2779530757","wikidata":"https://www.wikidata.org/wiki/Q1207505","display_name":"Quality (philosophy)","level":2,"score":0.4364062547683716},{"id":"https://openalex.org/C2779229675","wikidata":"https://www.wikidata.org/wiki/Q445235","display_name":"Time to market","level":2,"score":0.4120086133480072},{"id":"https://openalex.org/C113775141","wikidata":"https://www.wikidata.org/wiki/Q428691","display_name":"Computer engineering","level":1,"score":0.3805916905403137},{"id":"https://openalex.org/C149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","level":1,"score":0.21706882119178772},{"id":"https://openalex.org/C33923547","wikidata":"https://www.wikidata.org/wiki/Q395","display_name":"Mathematics","level":0,"score":0.08606827259063721},{"id":"https://openalex.org/C138885662","wikidata":"https://www.wikidata.org/wiki/Q5891","display_name":"Philosophy","level":0,"score":0.0},{"id":"https://openalex.org/C38652104","wikidata":"https://www.wikidata.org/wiki/Q3510521","display_name":"Computer security","level":1,"score":0.0},{"id":"https://openalex.org/C111472728","wikidata":"https://www.wikidata.org/wiki/Q9471","display_name":"Epistemology","level":1,"score":0.0},{"id":"https://openalex.org/C105795698","wikidata":"https://www.wikidata.org/wiki/Q12483","display_name":"Statistics","level":1,"score":0.0},{"id":"https://openalex.org/C2777904410","wikidata":"https://www.wikidata.org/wiki/Q7397","display_name":"Software","level":2,"score":0.0},{"id":"https://openalex.org/C111919701","wikidata":"https://www.wikidata.org/wiki/Q9135","display_name":"Operating system","level":1,"score":0.0},{"id":"https://openalex.org/C199360897","wikidata":"https://www.wikidata.org/wiki/Q9143","display_name":"Programming language","level":1,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/iscas.2002.1010645","is_oa":false,"landing_page_url":"https://doi.org/10.1109/iscas.2002.1010645","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2002 IEEE International Symposium on Circuits and Systems. Proceedings (Cat. No.02CH37353)","raw_type":"proceedings-article"}],"best_oa_location":null,"sustainable_development_goals":[],"awards":[],"funders":[],"has_content":{"pdf":false,"grobid_xml":false},"content_urls":null,"referenced_works_count":10,"referenced_works":["https://openalex.org/W810036366","https://openalex.org/W1572287951","https://openalex.org/W2121334524","https://openalex.org/W2124878724","https://openalex.org/W2125326096","https://openalex.org/W2131581217","https://openalex.org/W2138086100","https://openalex.org/W2169904207","https://openalex.org/W4253397165","https://openalex.org/W6634220963"],"related_works":["https://openalex.org/W2127399338","https://openalex.org/W2053532302","https://openalex.org/W2147297306","https://openalex.org/W1854252461","https://openalex.org/W2185351929","https://openalex.org/W2983079487","https://openalex.org/W4247386535","https://openalex.org/W2059836005","https://openalex.org/W2130286574","https://openalex.org/W2139237885"],"abstract_inverted_index":{"This":[0],"paper":[1],"presents":[2],"a":[3,35,44,63,87,94,116],"computationally":[4],"efficient":[5],"means":[6],"for":[7,59,68],"estimating":[8],"parametric":[9],"timing":[10,48],"yield":[11],"and":[12,21,111,122],"guiding":[13],"robust":[14],"design-for-quality":[15],"in":[16],"the":[17,31,40,56,70,81,120],"presence":[18],"of":[19,46,84],"manufacturing":[20],"operating":[22],"environment":[23],"variations.":[24,113],"Computational":[25],"efficiency":[26],"is":[27,51,66,77,105],"achieved":[28,78],"by":[29,54,79],"basing":[30],"proposed":[32],"methodology":[33,121],"on":[34,86,99],"post-processing":[36],"step":[37],"applied":[38],"to":[39,92,107],"report":[41],"generated":[42],"as":[43],"by-product":[45],"static":[47],"analysis.":[49],"Efficiency":[50],"also":[52],"ensured":[53],"exploiting":[55],"fact":[57],"that":[58],"small":[60],"processing/environment":[61],"variations,":[62],"linear":[64],"model":[65],"adequate":[67],"capturing":[69],"resulting":[71],"delay":[72],"change.":[73],"Meaningful":[74],"design":[75,96],"guidance":[76],"analyzing":[80],"timing-related":[82],"influence":[83],"variations":[85],"path-by-path":[88],"basis,":[89],"allowing":[90],"designers":[91],"perform":[93],"quality-oriented":[95],"pass":[97],"focused":[98],"key":[100],"paths.":[101],"A":[102],"coherent":[103],"strategy":[104],"provided":[106],"handle":[108],"both":[109],"die-to-die":[110],"within-die":[112],"Examples":[114],"from":[115],"PowerPC":[117],"microprocessor":[118],"illustrate":[119],"its":[123],"capabilities.":[124]},"counts_by_year":[],"updated_date":"2025-11-06T03:46:38.306776","created_date":"2025-10-10T00:00:00"}