{"id":"https://openalex.org/W1499873923","doi":"https://doi.org/10.1109/iscas.2002.1010576","title":"A 2.1-GHz monolithic frequency synthesizer with robust phase switching prescaler and loop capacitance scaling","display_name":"A 2.1-GHz monolithic frequency synthesizer with robust phase switching prescaler and loop capacitance scaling","publication_year":2003,"publication_date":"2003-06-25","ids":{"openalex":"https://openalex.org/W1499873923","doi":"https://doi.org/10.1109/iscas.2002.1010576","mag":"1499873923"},"language":"en","primary_location":{"id":"doi:10.1109/iscas.2002.1010576","is_oa":false,"landing_page_url":"https://doi.org/10.1109/iscas.2002.1010576","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2002 IEEE International Symposium on Circuits and Systems. Proceedings (Cat. No.02CH37353)","raw_type":"proceedings-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5113130683","display_name":"K. Shu","orcid":null},"institutions":[{"id":"https://openalex.org/I91045830","display_name":"Texas A&M University","ror":"https://ror.org/01f5ytq51","country_code":"US","type":"education","lineage":["https://openalex.org/I91045830"]}],"countries":["US"],"is_corresponding":true,"raw_author_name":"K. Shu","raw_affiliation_strings":["Electrical Engineering Department, Texas A and M University, College Station, TX, USA","Dept. of Electr Eng., Texas A&M Univ., College Station, TX, USA"],"affiliations":[{"raw_affiliation_string":"Electrical Engineering Department, Texas A and M University, College Station, TX, USA","institution_ids":["https://openalex.org/I91045830"]},{"raw_affiliation_string":"Dept. of Electr Eng., Texas A&M Univ., College Station, TX, USA","institution_ids":["https://openalex.org/I91045830"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5019857998","display_name":"E. S\u00e1nchez\u2010Sinencio","orcid":"https://orcid.org/0000-0003-2116-1842"},"institutions":[{"id":"https://openalex.org/I91045830","display_name":"Texas A&M University","ror":"https://ror.org/01f5ytq51","country_code":"US","type":"education","lineage":["https://openalex.org/I91045830"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"E. Sanchez-Sinencio","raw_affiliation_strings":["Electrical Engineering Department, Texas A and M University, College Station, TX, USA","Dept. of Electr Eng., Texas A&M Univ., College Station, TX, USA"],"affiliations":[{"raw_affiliation_string":"Electrical Engineering Department, Texas A and M University, College Station, TX, USA","institution_ids":["https://openalex.org/I91045830"]},{"raw_affiliation_string":"Dept. of Electr Eng., Texas A&M Univ., College Station, TX, USA","institution_ids":["https://openalex.org/I91045830"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5024571753","display_name":"Jos\u00e9 Silva-Mart\u00ednez","orcid":"https://orcid.org/0000-0002-7960-0177"},"institutions":[{"id":"https://openalex.org/I91045830","display_name":"Texas A&M University","ror":"https://ror.org/01f5ytq51","country_code":"US","type":"education","lineage":["https://openalex.org/I91045830"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"J. Silva-Martinez","raw_affiliation_strings":["Electrical Engineering Department, Texas A and M University, College Station, TX, USA","Dept. of Electr Eng., Texas A&M Univ., College Station, TX, USA"],"affiliations":[{"raw_affiliation_string":"Electrical Engineering Department, Texas A and M University, College Station, TX, USA","institution_ids":["https://openalex.org/I91045830"]},{"raw_affiliation_string":"Dept. of Electr Eng., Texas A&M Univ., College Station, TX, USA","institution_ids":["https://openalex.org/I91045830"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":3,"corresponding_author_ids":["https://openalex.org/A5113130683"],"corresponding_institution_ids":["https://openalex.org/I91045830"],"apc_list":null,"apc_paid":null,"fwci":1.7386,"has_fulltext":false,"cited_by_count":7,"citation_normalized_percentile":{"value":0.83535283,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":null,"biblio":{"volume":"4","issue":null,"first_page":"IV","last_page":"791"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T11417","display_name":"Advancements in PLL and VCO Technologies","score":1.0,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T11417","display_name":"Advancements in PLL and VCO Technologies","score":1.0,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10187","display_name":"Radio Frequency Integrated Circuit Design","score":0.9991999864578247,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10323","display_name":"Analog and Mixed-Signal Circuit Design","score":0.9986000061035156,"subfield":{"id":"https://openalex.org/subfields/2204","display_name":"Biomedical Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/frequency-synthesizer","display_name":"Frequency synthesizer","score":0.7457091808319092},{"id":"https://openalex.org/keywords/frequency-divider","display_name":"Frequency divider","score":0.7128435373306274},{"id":"https://openalex.org/keywords/direct-digital-synthesizer","display_name":"Direct digital synthesizer","score":0.603192925453186},{"id":"https://openalex.org/keywords/delta-sigma-modulation","display_name":"Delta-sigma modulation","score":0.5886117815971375},{"id":"https://openalex.org/keywords/cmos","display_name":"CMOS","score":0.5685533881187439},{"id":"https://openalex.org/keywords/phase-locked-loop","display_name":"Phase-locked loop","score":0.5644726753234863},{"id":"https://openalex.org/keywords/voltage-controlled-oscillator","display_name":"Voltage-controlled oscillator","score":0.5333043932914734},{"id":"https://openalex.org/keywords/capacitance","display_name":"Capacitance","score":0.5241435170173645},{"id":"https://openalex.org/keywords/capacitor","display_name":"Capacitor","score":0.4952916204929352},{"id":"https://openalex.org/keywords/glitch","display_name":"Glitch","score":0.4503808617591858},{"id":"https://openalex.org/keywords/electronic-engineering","display_name":"Electronic engineering","score":0.44261157512664795},{"id":"https://openalex.org/keywords/phase-noise","display_name":"Phase noise","score":0.44218528270721436},{"id":"https://openalex.org/keywords/electrical-engineering","display_name":"Electrical engineering","score":0.4333394765853882},{"id":"https://openalex.org/keywords/voltage","display_name":"Voltage","score":0.34537041187286377},{"id":"https://openalex.org/keywords/physics","display_name":"Physics","score":0.28454047441482544},{"id":"https://openalex.org/keywords/engineering","display_name":"Engineering","score":0.2773074507713318}],"concepts":[{"id":"https://openalex.org/C182099602","wikidata":"https://www.wikidata.org/wiki/Q2660678","display_name":"Frequency synthesizer","level":4,"score":0.7457091808319092},{"id":"https://openalex.org/C74982907","wikidata":"https://www.wikidata.org/wiki/Q1455624","display_name":"Frequency divider","level":3,"score":0.7128435373306274},{"id":"https://openalex.org/C166089067","wikidata":"https://www.wikidata.org/wiki/Q1227465","display_name":"Direct digital synthesizer","level":5,"score":0.603192925453186},{"id":"https://openalex.org/C68754193","wikidata":"https://www.wikidata.org/wiki/Q1184820","display_name":"Delta-sigma modulation","level":3,"score":0.5886117815971375},{"id":"https://openalex.org/C46362747","wikidata":"https://www.wikidata.org/wiki/Q173431","display_name":"CMOS","level":2,"score":0.5685533881187439},{"id":"https://openalex.org/C12707504","wikidata":"https://www.wikidata.org/wiki/Q52637","display_name":"Phase-locked loop","level":3,"score":0.5644726753234863},{"id":"https://openalex.org/C5291336","wikidata":"https://www.wikidata.org/wiki/Q852341","display_name":"Voltage-controlled oscillator","level":3,"score":0.5333043932914734},{"id":"https://openalex.org/C30066665","wikidata":"https://www.wikidata.org/wiki/Q164399","display_name":"Capacitance","level":3,"score":0.5241435170173645},{"id":"https://openalex.org/C52192207","wikidata":"https://www.wikidata.org/wiki/Q5322","display_name":"Capacitor","level":3,"score":0.4952916204929352},{"id":"https://openalex.org/C191287063","wikidata":"https://www.wikidata.org/wiki/Q543281","display_name":"Glitch","level":3,"score":0.4503808617591858},{"id":"https://openalex.org/C24326235","wikidata":"https://www.wikidata.org/wiki/Q126095","display_name":"Electronic engineering","level":1,"score":0.44261157512664795},{"id":"https://openalex.org/C89631360","wikidata":"https://www.wikidata.org/wiki/Q1428766","display_name":"Phase noise","level":2,"score":0.44218528270721436},{"id":"https://openalex.org/C119599485","wikidata":"https://www.wikidata.org/wiki/Q43035","display_name":"Electrical engineering","level":1,"score":0.4333394765853882},{"id":"https://openalex.org/C165801399","wikidata":"https://www.wikidata.org/wiki/Q25428","display_name":"Voltage","level":2,"score":0.34537041187286377},{"id":"https://openalex.org/C121332964","wikidata":"https://www.wikidata.org/wiki/Q413","display_name":"Physics","level":0,"score":0.28454047441482544},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.2773074507713318},{"id":"https://openalex.org/C62520636","wikidata":"https://www.wikidata.org/wiki/Q944","display_name":"Quantum mechanics","level":1,"score":0.0},{"id":"https://openalex.org/C17525397","wikidata":"https://www.wikidata.org/wiki/Q176140","display_name":"Electrode","level":2,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/iscas.2002.1010576","is_oa":false,"landing_page_url":"https://doi.org/10.1109/iscas.2002.1010576","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2002 IEEE International Symposium on Circuits and Systems. Proceedings (Cat. No.02CH37353)","raw_type":"proceedings-article"}],"best_oa_location":null,"sustainable_development_goals":[{"display_name":"Affordable and clean energy","id":"https://metadata.un.org/sdg/7","score":0.8500000238418579}],"awards":[],"funders":[],"has_content":{"pdf":false,"grobid_xml":false},"content_urls":null,"referenced_works_count":9,"referenced_works":["https://openalex.org/W1540728425","https://openalex.org/W1830369973","https://openalex.org/W2099801150","https://openalex.org/W2124340165","https://openalex.org/W2126095665","https://openalex.org/W2132914205","https://openalex.org/W2154071097","https://openalex.org/W2161250182","https://openalex.org/W2171035445"],"related_works":["https://openalex.org/W2166555237","https://openalex.org/W2161572852","https://openalex.org/W2622028395","https://openalex.org/W4386197759","https://openalex.org/W2389258116","https://openalex.org/W2393010087","https://openalex.org/W2015962950","https://openalex.org/W3035420365","https://openalex.org/W3027303490","https://openalex.org/W2246724580"],"abstract_inverted_index":{"This":[0],"paper":[1],"presents":[2],"the":[3,42,67,74],"design":[4,65],"of":[5,66,105],"a":[6],"2.1-GHz":[7],"fully":[8],"integrated":[9,47],"/spl":[10,18,57,69],"Sigma//spl":[11,58,70],"Delta/":[12,59,71],"fractional-N":[13,75],"frequency":[14],"synthesizer":[15,76,97],"in":[16,33,41],"0.35":[17],"mu/m":[19],"CMOS":[20],"technology.":[21],"The":[22,81,96],"improved":[23],"low-voltage,":[24],"low-power,":[25],"inherently":[26],"glitch-free":[27],"phase":[28],"switching":[29],"prescaler":[30,90],"is":[31,84],"used":[32],"this":[34],"work.":[35],"With":[36,53],"capacitance":[37],"scaling,":[38],"large":[39],"capacitors":[40],"loop":[43],"filter":[44],"can":[45],"be":[46,78],"on":[48,62],"chip":[49],"within":[50],"small":[51],"area.":[52],"several":[54],"different":[55],"digital":[56,68],"modulators":[60],"designed":[61],"chip,":[63],"optimal":[64],"modulator":[72],"for":[73,87,93],"will":[77],"investigated":[79],"experimentally.":[80],"supply":[82],"voltage":[83],"1.5":[85],"V":[86],"VCO":[88],"and":[89,91,101],"2-V":[92],"other":[94],"blocks.":[95],"dissipates":[98],"16":[99],"mW":[100],"has":[102],"an":[103],"area":[104],"0.85":[106],"mm/sup":[107],"2/":[108],"excluding":[109],"pads.":[110]},"counts_by_year":[],"updated_date":"2025-11-06T03:46:38.306776","created_date":"2025-10-10T00:00:00"}
