{"id":"https://openalex.org/W1583436091","doi":"https://doi.org/10.1109/iscas.2002.1010551","title":"Task graph transformation to aid system synthesis","display_name":"Task graph transformation to aid system synthesis","publication_year":2003,"publication_date":"2003-06-25","ids":{"openalex":"https://openalex.org/W1583436091","doi":"https://doi.org/10.1109/iscas.2002.1010551","mag":"1583436091"},"language":"en","primary_location":{"id":"doi:10.1109/iscas.2002.1010551","is_oa":false,"landing_page_url":"https://doi.org/10.1109/iscas.2002.1010551","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2002 IEEE International Symposium on Circuits and Systems. Proceedings (Cat. No.02CH37353)","raw_type":"proceedings-article"},"type":"conference-paper","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5072070747","display_name":"Keith S. Vallerio","orcid":null},"institutions":[{"id":"https://openalex.org/I20089843","display_name":"Princeton University","ror":"https://ror.org/00hx57361","country_code":"US","type":"education","lineage":["https://openalex.org/I20089843"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"K.S. Vallerio","raw_affiliation_strings":["Department of Electrical Engineering, Princeton University, Princeton, NJ, USA","Dept. of Electr. Eng., Princeton Univ., NJ, USA"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Department of Electrical Engineering, Princeton University, Princeton, NJ, USA","institution_ids":["https://openalex.org/I20089843"]},{"raw_affiliation_string":"Dept. of Electr. Eng., Princeton Univ., NJ, USA","institution_ids":["https://openalex.org/I20089843"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5086131079","display_name":"Niraj K. Jha","orcid":"https://orcid.org/0000-0002-1539-0369"},"institutions":[{"id":"https://openalex.org/I20089843","display_name":"Princeton University","ror":"https://ror.org/00hx57361","country_code":"US","type":"education","lineage":["https://openalex.org/I20089843"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"N.K. Jha","raw_affiliation_strings":["Department of Electrical Engineering, Princeton University, Princeton, NJ, USA","Dept. of Electr. Eng., Princeton Univ., NJ, USA"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Department of Electrical Engineering, Princeton University, Princeton, NJ, USA","institution_ids":["https://openalex.org/I20089843"]},{"raw_affiliation_string":"Dept. of Electr. Eng., Princeton Univ., NJ, USA","institution_ids":["https://openalex.org/I20089843"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":1,"corresponding_author_ids":[],"corresponding_institution_ids":["https://openalex.org/I20089843"],"apc_list":null,"apc_paid":null,"fwci":0.9298,"has_fulltext":false,"cited_by_count":4,"citation_normalized_percentile":{"value":0.71947109,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":null,"biblio":{"volume":"4","issue":null,"first_page":"IV","last_page":"695"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10904","display_name":"Embedded Systems Design Techniques","score":0.9994000196456909,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10904","display_name":"Embedded Systems Design Techniques","score":0.9994000196456909,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10054","display_name":"Parallel Computing and Optimization Techniques","score":0.9973000288009644,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11450","display_name":"Model-Driven Software Engineering Techniques","score":0.9959999918937683,"subfield":{"id":"https://openalex.org/subfields/1712","display_name":"Software"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.7410740256309509},{"id":"https://openalex.org/keywords/graph-rewriting","display_name":"Graph rewriting","score":0.509425938129425},{"id":"https://openalex.org/keywords/transformation","display_name":"Transformation (genetics)","score":0.5086427927017212},{"id":"https://openalex.org/keywords/graph","display_name":"Graph","score":0.4626710116863251},{"id":"https://openalex.org/keywords/task","display_name":"Task (project management)","score":0.4475829005241394},{"id":"https://openalex.org/keywords/model-transformation","display_name":"Model transformation","score":0.4144861102104187},{"id":"https://openalex.org/keywords/theoretical-computer-science","display_name":"Theoretical computer science","score":0.25308090448379517},{"id":"https://openalex.org/keywords/artificial-intelligence","display_name":"Artificial intelligence","score":0.20906728506088257},{"id":"https://openalex.org/keywords/engineering","display_name":"Engineering","score":0.1279958188533783},{"id":"https://openalex.org/keywords/systems-engineering","display_name":"Systems engineering","score":0.0972447395324707}],"concepts":[{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.7410740256309509},{"id":"https://openalex.org/C558772884","wikidata":"https://www.wikidata.org/wiki/Q1508564","display_name":"Graph rewriting","level":3,"score":0.509425938129425},{"id":"https://openalex.org/C204241405","wikidata":"https://www.wikidata.org/wiki/Q461499","display_name":"Transformation (genetics)","level":3,"score":0.5086427927017212},{"id":"https://openalex.org/C132525143","wikidata":"https://www.wikidata.org/wiki/Q141488","display_name":"Graph","level":2,"score":0.4626710116863251},{"id":"https://openalex.org/C2780451532","wikidata":"https://www.wikidata.org/wiki/Q759676","display_name":"Task (project management)","level":2,"score":0.4475829005241394},{"id":"https://openalex.org/C2779791154","wikidata":"https://www.wikidata.org/wiki/Q258040","display_name":"Model transformation","level":3,"score":0.4144861102104187},{"id":"https://openalex.org/C80444323","wikidata":"https://www.wikidata.org/wiki/Q2878974","display_name":"Theoretical computer science","level":1,"score":0.25308090448379517},{"id":"https://openalex.org/C154945302","wikidata":"https://www.wikidata.org/wiki/Q11660","display_name":"Artificial intelligence","level":1,"score":0.20906728506088257},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.1279958188533783},{"id":"https://openalex.org/C201995342","wikidata":"https://www.wikidata.org/wiki/Q682496","display_name":"Systems engineering","level":1,"score":0.0972447395324707},{"id":"https://openalex.org/C55493867","wikidata":"https://www.wikidata.org/wiki/Q7094","display_name":"Biochemistry","level":1,"score":0.0},{"id":"https://openalex.org/C185592680","wikidata":"https://www.wikidata.org/wiki/Q2329","display_name":"Chemistry","level":0,"score":0.0},{"id":"https://openalex.org/C2776436953","wikidata":"https://www.wikidata.org/wiki/Q5163215","display_name":"Consistency (knowledge bases)","level":2,"score":0.0},{"id":"https://openalex.org/C104317684","wikidata":"https://www.wikidata.org/wiki/Q7187","display_name":"Gene","level":2,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/iscas.2002.1010551","is_oa":false,"landing_page_url":"https://doi.org/10.1109/iscas.2002.1010551","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2002 IEEE International Symposium on Circuits and Systems. Proceedings (Cat. No.02CH37353)","raw_type":"proceedings-article"}],"best_oa_location":null,"sustainable_development_goals":[{"id":"https://metadata.un.org/sdg/9","display_name":"Industry, innovation and infrastructure","score":0.41999998688697815}],"awards":[],"funders":[],"has_content":{"grobid_xml":false,"pdf":false},"content_urls":null,"referenced_works_count":24,"referenced_works":["https://openalex.org/W1540260180","https://openalex.org/W1582450315","https://openalex.org/W1612556207","https://openalex.org/W1993854438","https://openalex.org/W2011039300","https://openalex.org/W2070563545","https://openalex.org/W2111817123","https://openalex.org/W2114732989","https://openalex.org/W2122834595","https://openalex.org/W2123757826","https://openalex.org/W2127613432","https://openalex.org/W2132935493","https://openalex.org/W2142386205","https://openalex.org/W2170244590","https://openalex.org/W2171407902","https://openalex.org/W2261054240","https://openalex.org/W4230531668","https://openalex.org/W4238957840","https://openalex.org/W4239911483","https://openalex.org/W4247862354","https://openalex.org/W4250661686","https://openalex.org/W6632317738","https://openalex.org/W6636658889","https://openalex.org/W6684631628"],"related_works":["https://openalex.org/W2406066661","https://openalex.org/W2151333671","https://openalex.org/W2364400229","https://openalex.org/W2986452333","https://openalex.org/W1988613072","https://openalex.org/W2621356373","https://openalex.org/W2157133118","https://openalex.org/W2159183434","https://openalex.org/W2165621915","https://openalex.org/W2178641308"],"abstract_inverted_index":{"The":[0],"increasing":[1],"complexity":[2],"of":[3,14,63,90],"real-time":[4,75],"embedded":[5],"systems":[6],"along":[7],"with":[8],"the":[9,92],"short":[10],"time-to-market":[11],"for":[12,27],"most":[13],"their":[15],"applications":[16],"have":[17],"led":[18],"designers":[19],"to":[20,83,114],"develop":[21],"increasingly":[22],"sophisticated":[23],"algorithms":[24],"and":[25,42,52,69,87,96,117],"tools":[26],"system-level":[28,64,85],"synthesis.":[29],"At":[30],"this":[31,105],"level,":[32],"coarse-grained":[33],"tasks,":[34],"such":[35],"as":[36],"discrete":[37],"cosine":[38],"transforms,":[39],"are":[40,71],"assigned":[41],"scheduled":[43],"on":[44,120],"general-purpose":[45],"processors,":[46],"field":[47],"programmable":[48],"gate":[49],"arrays":[50],"(FPGAs)":[51],"application-specific":[53],"integrated":[54],"circuits":[55],"(ASICs).":[56],"Hardware-software":[57],"co-synthesis":[58,124],"forms":[59],"in":[60,66],"important":[61],"sub-problem":[62],"synthesis":[65,86],"which":[67],"price":[68,110],"power":[70],"frequently":[72],"optimized":[73],"under":[74],"constraints.":[76],"This":[77],"paper":[78],"proposes":[79],"a":[80],"pre-processing":[81],"step":[82],"aid":[84],"is":[88],"independent":[89],"both":[91],"targeted":[93],"cosynthesis":[94],"tool":[95,125],"its":[97],"underlying":[98],"algorithm.":[99],"Experimental":[100],"results":[101],"show":[102],"that":[103],"using":[104],"methodology":[106],"can":[107],"reduce":[108],"system":[109],"(power)":[111],"by":[112,127],"up":[113],"84%":[115],"(67%)":[116],"12%":[118],"(16%)":[119],"average":[121],"while":[122],"reducing":[123],"run-time":[126],"29%.":[128]},"counts_by_year":[],"updated_date":"2026-07-29T14:22:42.915294","created_date":"2025-10-10T00:00:00"}
