{"id":"https://openalex.org/W1934184172","doi":"https://doi.org/10.1109/iscas.2002.1010525","title":"Low-power 2P2N SRAM with column hidden refresh","display_name":"Low-power 2P2N SRAM with column hidden refresh","publication_year":2003,"publication_date":"2003-06-25","ids":{"openalex":"https://openalex.org/W1934184172","doi":"https://doi.org/10.1109/iscas.2002.1010525","mag":"1934184172"},"language":"en","primary_location":{"id":"doi:10.1109/iscas.2002.1010525","is_oa":false,"landing_page_url":"https://doi.org/10.1109/iscas.2002.1010525","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2002 IEEE International Symposium on Circuits and Systems. Proceedings (Cat. No.02CH37353)","raw_type":"proceedings-article"},"type":"conference-paper","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5022417847","display_name":"Hong\u2010Yi Huang","orcid":"https://orcid.org/0000-0002-6556-3256"},"institutions":[{"id":"https://openalex.org/I114150738","display_name":"Fu Jen Catholic University","ror":"https://ror.org/04je98850","country_code":"TW","type":"education","lineage":["https://openalex.org/I114150738"]}],"countries":["TW"],"is_corresponding":false,"raw_author_name":"Hong-Yi Huang","raw_affiliation_strings":["Department of Electronic Engineering, Fu-Jen University, Taiwan","Dept. of Electron. Eng., Fu Jen Univ., Taiwan"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Department of Electronic Engineering, Fu-Jen University, Taiwan","institution_ids":["https://openalex.org/I114150738"]},{"raw_affiliation_string":"Dept. of Electron. Eng., Fu Jen Univ., Taiwan","institution_ids":["https://openalex.org/I114150738"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5008133363","display_name":"Hsuan-Yi Su","orcid":null},"institutions":[{"id":"https://openalex.org/I114150738","display_name":"Fu Jen Catholic University","ror":"https://ror.org/04je98850","country_code":"TW","type":"education","lineage":["https://openalex.org/I114150738"]}],"countries":["TW"],"is_corresponding":false,"raw_author_name":"Hsuan-Yi Su","raw_affiliation_strings":["Department of Electronic Engineering, Fu-Jen University, Taiwan","Dept. of Electron. Eng., Fu Jen Univ., Taiwan"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Department of Electronic Engineering, Fu-Jen University, Taiwan","institution_ids":["https://openalex.org/I114150738"]},{"raw_affiliation_string":"Dept. of Electron. Eng., Fu Jen Univ., Taiwan","institution_ids":["https://openalex.org/I114150738"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":1,"corresponding_author_ids":[],"corresponding_institution_ids":["https://openalex.org/I114150738"],"apc_list":null,"apc_paid":null,"fwci":1.2923,"has_fulltext":false,"cited_by_count":5,"citation_normalized_percentile":{"value":0.78301303,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":null,"biblio":{"volume":"4","issue":null,"first_page":"IV","last_page":"591"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10558","display_name":"Advancements in Semiconductor Devices and Circuit Design","score":0.9998000264167786,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10558","display_name":"Advancements in Semiconductor Devices and Circuit Design","score":0.9998000264167786,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10472","display_name":"Semiconductor materials and devices","score":0.9995999932289124,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11032","display_name":"VLSI and Analog Circuit Testing","score":0.9993000030517578,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/nmos-logic","display_name":"NMOS logic","score":0.8972784876823425},{"id":"https://openalex.org/keywords/static-random-access-memory","display_name":"Static random-access memory","score":0.8225230574607849},{"id":"https://openalex.org/keywords/pmos-logic","display_name":"PMOS logic","score":0.8068757057189941},{"id":"https://openalex.org/keywords/column","display_name":"Column (typography)","score":0.6862433552742004},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.5798723697662354},{"id":"https://openalex.org/keywords/transistor","display_name":"Transistor","score":0.49070560932159424},{"id":"https://openalex.org/keywords/cmos","display_name":"CMOS","score":0.47785136103630066},{"id":"https://openalex.org/keywords/leakage","display_name":"Leakage (economics)","score":0.42054614424705505},{"id":"https://openalex.org/keywords/embedded-system","display_name":"Embedded system","score":0.386549711227417},{"id":"https://openalex.org/keywords/computer-hardware","display_name":"Computer hardware","score":0.3817445635795593},{"id":"https://openalex.org/keywords/electronic-engineering","display_name":"Electronic engineering","score":0.24893730878829956},{"id":"https://openalex.org/keywords/electrical-engineering","display_name":"Electrical engineering","score":0.22461405396461487},{"id":"https://openalex.org/keywords/engineering","display_name":"Engineering","score":0.2050599753856659},{"id":"https://openalex.org/keywords/voltage","display_name":"Voltage","score":0.1196298599243164},{"id":"https://openalex.org/keywords/computer-network","display_name":"Computer network","score":0.0708819329738617}],"concepts":[{"id":"https://openalex.org/C197162436","wikidata":"https://www.wikidata.org/wiki/Q83908","display_name":"NMOS logic","level":4,"score":0.8972784876823425},{"id":"https://openalex.org/C68043766","wikidata":"https://www.wikidata.org/wiki/Q267416","display_name":"Static random-access memory","level":2,"score":0.8225230574607849},{"id":"https://openalex.org/C27050352","wikidata":"https://www.wikidata.org/wiki/Q173605","display_name":"PMOS logic","level":4,"score":0.8068757057189941},{"id":"https://openalex.org/C2780551164","wikidata":"https://www.wikidata.org/wiki/Q2306599","display_name":"Column (typography)","level":3,"score":0.6862433552742004},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.5798723697662354},{"id":"https://openalex.org/C172385210","wikidata":"https://www.wikidata.org/wiki/Q5339","display_name":"Transistor","level":3,"score":0.49070560932159424},{"id":"https://openalex.org/C46362747","wikidata":"https://www.wikidata.org/wiki/Q173431","display_name":"CMOS","level":2,"score":0.47785136103630066},{"id":"https://openalex.org/C2777042071","wikidata":"https://www.wikidata.org/wiki/Q6509304","display_name":"Leakage (economics)","level":2,"score":0.42054614424705505},{"id":"https://openalex.org/C149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","level":1,"score":0.386549711227417},{"id":"https://openalex.org/C9390403","wikidata":"https://www.wikidata.org/wiki/Q3966","display_name":"Computer hardware","level":1,"score":0.3817445635795593},{"id":"https://openalex.org/C24326235","wikidata":"https://www.wikidata.org/wiki/Q126095","display_name":"Electronic engineering","level":1,"score":0.24893730878829956},{"id":"https://openalex.org/C119599485","wikidata":"https://www.wikidata.org/wiki/Q43035","display_name":"Electrical engineering","level":1,"score":0.22461405396461487},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.2050599753856659},{"id":"https://openalex.org/C165801399","wikidata":"https://www.wikidata.org/wiki/Q25428","display_name":"Voltage","level":2,"score":0.1196298599243164},{"id":"https://openalex.org/C31258907","wikidata":"https://www.wikidata.org/wiki/Q1301371","display_name":"Computer network","level":1,"score":0.0708819329738617},{"id":"https://openalex.org/C139719470","wikidata":"https://www.wikidata.org/wiki/Q39680","display_name":"Macroeconomics","level":1,"score":0.0},{"id":"https://openalex.org/C162324750","wikidata":"https://www.wikidata.org/wiki/Q8134","display_name":"Economics","level":0,"score":0.0},{"id":"https://openalex.org/C126042441","wikidata":"https://www.wikidata.org/wiki/Q1324888","display_name":"Frame (networking)","level":2,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/iscas.2002.1010525","is_oa":false,"landing_page_url":"https://doi.org/10.1109/iscas.2002.1010525","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2002 IEEE International Symposium on Circuits and Systems. Proceedings (Cat. No.02CH37353)","raw_type":"proceedings-article"}],"best_oa_location":null,"sustainable_development_goals":[{"id":"https://metadata.un.org/sdg/7","display_name":"Affordable and clean energy","score":0.8199999928474426}],"awards":[],"funders":[],"has_content":{"pdf":false,"grobid_xml":false},"content_urls":null,"referenced_works_count":6,"referenced_works":["https://openalex.org/W2098911856","https://openalex.org/W2110587840","https://openalex.org/W2150628095","https://openalex.org/W2164348807","https://openalex.org/W2263613949","https://openalex.org/W3104598800"],"related_works":["https://openalex.org/W4386261925","https://openalex.org/W2082944690","https://openalex.org/W2263373136","https://openalex.org/W2023334077","https://openalex.org/W2005494397","https://openalex.org/W2339836056","https://openalex.org/W1811213809","https://openalex.org/W1914349328","https://openalex.org/W2160067645","https://openalex.org/W2097679194"],"abstract_inverted_index":{"A":[0],"column":[1,24,33],"hidden":[2,34,48,52],"refresh":[3,35,53],"technique":[4],"is":[5,36],"proposed":[6],"for":[7],"the":[8,14,18,22,32,45,51,55,63,66,70,75,83,88],"2P2N":[9,19,56],"SRAM":[10],"design.":[11],"All":[12],"of":[13,17,31,44,65,69],"storage":[15,77],"nodes":[16],"cells":[20,57],"in":[21,95],"same":[23,84],"are":[25],"refreshed":[26],"simultaneously.":[27],"The":[28,79],"dissipated":[29],"power":[30],"proved":[37],"to":[38],"be":[39,59,93],"much":[40],"less":[41],"than":[42],"that":[43],"traditional":[46],"row":[47],"refresh.":[49],"Using":[50],"method,":[54],"can":[58,92],"designed":[60],"without":[61],"considering":[62],"ratio":[64],"leakage":[67],"current":[68],"PMOS":[71],"access":[72],"transistors":[73],"and":[74],"NMOS":[76],"transistors.":[78],"novel":[80],"design":[81],"has":[82],"I/O":[85],"specification":[86],"as":[87,99],"SRAM.":[89],"Moreover,":[90],"it":[91],"fabricated":[94],"standard":[96],"CMOS":[97],"process":[98],"a":[100],"small-area":[101],"embedded":[102],"memory.":[103]},"counts_by_year":[],"updated_date":"2026-07-29T14:22:42.915294","created_date":"2025-10-10T00:00:00"}
