{"id":"https://openalex.org/W2159752733","doi":"https://doi.org/10.1109/iscas.2002.1010522","title":"Full current-mode techniques for high-speed CMOS SRAMs","display_name":"Full current-mode techniques for high-speed CMOS SRAMs","publication_year":2003,"publication_date":"2003-06-25","ids":{"openalex":"https://openalex.org/W2159752733","doi":"https://doi.org/10.1109/iscas.2002.1010522","mag":"2159752733"},"language":"en","primary_location":{"id":"doi:10.1109/iscas.2002.1010522","is_oa":false,"landing_page_url":"https://doi.org/10.1109/iscas.2002.1010522","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2002 IEEE International Symposium on Circuits and Systems. Proceedings (Cat. No.02CH37353)","raw_type":"proceedings-article"},"type":"conference-paper","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5087275622","display_name":"S.M. Wang","orcid":null},"institutions":[{"id":"https://openalex.org/I148366613","display_name":"National Yang Ming Chiao Tung University","ror":"https://ror.org/00se2k293","country_code":"TW","type":"education","lineage":["https://openalex.org/I148366613"]}],"countries":["TW"],"is_corresponding":false,"raw_author_name":"S.M. Wang","raw_affiliation_strings":["National Chiao Tung University, Taiwan"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"National Chiao Tung University, Taiwan","institution_ids":["https://openalex.org/I148366613"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5111977654","display_name":"Chung-Shieh Wu","orcid":null},"institutions":[{"id":"https://openalex.org/I148366613","display_name":"National Yang Ming Chiao Tung University","ror":"https://ror.org/00se2k293","country_code":"TW","type":"education","lineage":["https://openalex.org/I148366613"]}],"countries":["TW"],"is_corresponding":false,"raw_author_name":"C.X. Wu","raw_affiliation_strings":["National Chiao Tung University, Taiwan"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"National Chiao Tung University, Taiwan","institution_ids":["https://openalex.org/I148366613"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":1,"corresponding_author_ids":[],"corresponding_institution_ids":["https://openalex.org/I148366613"],"apc_list":null,"apc_paid":null,"fwci":1.2923,"has_fulltext":false,"cited_by_count":5,"citation_normalized_percentile":{"value":0.8112022,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":null,"biblio":{"volume":"4","issue":null,"first_page":"IV","last_page":"580"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10363","display_name":"Low-power high-performance VLSI design","score":1.0,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10363","display_name":"Low-power high-performance VLSI design","score":1.0,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10323","display_name":"Analog and Mixed-Signal Circuit Design","score":0.9998999834060669,"subfield":{"id":"https://openalex.org/subfields/2204","display_name":"Biomedical Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11417","display_name":"Advancements in PLL and VCO Technologies","score":0.9998000264167786,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/cmos","display_name":"CMOS","score":0.8336884379386902},{"id":"https://openalex.org/keywords/static-random-access-memory","display_name":"Static random-access memory","score":0.5958816409111023},{"id":"https://openalex.org/keywords/electrical-engineering","display_name":"Electrical engineering","score":0.5842137336730957},{"id":"https://openalex.org/keywords/capacitance","display_name":"Capacitance","score":0.5488463640213013},{"id":"https://openalex.org/keywords/current","display_name":"Current (fluid)","score":0.537085235118866},{"id":"https://openalex.org/keywords/access-time","display_name":"Access time","score":0.5289692282676697},{"id":"https://openalex.org/keywords/swing","display_name":"Swing","score":0.5281118154525757},{"id":"https://openalex.org/keywords/voltage","display_name":"Voltage","score":0.5212738513946533},{"id":"https://openalex.org/keywords/line","display_name":"Line (geometry)","score":0.4906083643436432},{"id":"https://openalex.org/keywords/electronic-engineering","display_name":"Electronic engineering","score":0.44937777519226074},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.42534181475639343},{"id":"https://openalex.org/keywords/engineering","display_name":"Engineering","score":0.3530147075653076},{"id":"https://openalex.org/keywords/physics","display_name":"Physics","score":0.2133873999118805},{"id":"https://openalex.org/keywords/computer-hardware","display_name":"Computer hardware","score":0.18156570196151733}],"concepts":[{"id":"https://openalex.org/C46362747","wikidata":"https://www.wikidata.org/wiki/Q173431","display_name":"CMOS","level":2,"score":0.8336884379386902},{"id":"https://openalex.org/C68043766","wikidata":"https://www.wikidata.org/wiki/Q267416","display_name":"Static random-access memory","level":2,"score":0.5958816409111023},{"id":"https://openalex.org/C119599485","wikidata":"https://www.wikidata.org/wiki/Q43035","display_name":"Electrical engineering","level":1,"score":0.5842137336730957},{"id":"https://openalex.org/C30066665","wikidata":"https://www.wikidata.org/wiki/Q164399","display_name":"Capacitance","level":3,"score":0.5488463640213013},{"id":"https://openalex.org/C148043351","wikidata":"https://www.wikidata.org/wiki/Q4456944","display_name":"Current (fluid)","level":2,"score":0.537085235118866},{"id":"https://openalex.org/C194080101","wikidata":"https://www.wikidata.org/wiki/Q46306","display_name":"Access time","level":2,"score":0.5289692282676697},{"id":"https://openalex.org/C65655974","wikidata":"https://www.wikidata.org/wiki/Q14867674","display_name":"Swing","level":2,"score":0.5281118154525757},{"id":"https://openalex.org/C165801399","wikidata":"https://www.wikidata.org/wiki/Q25428","display_name":"Voltage","level":2,"score":0.5212738513946533},{"id":"https://openalex.org/C198352243","wikidata":"https://www.wikidata.org/wiki/Q37105","display_name":"Line (geometry)","level":2,"score":0.4906083643436432},{"id":"https://openalex.org/C24326235","wikidata":"https://www.wikidata.org/wiki/Q126095","display_name":"Electronic engineering","level":1,"score":0.44937777519226074},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.42534181475639343},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.3530147075653076},{"id":"https://openalex.org/C121332964","wikidata":"https://www.wikidata.org/wiki/Q413","display_name":"Physics","level":0,"score":0.2133873999118805},{"id":"https://openalex.org/C9390403","wikidata":"https://www.wikidata.org/wiki/Q3966","display_name":"Computer hardware","level":1,"score":0.18156570196151733},{"id":"https://openalex.org/C62520636","wikidata":"https://www.wikidata.org/wiki/Q944","display_name":"Quantum mechanics","level":1,"score":0.0},{"id":"https://openalex.org/C33923547","wikidata":"https://www.wikidata.org/wiki/Q395","display_name":"Mathematics","level":0,"score":0.0},{"id":"https://openalex.org/C78519656","wikidata":"https://www.wikidata.org/wiki/Q101333","display_name":"Mechanical engineering","level":1,"score":0.0},{"id":"https://openalex.org/C17525397","wikidata":"https://www.wikidata.org/wiki/Q176140","display_name":"Electrode","level":2,"score":0.0},{"id":"https://openalex.org/C2524010","wikidata":"https://www.wikidata.org/wiki/Q8087","display_name":"Geometry","level":1,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/iscas.2002.1010522","is_oa":false,"landing_page_url":"https://doi.org/10.1109/iscas.2002.1010522","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2002 IEEE International Symposium on Circuits and Systems. Proceedings (Cat. No.02CH37353)","raw_type":"proceedings-article"}],"best_oa_location":null,"sustainable_development_goals":[{"score":0.8700000047683716,"display_name":"Affordable and clean energy","id":"https://metadata.un.org/sdg/7"}],"awards":[],"funders":[],"has_content":{"grobid_xml":false,"pdf":false},"content_urls":null,"referenced_works_count":4,"referenced_works":["https://openalex.org/W1983428677","https://openalex.org/W2009511314","https://openalex.org/W2064338575","https://openalex.org/W2122435992"],"related_works":["https://openalex.org/W2136045454","https://openalex.org/W2074944429","https://openalex.org/W1991075467","https://openalex.org/W2389637992","https://openalex.org/W2369430179","https://openalex.org/W2609881373","https://openalex.org/W2172029144","https://openalex.org/W4387697157","https://openalex.org/W4363620538","https://openalex.org/W1970147343"],"abstract_inverted_index":{"This":[0],"paper":[1],"describes":[2],"an":[3],"experimental":[4],"32":[5],"K/spl":[6],"times/8":[7],"CMOS":[8,29],"SRAM":[9],"with":[10],"a":[11,17,24],"9":[12],"ns":[13],"access":[14],"time":[15],"at":[16,61,80],"supply":[18],"voltage":[19,59],"of":[20],"3":[21],"V":[22],"using":[23],"0.35":[25],"/spl":[26],"mu/m":[27],"1P2M":[28],"logic":[30],"technology.":[31],"Based":[32],"on":[33],"the":[34,41,51,58,62,72],"full":[35],"current-mode":[36],"techniques":[37],"for":[38],"read/write":[39],"operation,":[40],"sensing":[42],"speed":[43],"and":[44,64],"write":[45],"pulse":[46],"width":[47],"are":[48],"insensitive":[49],"to":[50,55],"bit-line":[52,63],"capacitance.":[53],"Due":[54],"these":[56],"techniques,":[57],"swing":[60],"data-line":[65],"can":[66],"be":[67],"kept":[68],"quite":[69],"small":[70],"all":[71],"time.":[73],"The":[74],"active":[75],"current":[76],"is":[77],"28":[78],"mA":[79],"100":[81],"MHz":[82],"under":[83],"typical":[84],"conditions.":[85]},"counts_by_year":[],"updated_date":"2026-07-29T14:22:42.915294","created_date":"2025-10-10T00:00:00"}