{"id":"https://openalex.org/W4232006640","doi":"https://doi.org/10.1109/isca.2014.6853219","title":"Improving the energy efficiency of Big Cores","display_name":"Improving the energy efficiency of Big Cores","publication_year":2014,"publication_date":"2014-06-01","ids":{"openalex":"https://openalex.org/W4232006640","doi":"https://doi.org/10.1109/isca.2014.6853219"},"language":"en","primary_location":{"id":"doi:10.1109/isca.2014.6853219","is_oa":false,"landing_page_url":"https://doi.org/10.1109/isca.2014.6853219","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2014 ACM/IEEE 41st International Symposium on Computer Architecture (ISCA)","raw_type":"proceedings-article"},"type":"conference-paper","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5025213872","display_name":"Kenneth Czechowski","orcid":null},"institutions":[{"id":"https://openalex.org/I130701444","display_name":"Georgia Institute of Technology","ror":"https://ror.org/01zkghx44","country_code":"US","type":"education","lineage":["https://openalex.org/I130701444"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Kenneth Czechowski","raw_affiliation_strings":["Georgia Institute of Technology, Atlanta, GA"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Georgia Institute of Technology, Atlanta, GA","institution_ids":["https://openalex.org/I130701444"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5109971580","display_name":"Victor W. Lee","orcid":null},"institutions":[{"id":"https://openalex.org/I1343180700","display_name":"Intel (United States)","ror":"https://ror.org/01ek73717","country_code":"US","type":"company","lineage":["https://openalex.org/I1343180700"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Victor W. Lee","raw_affiliation_strings":["Intel Corporation, Santa Clara, CA"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Intel Corporation, Santa Clara, CA","institution_ids":["https://openalex.org/I1343180700"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5081652233","display_name":"Ed Grochowski","orcid":null},"institutions":[{"id":"https://openalex.org/I1343180700","display_name":"Intel (United States)","ror":"https://ror.org/01ek73717","country_code":"US","type":"company","lineage":["https://openalex.org/I1343180700"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Ed Grochowski","raw_affiliation_strings":["Intel Corporation, Santa Clara, CA"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Intel Corporation, Santa Clara, CA","institution_ids":["https://openalex.org/I1343180700"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5043586560","display_name":"Ronny Ronen","orcid":"https://orcid.org/0000-0002-0341-284X"},"institutions":[{"id":"https://openalex.org/I1343180700","display_name":"Intel (United States)","ror":"https://ror.org/01ek73717","country_code":"US","type":"company","lineage":["https://openalex.org/I1343180700"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Ronny Ronen","raw_affiliation_strings":["Intel Corporation, Santa Clara, CA"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Intel Corporation, Santa Clara, CA","institution_ids":["https://openalex.org/I1343180700"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5018507883","display_name":"Ronak Singhal","orcid":null},"institutions":[{"id":"https://openalex.org/I1343180700","display_name":"Intel (United States)","ror":"https://ror.org/01ek73717","country_code":"US","type":"company","lineage":["https://openalex.org/I1343180700"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Ronak Singhal","raw_affiliation_strings":["Intel Corporation, Santa Clara, CA"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Intel Corporation, Santa Clara, CA","institution_ids":["https://openalex.org/I1343180700"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5016738770","display_name":"Richard Vuduc","orcid":"https://orcid.org/0000-0003-2178-138X"},"institutions":[{"id":"https://openalex.org/I130701444","display_name":"Georgia Institute of Technology","ror":"https://ror.org/01zkghx44","country_code":"US","type":"education","lineage":["https://openalex.org/I130701444"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Richard Vuduc","raw_affiliation_strings":["Georgia Institute of Technology, Atlanta, GA"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Georgia Institute of Technology, Atlanta, GA","institution_ids":["https://openalex.org/I130701444"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5032238070","display_name":"Pradeep Dubey","orcid":"https://orcid.org/0000-0001-5853-0619"},"institutions":[{"id":"https://openalex.org/I1343180700","display_name":"Intel (United States)","ror":"https://ror.org/01ek73717","country_code":"US","type":"company","lineage":["https://openalex.org/I1343180700"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Pradeep Dubey","raw_affiliation_strings":["Intel Corporation, Santa Clara, CA"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Intel Corporation, Santa Clara, CA","institution_ids":["https://openalex.org/I1343180700"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":2,"corresponding_author_ids":[],"corresponding_institution_ids":[],"apc_list":null,"apc_paid":null,"fwci":null,"has_fulltext":false,"cited_by_count":7,"citation_normalized_percentile":null,"cited_by_percentile_year":null,"biblio":{"volume":null,"issue":null,"first_page":"493","last_page":"504"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10054","display_name":"Parallel Computing and Optimization Techniques","score":0.9990000128746033,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10054","display_name":"Parallel Computing and Optimization Techniques","score":0.9990000128746033,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11044","display_name":"Particle Detector Development and Performance","score":0.9955999851226807,"subfield":{"id":"https://openalex.org/subfields/3106","display_name":"Nuclear and High Energy Physics"},"field":{"id":"https://openalex.org/fields/31","display_name":"Physics and Astronomy"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10829","display_name":"Interconnection Networks and Systems","score":0.9940999746322632,"subfield":{"id":"https://openalex.org/subfields/1705","display_name":"Computer Networks and Communications"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.5363767147064209},{"id":"https://openalex.org/keywords/efficient-energy-use","display_name":"Efficient energy use","score":0.49530044198036194},{"id":"https://openalex.org/keywords/electrical-engineering","display_name":"Electrical engineering","score":0.16513463854789734},{"id":"https://openalex.org/keywords/engineering","display_name":"Engineering","score":0.1120358407497406}],"concepts":[{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.5363767147064209},{"id":"https://openalex.org/C2742236","wikidata":"https://www.wikidata.org/wiki/Q924713","display_name":"Efficient energy use","level":2,"score":0.49530044198036194},{"id":"https://openalex.org/C119599485","wikidata":"https://www.wikidata.org/wiki/Q43035","display_name":"Electrical engineering","level":1,"score":0.16513463854789734},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.1120358407497406}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/isca.2014.6853219","is_oa":false,"landing_page_url":"https://doi.org/10.1109/isca.2014.6853219","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2014 ACM/IEEE 41st International Symposium on Computer Architecture (ISCA)","raw_type":"proceedings-article"}],"best_oa_location":null,"sustainable_development_goals":[{"display_name":"Affordable and clean energy","score":0.9100000262260437,"id":"https://metadata.un.org/sdg/7"}],"awards":[],"funders":[{"id":"https://openalex.org/F4320306084","display_name":"U.S. Department of Energy","ror":"https://ror.org/01bj3aw27"}],"has_content":{"pdf":false,"grobid_xml":false},"content_urls":null,"referenced_works_count":23,"referenced_works":["https://openalex.org/W1468576370","https://openalex.org/W1598283091","https://openalex.org/W1963867219","https://openalex.org/W1976052065","https://openalex.org/W2006312753","https://openalex.org/W2043907785","https://openalex.org/W2095605665","https://openalex.org/W2102604868","https://openalex.org/W2105853930","https://openalex.org/W2120951490","https://openalex.org/W2145692097","https://openalex.org/W2146878726","https://openalex.org/W2149611663","https://openalex.org/W2155470578","https://openalex.org/W2170909854","https://openalex.org/W2296008058","https://openalex.org/W3140903683","https://openalex.org/W4231959939","https://openalex.org/W4236302577","https://openalex.org/W6628746399","https://openalex.org/W6651700774","https://openalex.org/W6675548246","https://openalex.org/W6792941224"],"related_works":["https://openalex.org/W4391375266","https://openalex.org/W2748952813","https://openalex.org/W2390279801","https://openalex.org/W2358668433","https://openalex.org/W4396701345","https://openalex.org/W2376932109","https://openalex.org/W2001405890","https://openalex.org/W4396696052","https://openalex.org/W4402327032","https://openalex.org/W2382290278"],"abstract_inverted_index":{"Traditionally,":[0],"architectural":[1,160],"innovations":[2,161],"designed":[3],"to":[4,40,45,60,101,138,197],"boost":[5],"single-threaded":[6,47],"performance":[7,48,190],"incur":[8],"overhead":[9],"costs":[10],"which":[11,76],"significantly":[12],"increase":[13,20,32,126],"power":[14,22,205],"consumption.":[15,35],"In":[16],"many":[17],"cases":[18],"the":[19,24,61,70,79,83,90,96,108,118,125,132,136,139,174,198,211],"in":[21,26,29,33,86,127,147,182],"exceeds":[23],"improvement":[25,146],"performance,":[27,204],"resulting":[28,181],"a":[30,51,74,183],"net":[31],"energy":[34,55,99,148,192,207],"Thus,":[36],"it":[37],"is":[38,187],"reasonable":[39],"assume":[41],"that":[42,63,78,186],"modern":[43],"attempts":[44],"improve":[46],"will":[49],"have":[50,93],"negative":[52],"impact":[53,109],"on":[54],"efficiency.":[56],"This":[57,153],"has":[58],"led":[59],"belief":[62],"\u201cBig":[64,167],"Cores\u201d":[65,168],"are":[66],"inherently":[67],"inefficient.":[68],"To":[69],"contrary,":[71],"we":[72],"present":[73],"study":[75,115],"finds":[77,117],"increased":[80],"complexity":[81],"of":[82,89,110,131,158,177,200],"core":[84,184],"microarchitecture":[85,121,202],"recent":[87],"generations":[88],"Intel\u00aeCore\u2122":[91],"processor":[92],"reduced":[94],"both":[95,188],"time":[97],"and":[98,120,135,191,206],"required":[100],"run":[102],"various":[103],"workloads.":[104],"Moreover,":[105],"taking":[106],"out":[107],"process":[111],"technology":[112],"changes,":[113],"our":[114],"still":[116],"architecture":[119,185],"changes":[122],"-such":[123],"as":[124],"SIMD":[128],"width,":[129],"addition":[130],"frontend":[133],"caches,":[134],"enhancement":[137],"out-of-order":[140],"execution":[141],"engine-":[142],"account":[143],"for":[144,150],"1.2x":[145],"efficiency":[149,208],"these":[151],"processors.":[152],"paper":[154],"provides":[155],"real-world":[156],"examples":[157],"how":[159,201],"can":[162],"mitigate":[163],"inefficiencies":[164],"associated":[165],"with":[166],"-for":[169],"example,":[170],"micro-op":[171],"caches":[172],"obviate":[173],"costly":[175],"decode":[176],"complex":[178],"x86":[179],"instructions-":[180],"high":[189],"efficient.":[193],"It":[194],"also":[195],"contributes":[196],"understanding":[199],"affects":[203],"by":[209],"modeling":[210],"relationship":[212],"between":[213],"them.":[214]},"counts_by_year":[{"year":2025,"cited_by_count":1},{"year":2021,"cited_by_count":1},{"year":2018,"cited_by_count":3},{"year":2016,"cited_by_count":1},{"year":2015,"cited_by_count":1}],"updated_date":"2026-07-29T09:40:50.615796","created_date":"2025-10-10T00:00:00"}