{"id":"https://openalex.org/W4242272245","doi":"https://doi.org/10.1109/isca.2004.1310778","title":"From sequences of dependent instructions to functions : an approach for improving performance without ilp or speculation","display_name":"From sequences of dependent instructions to functions : an approach for improving performance without ilp or speculation","publication_year":2004,"publication_date":"2004-11-12","ids":{"openalex":"https://openalex.org/W4242272245","doi":"https://doi.org/10.1109/isca.2004.1310778"},"language":"en","primary_location":{"id":"doi:10.1109/isca.2004.1310778","is_oa":false,"landing_page_url":"https://doi.org/10.1109/isca.2004.1310778","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"Proceedings. 31st Annual International Symposium on Computer Architecture, 2004.","raw_type":"proceedings-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5018606289","display_name":"S. Yehia","orcid":null},"institutions":[{"id":"https://openalex.org/I277688954","display_name":"Universit\u00e9 Paris-Saclay","ror":"https://ror.org/03xjwb503","country_code":"FR","type":"education","lineage":["https://openalex.org/I277688954"]},{"id":"https://openalex.org/I102197404","display_name":"Universit\u00e9 Paris-Sud","ror":"https://ror.org/028rypz17","country_code":"FR","type":"education","lineage":["https://openalex.org/I102197404"]}],"countries":["FR"],"is_corresponding":true,"raw_author_name":"S. Yehia","raw_affiliation_strings":["University of Paris XI, France"],"affiliations":[{"raw_affiliation_string":"University of Paris XI, France","institution_ids":["https://openalex.org/I102197404","https://openalex.org/I277688954"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5029521109","display_name":"O. Temam","orcid":null},"institutions":[{"id":"https://openalex.org/I102197404","display_name":"Universit\u00e9 Paris-Sud","ror":"https://ror.org/028rypz17","country_code":"FR","type":"education","lineage":["https://openalex.org/I102197404"]},{"id":"https://openalex.org/I277688954","display_name":"Universit\u00e9 Paris-Saclay","ror":"https://ror.org/03xjwb503","country_code":"FR","type":"education","lineage":["https://openalex.org/I277688954"]}],"countries":["FR"],"is_corresponding":false,"raw_author_name":"O. Temam","raw_affiliation_strings":["University of Paris XI, France"],"affiliations":[{"raw_affiliation_string":"University of Paris XI, France","institution_ids":["https://openalex.org/I102197404","https://openalex.org/I277688954"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":2,"corresponding_author_ids":["https://openalex.org/A5018606289"],"corresponding_institution_ids":["https://openalex.org/I102197404","https://openalex.org/I277688954"],"apc_list":null,"apc_paid":null,"fwci":0.5282,"has_fulltext":false,"cited_by_count":8,"citation_normalized_percentile":{"value":0.69785313,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":{"min":89,"max":94},"biblio":{"volume":"cs tr 1996 1308","issue":null,"first_page":"238","last_page":"249"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10054","display_name":"Parallel Computing and Optimization Techniques","score":0.9995999932289124,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10054","display_name":"Parallel Computing and Optimization Techniques","score":0.9995999932289124,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T12808","display_name":"Ferroelectric and Negative Capacitance Devices","score":0.9986000061035156,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10502","display_name":"Advanced Memory and Neural Computing","score":0.9868000149726868,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.8379969596862793},{"id":"https://openalex.org/keywords/parallel-computing","display_name":"Parallel computing","score":0.7026700973510742},{"id":"https://openalex.org/keywords/redundancy","display_name":"Redundancy (engineering)","score":0.6830735206604004},{"id":"https://openalex.org/keywords/benchmark","display_name":"Benchmark (surveying)","score":0.5916342735290527},{"id":"https://openalex.org/keywords/exploit","display_name":"Exploit","score":0.5058069229125977},{"id":"https://openalex.org/keywords/latency","display_name":"Latency (audio)","score":0.4782620668411255},{"id":"https://openalex.org/keywords/combinational-logic","display_name":"Combinational logic","score":0.4388800859451294},{"id":"https://openalex.org/keywords/electronic-circuit","display_name":"Electronic circuit","score":0.4356764256954193},{"id":"https://openalex.org/keywords/adder","display_name":"Adder","score":0.4249486029148102},{"id":"https://openalex.org/keywords/computer-engineering","display_name":"Computer engineering","score":0.3549034595489502},{"id":"https://openalex.org/keywords/algorithm","display_name":"Algorithm","score":0.3463571071624756},{"id":"https://openalex.org/keywords/logic-gate","display_name":"Logic gate","score":0.2307504415512085}],"concepts":[{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.8379969596862793},{"id":"https://openalex.org/C173608175","wikidata":"https://www.wikidata.org/wiki/Q232661","display_name":"Parallel computing","level":1,"score":0.7026700973510742},{"id":"https://openalex.org/C152124472","wikidata":"https://www.wikidata.org/wiki/Q1204361","display_name":"Redundancy (engineering)","level":2,"score":0.6830735206604004},{"id":"https://openalex.org/C185798385","wikidata":"https://www.wikidata.org/wiki/Q1161707","display_name":"Benchmark (surveying)","level":2,"score":0.5916342735290527},{"id":"https://openalex.org/C165696696","wikidata":"https://www.wikidata.org/wiki/Q11287","display_name":"Exploit","level":2,"score":0.5058069229125977},{"id":"https://openalex.org/C82876162","wikidata":"https://www.wikidata.org/wiki/Q17096504","display_name":"Latency (audio)","level":2,"score":0.4782620668411255},{"id":"https://openalex.org/C81409106","wikidata":"https://www.wikidata.org/wiki/Q76505","display_name":"Combinational logic","level":3,"score":0.4388800859451294},{"id":"https://openalex.org/C134146338","wikidata":"https://www.wikidata.org/wiki/Q1815901","display_name":"Electronic circuit","level":2,"score":0.4356764256954193},{"id":"https://openalex.org/C164620267","wikidata":"https://www.wikidata.org/wiki/Q376953","display_name":"Adder","level":3,"score":0.4249486029148102},{"id":"https://openalex.org/C113775141","wikidata":"https://www.wikidata.org/wiki/Q428691","display_name":"Computer engineering","level":1,"score":0.3549034595489502},{"id":"https://openalex.org/C11413529","wikidata":"https://www.wikidata.org/wiki/Q8366","display_name":"Algorithm","level":1,"score":0.3463571071624756},{"id":"https://openalex.org/C131017901","wikidata":"https://www.wikidata.org/wiki/Q170451","display_name":"Logic gate","level":2,"score":0.2307504415512085},{"id":"https://openalex.org/C38652104","wikidata":"https://www.wikidata.org/wiki/Q3510521","display_name":"Computer security","level":1,"score":0.0},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.0},{"id":"https://openalex.org/C76155785","wikidata":"https://www.wikidata.org/wiki/Q418","display_name":"Telecommunications","level":1,"score":0.0},{"id":"https://openalex.org/C13280743","wikidata":"https://www.wikidata.org/wiki/Q131089","display_name":"Geodesy","level":1,"score":0.0},{"id":"https://openalex.org/C111919701","wikidata":"https://www.wikidata.org/wiki/Q9135","display_name":"Operating system","level":1,"score":0.0},{"id":"https://openalex.org/C119599485","wikidata":"https://www.wikidata.org/wiki/Q43035","display_name":"Electrical engineering","level":1,"score":0.0},{"id":"https://openalex.org/C205649164","wikidata":"https://www.wikidata.org/wiki/Q1071","display_name":"Geography","level":0,"score":0.0}],"mesh":[],"locations_count":3,"locations":[{"id":"doi:10.1109/isca.2004.1310778","is_oa":false,"landing_page_url":"https://doi.org/10.1109/isca.2004.1310778","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"Proceedings. 31st Annual International Symposium on Computer Architecture, 2004.","raw_type":"proceedings-article"},{"id":"pmh:oai:CiteSeerX.psu:10.1.1.129.9988","is_oa":false,"landing_page_url":"http://citeseerx.ist.psu.edu/viewdoc/summary?doi=10.1.1.129.9988","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"submittedVersion","is_accepted":false,"is_published":false,"raw_source_name":"http://www.cse.unsw.edu.au/~cs4211/papers/isca04-yehia-collapsefu.pdf","raw_type":"text"},{"id":"pmh:oai:CiteSeerX.psu:10.1.1.514.7672","is_oa":false,"landing_page_url":"http://citeseerx.ist.psu.edu/viewdoc/summary?doi=10.1.1.514.7672","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"submittedVersion","is_accepted":false,"is_published":false,"raw_source_name":"http://samiyehia.free.fr/WebPage/Function_ISCA2004.pdf","raw_type":"text"}],"best_oa_location":null,"sustainable_development_goals":[],"awards":[],"funders":[],"has_content":{"pdf":false,"grobid_xml":false},"content_urls":null,"referenced_works_count":26,"referenced_works":["https://openalex.org/W1569032152","https://openalex.org/W1686420892","https://openalex.org/W1848358023","https://openalex.org/W1973127083","https://openalex.org/W2077157218","https://openalex.org/W2096121393","https://openalex.org/W2101285334","https://openalex.org/W2115294662","https://openalex.org/W2127609451","https://openalex.org/W2129192659","https://openalex.org/W2154554979","https://openalex.org/W2157373341","https://openalex.org/W2158376101","https://openalex.org/W2169996458","https://openalex.org/W3149144981","https://openalex.org/W4229745793","https://openalex.org/W4241608695","https://openalex.org/W4242861182","https://openalex.org/W4247211217","https://openalex.org/W4251862023","https://openalex.org/W4251929439","https://openalex.org/W4252466729","https://openalex.org/W6634019501","https://openalex.org/W6637151178","https://openalex.org/W6638955869","https://openalex.org/W6793222508"],"related_works":["https://openalex.org/W4390550886","https://openalex.org/W3217463396","https://openalex.org/W2128496560","https://openalex.org/W2095349217","https://openalex.org/W2126951255","https://openalex.org/W4248162147","https://openalex.org/W2052802431","https://openalex.org/W3208012256","https://openalex.org/W2027462780","https://openalex.org/W3114476551"],"abstract_inverted_index":{"In":[0],"this":[1,51,70],"article,":[2],"we":[3,74],"present":[4,46],"an":[5,47,76],"approach":[6,48],"for":[7],"improving":[8],"the":[9,62,67,98,105,120,123,132],"performance":[10,96,133],"of":[11,13,21,30,69,80,97,122,134],"sequences":[12,20,29],"dependent":[14],"instructions.":[15],"We":[16,45,65],"observe":[17],"that":[18,49,78],"many":[19],"instructions":[22],"can":[23,33],"be":[24,34],"interpreted":[25],"as":[26],"functions.":[27],"Unlike":[28],"instructions,":[31],"functions":[32],"translated":[35],"into":[36],"very":[37],"fast":[38],"but":[39,60],"exponentially":[40],"costly":[41],"two-level":[42],"combinational":[43],"circuits.":[44],"exploits":[50],"principle,":[52],"speeds":[53],"up":[54,127,146],"programs":[55,103],"thanks":[56],"to":[57,116,128,143,147],"circuit-level":[58],"parallelism/redundancy,":[59],"avoids":[61],"exponential":[63],"costs.":[64],"analyze":[66],"potential":[68],"approach,":[71],"and":[72,101,107,126,145],"then":[73],"propose":[75],"implementation":[77],"consists":[79],"a":[81,85],"superscalar":[82],"processor":[83],"with":[84,91],"large":[86],"specific":[87,92],"functional":[88,124],"unit":[89],"associated":[90],"back-end":[93],"transformations.":[94],"The":[95],"SpecInt2000":[99],"benchmarks":[100],"selected":[102],"from":[104,114,141],"Olden":[106],"MiBench":[108],"benchmark":[109],"suites":[110],"improves":[111,138],"on":[112,119,139],"average":[113,140],"2.4%":[115],"12%":[117],"depending":[118],"latency":[121],"units,":[125],"39.6%;":[129],"more":[130],"precisely,":[131],"optimized":[135],"code":[136],"sections":[137],"3.5%":[142],"19%,":[144],"49%.":[148]},"counts_by_year":[{"year":2016,"cited_by_count":1},{"year":2013,"cited_by_count":1},{"year":2012,"cited_by_count":1}],"updated_date":"2026-04-04T16:13:02.066488","created_date":"2025-10-10T00:00:00"}
