{"id":"https://openalex.org/W4247264372","doi":"https://doi.org/10.1109/isca.2004.1310764","title":"Single-ISA heterogeneous multi-core architectures for multithreaded workload performance","display_name":"Single-ISA heterogeneous multi-core architectures for multithreaded workload performance","publication_year":2004,"publication_date":"2004-11-12","ids":{"openalex":"https://openalex.org/W4247264372","doi":"https://doi.org/10.1109/isca.2004.1310764"},"language":"en","primary_location":{"id":"doi:10.1109/isca.2004.1310764","is_oa":false,"landing_page_url":"https://doi.org/10.1109/isca.2004.1310764","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"Proceedings. 31st Annual International Symposium on Computer Architecture, 2004.","raw_type":"proceedings-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5067547869","display_name":"Rakesh Kumar","orcid":"https://orcid.org/0000-0002-3290-2629"},"institutions":[{"id":"https://openalex.org/I36258959","display_name":"University of California, San Diego","ror":"https://ror.org/0168r3w48","country_code":"US","type":"education","lineage":["https://openalex.org/I36258959"]}],"countries":["US"],"is_corresponding":true,"raw_author_name":"R. Kumar","raw_affiliation_strings":["Department of Computer Science and Engineering, University of California, San Diego, La Jolla, CA, USA"],"affiliations":[{"raw_affiliation_string":"Department of Computer Science and Engineering, University of California, San Diego, La Jolla, CA, USA","institution_ids":["https://openalex.org/I36258959"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5065583627","display_name":"Dean M. Tullsen","orcid":"https://orcid.org/0000-0003-3174-9316"},"institutions":[{"id":"https://openalex.org/I36258959","display_name":"University of California, San Diego","ror":"https://ror.org/0168r3w48","country_code":"US","type":"education","lineage":["https://openalex.org/I36258959"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"D.M. Tullsen","raw_affiliation_strings":["Department of Computer Science and Engineering, University of California, San Diego, La Jolla, CA, USA"],"affiliations":[{"raw_affiliation_string":"Department of Computer Science and Engineering, University of California, San Diego, La Jolla, CA, USA","institution_ids":["https://openalex.org/I36258959"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5011491987","display_name":"Parthasarathy Ranganathan","orcid":"https://orcid.org/0000-0002-9751-5902"},"institutions":[{"id":"https://openalex.org/I1324840837","display_name":"Hewlett-Packard (United States)","ror":"https://ror.org/059rn9488","country_code":"US","type":"company","lineage":["https://openalex.org/I1324840837"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"P. Ranganathan","raw_affiliation_strings":["Hewlett Packard Laboratories, Palo Alto, CA, USA"],"affiliations":[{"raw_affiliation_string":"Hewlett Packard Laboratories, Palo Alto, CA, USA","institution_ids":["https://openalex.org/I1324840837"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5050207942","display_name":"Norman P. Jouppi","orcid":"https://orcid.org/0000-0003-1765-1929"},"institutions":[{"id":"https://openalex.org/I1324840837","display_name":"Hewlett-Packard (United States)","ror":"https://ror.org/059rn9488","country_code":"US","type":"company","lineage":["https://openalex.org/I1324840837"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"N.P. Jouppi","raw_affiliation_strings":["Hewlett Packard Laboratories, Palo Alto, CA, USA"],"affiliations":[{"raw_affiliation_string":"Hewlett Packard Laboratories, Palo Alto, CA, USA","institution_ids":["https://openalex.org/I1324840837"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5046909383","display_name":"Keith I. Farkas","orcid":null},"institutions":[{"id":"https://openalex.org/I1324840837","display_name":"Hewlett-Packard (United States)","ror":"https://ror.org/059rn9488","country_code":"US","type":"company","lineage":["https://openalex.org/I1324840837"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"K.I. Farkas","raw_affiliation_strings":["Hewlett Packard Laboratories, Palo Alto, CA, USA"],"affiliations":[{"raw_affiliation_string":"Hewlett Packard Laboratories, Palo Alto, CA, USA","institution_ids":["https://openalex.org/I1324840837"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":5,"corresponding_author_ids":["https://openalex.org/A5067547869"],"corresponding_institution_ids":["https://openalex.org/I36258959"],"apc_list":null,"apc_paid":null,"fwci":6.0069,"has_fulltext":false,"cited_by_count":250,"citation_normalized_percentile":{"value":0.96667924,"is_in_top_1_percent":false,"is_in_top_10_percent":true},"cited_by_percentile_year":{"min":89,"max":100},"biblio":{"volume":null,"issue":null,"first_page":"64","last_page":"75"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10054","display_name":"Parallel Computing and Optimization Techniques","score":1.0,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10054","display_name":"Parallel Computing and Optimization Techniques","score":1.0,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10715","display_name":"Distributed and Parallel Computing Systems","score":0.9997000098228455,"subfield":{"id":"https://openalex.org/subfields/1705","display_name":"Computer Networks and Communications"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10101","display_name":"Cloud Computing and Resource Management","score":0.9991000294685364,"subfield":{"id":"https://openalex.org/subfields/1710","display_name":"Information Systems"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.8425135612487793},{"id":"https://openalex.org/keywords/parallel-computing","display_name":"Parallel computing","score":0.7670695185661316},{"id":"https://openalex.org/keywords/multithreading","display_name":"Multithreading","score":0.7521749138832092},{"id":"https://openalex.org/keywords/thread","display_name":"Thread (computing)","score":0.7509884834289551},{"id":"https://openalex.org/keywords/multiprocessing","display_name":"Multiprocessing","score":0.6487104892730713},{"id":"https://openalex.org/keywords/simultaneous-multithreading","display_name":"Simultaneous multithreading","score":0.6372889280319214},{"id":"https://openalex.org/keywords/task-parallelism","display_name":"Task parallelism","score":0.6229085922241211},{"id":"https://openalex.org/keywords/multi-core-processor","display_name":"Multi-core processor","score":0.6193941831588745},{"id":"https://openalex.org/keywords/architecture","display_name":"Architecture","score":0.5903242230415344},{"id":"https://openalex.org/keywords/speedup","display_name":"Speedup","score":0.584598183631897},{"id":"https://openalex.org/keywords/workload","display_name":"Workload","score":0.5521308183670044},{"id":"https://openalex.org/keywords/instruction-set","display_name":"Instruction set","score":0.4840390086174011},{"id":"https://openalex.org/keywords/symmetric-multiprocessor-system","display_name":"Symmetric multiprocessor system","score":0.4790702760219574},{"id":"https://openalex.org/keywords/computer-architecture","display_name":"Computer architecture","score":0.46971291303634644},{"id":"https://openalex.org/keywords/performance-improvement","display_name":"Performance improvement","score":0.4532814621925354},{"id":"https://openalex.org/keywords/distributed-computing","display_name":"Distributed computing","score":0.3606407642364502},{"id":"https://openalex.org/keywords/parallelism","display_name":"Parallelism (grammar)","score":0.3394894599914551},{"id":"https://openalex.org/keywords/operating-system","display_name":"Operating system","score":0.1459207534790039}],"concepts":[{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.8425135612487793},{"id":"https://openalex.org/C173608175","wikidata":"https://www.wikidata.org/wiki/Q232661","display_name":"Parallel computing","level":1,"score":0.7670695185661316},{"id":"https://openalex.org/C201410400","wikidata":"https://www.wikidata.org/wiki/Q1064412","display_name":"Multithreading","level":3,"score":0.7521749138832092},{"id":"https://openalex.org/C138101251","wikidata":"https://www.wikidata.org/wiki/Q213092","display_name":"Thread (computing)","level":2,"score":0.7509884834289551},{"id":"https://openalex.org/C4822641","wikidata":"https://www.wikidata.org/wiki/Q846651","display_name":"Multiprocessing","level":2,"score":0.6487104892730713},{"id":"https://openalex.org/C85717602","wikidata":"https://www.wikidata.org/wiki/Q82178","display_name":"Simultaneous multithreading","level":4,"score":0.6372889280319214},{"id":"https://openalex.org/C42992933","wikidata":"https://www.wikidata.org/wiki/Q691169","display_name":"Task parallelism","level":3,"score":0.6229085922241211},{"id":"https://openalex.org/C78766204","wikidata":"https://www.wikidata.org/wiki/Q555032","display_name":"Multi-core processor","level":2,"score":0.6193941831588745},{"id":"https://openalex.org/C123657996","wikidata":"https://www.wikidata.org/wiki/Q12271","display_name":"Architecture","level":2,"score":0.5903242230415344},{"id":"https://openalex.org/C68339613","wikidata":"https://www.wikidata.org/wiki/Q1549489","display_name":"Speedup","level":2,"score":0.584598183631897},{"id":"https://openalex.org/C2778476105","wikidata":"https://www.wikidata.org/wiki/Q628539","display_name":"Workload","level":2,"score":0.5521308183670044},{"id":"https://openalex.org/C202491316","wikidata":"https://www.wikidata.org/wiki/Q272683","display_name":"Instruction set","level":2,"score":0.4840390086174011},{"id":"https://openalex.org/C172430144","wikidata":"https://www.wikidata.org/wiki/Q17111997","display_name":"Symmetric multiprocessor system","level":2,"score":0.4790702760219574},{"id":"https://openalex.org/C118524514","wikidata":"https://www.wikidata.org/wiki/Q173212","display_name":"Computer architecture","level":1,"score":0.46971291303634644},{"id":"https://openalex.org/C2778915421","wikidata":"https://www.wikidata.org/wiki/Q3643177","display_name":"Performance improvement","level":2,"score":0.4532814621925354},{"id":"https://openalex.org/C120314980","wikidata":"https://www.wikidata.org/wiki/Q180634","display_name":"Distributed computing","level":1,"score":0.3606407642364502},{"id":"https://openalex.org/C2781172179","wikidata":"https://www.wikidata.org/wiki/Q853109","display_name":"Parallelism (grammar)","level":2,"score":0.3394894599914551},{"id":"https://openalex.org/C111919701","wikidata":"https://www.wikidata.org/wiki/Q9135","display_name":"Operating system","level":1,"score":0.1459207534790039},{"id":"https://openalex.org/C21547014","wikidata":"https://www.wikidata.org/wiki/Q1423657","display_name":"Operations management","level":1,"score":0.0},{"id":"https://openalex.org/C162324750","wikidata":"https://www.wikidata.org/wiki/Q8134","display_name":"Economics","level":0,"score":0.0},{"id":"https://openalex.org/C153349607","wikidata":"https://www.wikidata.org/wiki/Q36649","display_name":"Visual arts","level":1,"score":0.0},{"id":"https://openalex.org/C142362112","wikidata":"https://www.wikidata.org/wiki/Q735","display_name":"Art","level":0,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/isca.2004.1310764","is_oa":false,"landing_page_url":"https://doi.org/10.1109/isca.2004.1310764","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"Proceedings. 31st Annual International Symposium on Computer Architecture, 2004.","raw_type":"proceedings-article"}],"best_oa_location":null,"sustainable_development_goals":[{"display_name":"Industry, innovation and infrastructure","score":0.49000000953674316,"id":"https://metadata.un.org/sdg/9"}],"awards":[{"id":"https://openalex.org/G848032724","display_name":null,"funder_award_id":"Science","funder_id":"https://openalex.org/F4320306076","funder_display_name":"National Science Foundation"},{"id":"https://openalex.org/G8584723430","display_name":"Critical Path Computing","funder_award_id":"0105743","funder_id":"https://openalex.org/F4320306076","funder_display_name":"National Science Foundation"}],"funders":[{"id":"https://openalex.org/F4320306076","display_name":"National Science Foundation","ror":"https://ror.org/021nxhr62"},{"id":"https://openalex.org/F4320306087","display_name":"Semiconductor Research Corporation","ror":"https://ror.org/047z4n946"}],"has_content":{"grobid_xml":false,"pdf":false},"content_urls":null,"referenced_works_count":22,"referenced_works":["https://openalex.org/W1555915743","https://openalex.org/W1559060679","https://openalex.org/W1582042732","https://openalex.org/W1958965543","https://openalex.org/W1971851724","https://openalex.org/W1986465830","https://openalex.org/W2025516544","https://openalex.org/W2056576290","https://openalex.org/W2118532220","https://openalex.org/W2125754912","https://openalex.org/W2129192659","https://openalex.org/W2132729131","https://openalex.org/W2148041475","https://openalex.org/W2158745536","https://openalex.org/W2159117078","https://openalex.org/W3142147837","https://openalex.org/W3148484433","https://openalex.org/W4235861380","https://openalex.org/W4238816702","https://openalex.org/W4250692521","https://openalex.org/W6633310126","https://openalex.org/W6793277613"],"related_works":["https://openalex.org/W2169040626","https://openalex.org/W2149156503","https://openalex.org/W2082701182","https://openalex.org/W580168354","https://openalex.org/W2003933101","https://openalex.org/W2083535177","https://openalex.org/W4236721623","https://openalex.org/W2385581534","https://openalex.org/W2042008201","https://openalex.org/W2010311448"],"abstract_inverted_index":{"A":[0],"single-ISA":[1],"heterogeneous":[2,114,123],"multi-core":[3],"architecture":[4,23,57,124,131],"is":[5,72,80],"a":[6,34,47,59,148],"chip":[7,36],"multiprocessor":[8],"composed":[9],"of":[10,12,46,56,61],"cores":[11],"varying":[13],"size,":[14],"performance,":[15],"and":[16,74,103,118,136],"complexity.":[17],"This":[18,54,82],"paper":[19,83],"demonstrates":[20],"that":[21,95],"this":[22],"can":[24],"provide":[25,96],"significantly":[26],"higher":[27],"performance":[28,68,98],"in":[29,88],"the":[30,43,51,106,128],"same":[31],"area":[32],"than":[33],"conventional":[35],"multiprocessor.":[37],"It":[38,110],"does":[39],"so":[40],"by":[41,132],"matching":[42],"various":[44,52],"jobs":[45],"diverse":[48],"workload":[49],"to":[50,134,144],"cores.":[53,121],"type":[55],"covers":[58],"spectrum":[60],"workloads":[62],"particularly":[63],"well,":[64],"providing":[65],"high":[66,75],"single-thread":[67],"when":[69,77],"thread":[70,78],"parallelism":[71,79],"low,":[73],"throughput":[76],"high.":[81],"examines":[84,111],"two":[85],"such":[86],"architectures":[87,115],"detail,":[89],"demonstrating":[90],"dynamic":[91],"core":[92,139],"assignment":[93,140],"policies":[94,112],"significant":[97],"gains":[99],"over":[100,147],"naive":[101,149],"assignment,":[102],"even":[104],"outperform":[105],"best":[107,138],"static":[108],"assignment.":[109],"for":[113],"both":[116],"with":[117],"without":[119],"multithreading":[120],"One":[122],"we":[125],"examine":[126],"outperforms":[127],"comparable-area":[129],"homogeneous":[130],"up":[133,143],"63%,":[135],"our":[137],"strategy":[141],"achieves":[142],"31%":[145],"speedup":[146],"policy.":[150]},"counts_by_year":[{"year":2025,"cited_by_count":4},{"year":2024,"cited_by_count":5},{"year":2023,"cited_by_count":1},{"year":2022,"cited_by_count":4},{"year":2021,"cited_by_count":2},{"year":2020,"cited_by_count":8},{"year":2019,"cited_by_count":5},{"year":2018,"cited_by_count":12},{"year":2017,"cited_by_count":12},{"year":2016,"cited_by_count":19},{"year":2015,"cited_by_count":22},{"year":2014,"cited_by_count":25},{"year":2013,"cited_by_count":24},{"year":2012,"cited_by_count":24}],"updated_date":"2026-03-18T14:38:29.013473","created_date":"2025-10-10T00:00:00"}
