{"id":"https://openalex.org/W4233499946","doi":"https://doi.org/10.1109/isca.2003.1207018","title":"A performance analysis of PIM, stream processing, and tiled processing on memory-intensive signal processing kernels","display_name":"A performance analysis of PIM, stream processing, and tiled processing on memory-intensive signal processing kernels","publication_year":2004,"publication_date":"2004-03-22","ids":{"openalex":"https://openalex.org/W4233499946","doi":"https://doi.org/10.1109/isca.2003.1207018"},"language":"en","primary_location":{"id":"doi:10.1109/isca.2003.1207018","is_oa":false,"landing_page_url":"https://doi.org/10.1109/isca.2003.1207018","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"30th Annual International Symposium on Computer Architecture, 2003. Proceedings.","raw_type":"proceedings-article"},"type":"conference-paper","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5030267675","display_name":"J. Suh","orcid":null},"institutions":[{"id":"https://openalex.org/I1174212","display_name":"University of Southern California","ror":"https://ror.org/03taz7m60","country_code":"US","type":"education","lineage":["https://openalex.org/I1174212"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"J. Suh","raw_affiliation_strings":["University of Southern California, Arlington, VA"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"University of Southern California, Arlington, VA","institution_ids":["https://openalex.org/I1174212"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5075143514","display_name":"E.-G. Kim","orcid":null},"institutions":[{"id":"https://openalex.org/I1174212","display_name":"University of Southern California","ror":"https://ror.org/03taz7m60","country_code":"US","type":"education","lineage":["https://openalex.org/I1174212"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"E.-G. Kim","raw_affiliation_strings":["University of Southern California, Arlington, VA"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"University of Southern California, Arlington, VA","institution_ids":["https://openalex.org/I1174212"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5036669685","display_name":"S.P. Crago","orcid":null},"institutions":[{"id":"https://openalex.org/I1174212","display_name":"University of Southern California","ror":"https://ror.org/03taz7m60","country_code":"US","type":"education","lineage":["https://openalex.org/I1174212"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"S.P. Crago","raw_affiliation_strings":["University of Southern California, Arlington, VA"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"University of Southern California, Arlington, VA","institution_ids":["https://openalex.org/I1174212"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5102032932","display_name":"Lakshmi Srinivasan","orcid":null},"institutions":[{"id":"https://openalex.org/I1174212","display_name":"University of Southern California","ror":"https://ror.org/03taz7m60","country_code":"US","type":"education","lineage":["https://openalex.org/I1174212"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Lakshmi Srinivasan","raw_affiliation_strings":["University of Southern California, Arlington, VA"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"University of Southern California, Arlington, VA","institution_ids":["https://openalex.org/I1174212"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5070359379","display_name":"M.C. French","orcid":null},"institutions":[{"id":"https://openalex.org/I1174212","display_name":"University of Southern California","ror":"https://ror.org/03taz7m60","country_code":"US","type":"education","lineage":["https://openalex.org/I1174212"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"M.C. French","raw_affiliation_strings":["University of Southern California, Arlington, VA"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"University of Southern California, Arlington, VA","institution_ids":["https://openalex.org/I1174212"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":1,"corresponding_author_ids":[],"corresponding_institution_ids":["https://openalex.org/I1174212"],"apc_list":null,"apc_paid":null,"fwci":null,"has_fulltext":false,"cited_by_count":1,"citation_normalized_percentile":null,"cited_by_percentile_year":null,"biblio":{"volume":null,"issue":null,"first_page":null,"last_page":null},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10054","display_name":"Parallel Computing and Optimization Techniques","score":1.0,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10054","display_name":"Parallel Computing and Optimization Techniques","score":1.0,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10829","display_name":"Interconnection Networks and Systems","score":0.9998000264167786,"subfield":{"id":"https://openalex.org/subfields/1705","display_name":"Computer Networks and Communications"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11181","display_name":"Advanced Data Storage Technologies","score":0.9994000196456909,"subfield":{"id":"https://openalex.org/subfields/1705","display_name":"Computer Networks and Communications"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.8051761388778687},{"id":"https://openalex.org/keywords/stream-processing","display_name":"Stream processing","score":0.6042395234107971},{"id":"https://openalex.org/keywords/signal-processing","display_name":"Signal processing","score":0.5733035206794739},{"id":"https://openalex.org/keywords/powerpc","display_name":"PowerPC","score":0.5586091876029968},{"id":"https://openalex.org/keywords/microprocessor","display_name":"Microprocessor","score":0.5114792585372925},{"id":"https://openalex.org/keywords/dram","display_name":"Dram","score":0.5062374472618103},{"id":"https://openalex.org/keywords/computer-architecture","display_name":"Computer architecture","score":0.49909186363220215},{"id":"https://openalex.org/keywords/latency","display_name":"Latency (audio)","score":0.4877534508705139},{"id":"https://openalex.org/keywords/microarchitecture","display_name":"Microarchitecture","score":0.4539669454097748},{"id":"https://openalex.org/keywords/memory-bandwidth","display_name":"Memory bandwidth","score":0.44790080189704895},{"id":"https://openalex.org/keywords/cache","display_name":"Cache","score":0.43718069791793823},{"id":"https://openalex.org/keywords/embedded-system","display_name":"Embedded system","score":0.4332401752471924},{"id":"https://openalex.org/keywords/parallel-computing","display_name":"Parallel computing","score":0.3947077989578247},{"id":"https://openalex.org/keywords/computer-hardware","display_name":"Computer hardware","score":0.3211023211479187},{"id":"https://openalex.org/keywords/digital-signal-processing","display_name":"Digital signal processing","score":0.2858169674873352},{"id":"https://openalex.org/keywords/operating-system","display_name":"Operating system","score":0.2203090488910675}],"concepts":[{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.8051761388778687},{"id":"https://openalex.org/C107027933","wikidata":"https://www.wikidata.org/wiki/Q2006448","display_name":"Stream processing","level":2,"score":0.6042395234107971},{"id":"https://openalex.org/C104267543","wikidata":"https://www.wikidata.org/wiki/Q208163","display_name":"Signal processing","level":3,"score":0.5733035206794739},{"id":"https://openalex.org/C56005371","wikidata":"https://www.wikidata.org/wiki/Q209860","display_name":"PowerPC","level":3,"score":0.5586091876029968},{"id":"https://openalex.org/C2780728072","wikidata":"https://www.wikidata.org/wiki/Q5297","display_name":"Microprocessor","level":2,"score":0.5114792585372925},{"id":"https://openalex.org/C7366592","wikidata":"https://www.wikidata.org/wiki/Q1255620","display_name":"Dram","level":2,"score":0.5062374472618103},{"id":"https://openalex.org/C118524514","wikidata":"https://www.wikidata.org/wiki/Q173212","display_name":"Computer architecture","level":1,"score":0.49909186363220215},{"id":"https://openalex.org/C82876162","wikidata":"https://www.wikidata.org/wiki/Q17096504","display_name":"Latency (audio)","level":2,"score":0.4877534508705139},{"id":"https://openalex.org/C107598950","wikidata":"https://www.wikidata.org/wiki/Q259864","display_name":"Microarchitecture","level":2,"score":0.4539669454097748},{"id":"https://openalex.org/C188045654","wikidata":"https://www.wikidata.org/wiki/Q17148339","display_name":"Memory bandwidth","level":2,"score":0.44790080189704895},{"id":"https://openalex.org/C115537543","wikidata":"https://www.wikidata.org/wiki/Q165596","display_name":"Cache","level":2,"score":0.43718069791793823},{"id":"https://openalex.org/C149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","level":1,"score":0.4332401752471924},{"id":"https://openalex.org/C173608175","wikidata":"https://www.wikidata.org/wiki/Q232661","display_name":"Parallel computing","level":1,"score":0.3947077989578247},{"id":"https://openalex.org/C9390403","wikidata":"https://www.wikidata.org/wiki/Q3966","display_name":"Computer hardware","level":1,"score":0.3211023211479187},{"id":"https://openalex.org/C84462506","wikidata":"https://www.wikidata.org/wiki/Q173142","display_name":"Digital signal processing","level":2,"score":0.2858169674873352},{"id":"https://openalex.org/C111919701","wikidata":"https://www.wikidata.org/wiki/Q9135","display_name":"Operating system","level":1,"score":0.2203090488910675},{"id":"https://openalex.org/C76155785","wikidata":"https://www.wikidata.org/wiki/Q418","display_name":"Telecommunications","level":1,"score":0.0},{"id":"https://openalex.org/C2777904410","wikidata":"https://www.wikidata.org/wiki/Q7397","display_name":"Software","level":2,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/isca.2003.1207018","is_oa":false,"landing_page_url":"https://doi.org/10.1109/isca.2003.1207018","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"30th Annual International Symposium on Computer Architecture, 2003. Proceedings.","raw_type":"proceedings-article"}],"best_oa_location":null,"sustainable_development_goals":[{"display_name":"Affordable and clean energy","id":"https://metadata.un.org/sdg/7","score":0.4000000059604645}],"awards":[],"funders":[],"has_content":{"pdf":false,"grobid_xml":false},"content_urls":null,"referenced_works_count":16,"referenced_works":["https://openalex.org/W1541688521","https://openalex.org/W1564901611","https://openalex.org/W1573851380","https://openalex.org/W1584049700","https://openalex.org/W2034147186","https://openalex.org/W2101960328","https://openalex.org/W2108824541","https://openalex.org/W2134408405","https://openalex.org/W2294693415","https://openalex.org/W2725179571","https://openalex.org/W4236485791","https://openalex.org/W4251809495","https://openalex.org/W6633127185","https://openalex.org/W6633954782","https://openalex.org/W6634283092","https://openalex.org/W6635080611"],"related_works":["https://openalex.org/W4248794057","https://openalex.org/W1995817803","https://openalex.org/W2055341571","https://openalex.org/W4246682059","https://openalex.org/W3217472777","https://openalex.org/W1541288632","https://openalex.org/W1589692760","https://openalex.org/W3145265989","https://openalex.org/W1992228968","https://openalex.org/W1981408476"],"abstract_inverted_index":{"Trends":[0],"in":[1,23],"microprocessors":[2],"of":[3,31,43,75,85,97],"increasing":[4,17,32],"die":[5],"size":[6],"and":[7,10,26,28,35,53,62,120,128],"clock":[8],"speed":[9],"decreasing":[11],"feature":[12],"sizes":[13,37],"have":[14,38],"fueled":[15],"rapidly":[16],"performance.":[18],"However,":[19],"the":[20,41,73,94,103],"limited":[21],"improvements":[22,116],"DRAM":[24],"latency":[25],"bandwidth":[27],"diminishing":[29],"returns":[30],"superscalar":[33],"ILP":[34],"cache":[36],"led":[39],"to":[40,64],"proposal":[42],"new":[44,112],"microprocessor":[45],"architectures":[46,80],"that":[47,77,110,121],"implement":[48,78],"processor-in-":[49],"memory,":[50],"stream":[51],"processing,":[52],"tiled":[54],"processing.":[55],"Each":[56],"architecture":[57,123],"is":[58],"typically":[59],"evaluated":[60],"separately":[61],"compared":[63,92],"a":[65,82,98],"baseline":[66],"architecture.":[67],"In":[68],"this":[69],"paper,":[70],"we":[71],"evaluate":[72],"performance":[74,96],"processors":[76,113],"these":[79,111],"on":[81,102],"common":[83],"set":[84],"signal":[86],"processing":[87],"kernels.The":[88],"implementation":[89],"results":[90,108],"are":[91],"with":[93,105],"measured":[95],"conventional":[99,118],"system":[100],"based":[101],"PowerPC":[104],"Altivec.":[106],"The":[107],"show":[109,114],"significant":[115],"over":[117],"systems":[119],"each":[122],"has":[124],"its":[125],"own":[126],"strengths":[127],"weaknesses.":[129]},"counts_by_year":[],"updated_date":"2026-07-14T23:27:15.235271","created_date":"2025-10-10T00:00:00"}