{"id":"https://openalex.org/W4396949288","doi":"https://doi.org/10.1109/irps48228.2024.10529429","title":"On the Severity of Self-Heating in FDSOI at Cryogenic Temperatures: In-depth Analysis from Transistors to Full Processor","display_name":"On the Severity of Self-Heating in FDSOI at Cryogenic Temperatures: In-depth Analysis from Transistors to Full Processor","publication_year":2024,"publication_date":"2024-04-14","ids":{"openalex":"https://openalex.org/W4396949288","doi":"https://doi.org/10.1109/irps48228.2024.10529429"},"language":"en","primary_location":{"id":"doi:10.1109/irps48228.2024.10529429","is_oa":false,"landing_page_url":"https://doi.org/10.1109/irps48228.2024.10529429","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2024 IEEE International Reliability Physics Symposium (IRPS)","raw_type":"proceedings-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5060039652","display_name":"Anirban Kar","orcid":"https://orcid.org/0000-0003-0727-6192"},"institutions":[{"id":"https://openalex.org/I62916508","display_name":"Technical University of Munich","ror":"https://ror.org/02kkvpp62","country_code":"DE","type":"education","lineage":["https://openalex.org/I62916508"]},{"id":"https://openalex.org/I94234084","display_name":"Indian Institute of Technology Kanpur","ror":"https://ror.org/05pjsgx75","country_code":"IN","type":"education","lineage":["https://openalex.org/I94234084"]}],"countries":["DE","IN"],"is_corresponding":true,"raw_author_name":"Anirban Kar","raw_affiliation_strings":["Munich Institute of Robotics and Machine Intelligence, Technical University of Munich,Chair of AI Processor Design,Munich,Germany","Chair of AI Processor Design, Munich Institute of Robotics and Machine Intelligence, Technical University of Munich, Munich, Germany","Indian Institute of Technology, Kanpur, India"],"affiliations":[{"raw_affiliation_string":"Munich Institute of Robotics and Machine Intelligence, Technical University of Munich,Chair of AI Processor Design,Munich,Germany","institution_ids":["https://openalex.org/I62916508"]},{"raw_affiliation_string":"Chair of AI Processor Design, Munich Institute of Robotics and Machine Intelligence, Technical University of Munich, Munich, Germany","institution_ids":["https://openalex.org/I62916508"]},{"raw_affiliation_string":"Indian Institute of Technology, Kanpur, India","institution_ids":["https://openalex.org/I94234084"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5083905801","display_name":"Florian Klemme","orcid":"https://orcid.org/0000-0002-0148-0523"},"institutions":[{"id":"https://openalex.org/I100066346","display_name":"University of Stuttgart","ror":"https://ror.org/04vnq7t77","country_code":"DE","type":"education","lineage":["https://openalex.org/I100066346"]}],"countries":["DE"],"is_corresponding":false,"raw_author_name":"Florian Klemme","raw_affiliation_strings":["University of Stuttgart,Semiconductor Test and Reliability,Germany","Semiconductor Test and Reliability, University of Stuttgart, Germany"],"affiliations":[{"raw_affiliation_string":"University of Stuttgart,Semiconductor Test and Reliability,Germany","institution_ids":["https://openalex.org/I100066346"]},{"raw_affiliation_string":"Semiconductor Test and Reliability, University of Stuttgart, Germany","institution_ids":["https://openalex.org/I100066346"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5077371510","display_name":"Yogesh Singh Chauhan","orcid":"https://orcid.org/0000-0002-3356-8917"},"institutions":[{"id":"https://openalex.org/I94234084","display_name":"Indian Institute of Technology Kanpur","ror":"https://ror.org/05pjsgx75","country_code":"IN","type":"education","lineage":["https://openalex.org/I94234084"]}],"countries":["IN"],"is_corresponding":false,"raw_author_name":"Yogesh Singh Chauhan","raw_affiliation_strings":["Indian Institute of Technology,Kanpur,India","Indian Institute of Technology, Kanpur, India"],"affiliations":[{"raw_affiliation_string":"Indian Institute of Technology,Kanpur,India","institution_ids":["https://openalex.org/I94234084"]},{"raw_affiliation_string":"Indian Institute of Technology, Kanpur, India","institution_ids":["https://openalex.org/I94234084"]}]},{"author_position":"last","author":{"id":null,"display_name":"Hussam Amrouch","orcid":null},"institutions":[{"id":"https://openalex.org/I100066346","display_name":"University of Stuttgart","ror":"https://ror.org/04vnq7t77","country_code":"DE","type":"education","lineage":["https://openalex.org/I100066346"]},{"id":"https://openalex.org/I62916508","display_name":"Technical University of Munich","ror":"https://ror.org/02kkvpp62","country_code":"DE","type":"education","lineage":["https://openalex.org/I62916508"]}],"countries":["DE"],"is_corresponding":false,"raw_author_name":"Hussam Amrouch","raw_affiliation_strings":["Munich Institute of Robotics and Machine Intelligence, Technical University of Munich,Chair of AI Processor Design,Munich,Germany","Chair of AI Processor Design, Munich Institute of Robotics and Machine Intelligence, Technical University of Munich, Munich, Germany","Semiconductor Test and Reliability, University of Stuttgart, Germany"],"affiliations":[{"raw_affiliation_string":"Munich Institute of Robotics and Machine Intelligence, Technical University of Munich,Chair of AI Processor Design,Munich,Germany","institution_ids":["https://openalex.org/I62916508"]},{"raw_affiliation_string":"Chair of AI Processor Design, Munich Institute of Robotics and Machine Intelligence, Technical University of Munich, Munich, Germany","institution_ids":["https://openalex.org/I62916508"]},{"raw_affiliation_string":"Semiconductor Test and Reliability, University of Stuttgart, Germany","institution_ids":["https://openalex.org/I100066346"]}]}],"institutions":[],"countries_distinct_count":2,"institutions_distinct_count":4,"corresponding_author_ids":["https://openalex.org/A5060039652"],"corresponding_institution_ids":["https://openalex.org/I62916508","https://openalex.org/I94234084"],"apc_list":null,"apc_paid":null,"fwci":1.0536,"has_fulltext":false,"cited_by_count":5,"citation_normalized_percentile":{"value":0.75976632,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":{"min":94,"max":97},"biblio":{"volume":null,"issue":null,"first_page":"1","last_page":"6"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10558","display_name":"Advancements in Semiconductor Devices and Circuit Design","score":1.0,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10558","display_name":"Advancements in Semiconductor Devices and Circuit Design","score":1.0,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10472","display_name":"Semiconductor materials and devices","score":0.9998000264167786,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10363","display_name":"Low-power high-performance VLSI design","score":0.9995999932289124,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/interfacing","display_name":"Interfacing","score":0.692561149597168},{"id":"https://openalex.org/keywords/transistor","display_name":"Transistor","score":0.6768971681594849},{"id":"https://openalex.org/keywords/cmos","display_name":"CMOS","score":0.5950601696968079},{"id":"https://openalex.org/keywords/electronic-circuit","display_name":"Electronic circuit","score":0.5780290365219116},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.504318118095398},{"id":"https://openalex.org/keywords/cryogenics","display_name":"Cryogenics","score":0.4823898375034332},{"id":"https://openalex.org/keywords/integrated-circuit","display_name":"Integrated circuit","score":0.4625626802444458},{"id":"https://openalex.org/keywords/silicon-on-insulator","display_name":"Silicon on insulator","score":0.45663148164749146},{"id":"https://openalex.org/keywords/logic-gate","display_name":"Logic gate","score":0.4207920432090759},{"id":"https://openalex.org/keywords/electronic-engineering","display_name":"Electronic engineering","score":0.3760337829589844},{"id":"https://openalex.org/keywords/electrical-engineering","display_name":"Electrical engineering","score":0.3732658922672272},{"id":"https://openalex.org/keywords/optoelectronics","display_name":"Optoelectronics","score":0.3481065034866333},{"id":"https://openalex.org/keywords/embedded-system","display_name":"Embedded system","score":0.3311716914176941},{"id":"https://openalex.org/keywords/materials-science","display_name":"Materials science","score":0.31622347235679626},{"id":"https://openalex.org/keywords/engineering","display_name":"Engineering","score":0.2444903552532196},{"id":"https://openalex.org/keywords/physics","display_name":"Physics","score":0.20713186264038086},{"id":"https://openalex.org/keywords/computer-hardware","display_name":"Computer hardware","score":0.20703738927841187},{"id":"https://openalex.org/keywords/silicon","display_name":"Silicon","score":0.1729549765586853}],"concepts":[{"id":"https://openalex.org/C2776303644","wikidata":"https://www.wikidata.org/wiki/Q1020499","display_name":"Interfacing","level":2,"score":0.692561149597168},{"id":"https://openalex.org/C172385210","wikidata":"https://www.wikidata.org/wiki/Q5339","display_name":"Transistor","level":3,"score":0.6768971681594849},{"id":"https://openalex.org/C46362747","wikidata":"https://www.wikidata.org/wiki/Q173431","display_name":"CMOS","level":2,"score":0.5950601696968079},{"id":"https://openalex.org/C134146338","wikidata":"https://www.wikidata.org/wiki/Q1815901","display_name":"Electronic circuit","level":2,"score":0.5780290365219116},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.504318118095398},{"id":"https://openalex.org/C179725390","wikidata":"https://www.wikidata.org/wiki/Q192116","display_name":"Cryogenics","level":2,"score":0.4823898375034332},{"id":"https://openalex.org/C530198007","wikidata":"https://www.wikidata.org/wiki/Q80831","display_name":"Integrated circuit","level":2,"score":0.4625626802444458},{"id":"https://openalex.org/C53143962","wikidata":"https://www.wikidata.org/wiki/Q1478788","display_name":"Silicon on insulator","level":3,"score":0.45663148164749146},{"id":"https://openalex.org/C131017901","wikidata":"https://www.wikidata.org/wiki/Q170451","display_name":"Logic gate","level":2,"score":0.4207920432090759},{"id":"https://openalex.org/C24326235","wikidata":"https://www.wikidata.org/wiki/Q126095","display_name":"Electronic engineering","level":1,"score":0.3760337829589844},{"id":"https://openalex.org/C119599485","wikidata":"https://www.wikidata.org/wiki/Q43035","display_name":"Electrical engineering","level":1,"score":0.3732658922672272},{"id":"https://openalex.org/C49040817","wikidata":"https://www.wikidata.org/wiki/Q193091","display_name":"Optoelectronics","level":1,"score":0.3481065034866333},{"id":"https://openalex.org/C149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","level":1,"score":0.3311716914176941},{"id":"https://openalex.org/C192562407","wikidata":"https://www.wikidata.org/wiki/Q228736","display_name":"Materials science","level":0,"score":0.31622347235679626},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.2444903552532196},{"id":"https://openalex.org/C121332964","wikidata":"https://www.wikidata.org/wiki/Q413","display_name":"Physics","level":0,"score":0.20713186264038086},{"id":"https://openalex.org/C9390403","wikidata":"https://www.wikidata.org/wiki/Q3966","display_name":"Computer hardware","level":1,"score":0.20703738927841187},{"id":"https://openalex.org/C544956773","wikidata":"https://www.wikidata.org/wiki/Q670","display_name":"Silicon","level":2,"score":0.1729549765586853},{"id":"https://openalex.org/C62520636","wikidata":"https://www.wikidata.org/wiki/Q944","display_name":"Quantum mechanics","level":1,"score":0.0},{"id":"https://openalex.org/C165801399","wikidata":"https://www.wikidata.org/wiki/Q25428","display_name":"Voltage","level":2,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/irps48228.2024.10529429","is_oa":false,"landing_page_url":"https://doi.org/10.1109/irps48228.2024.10529429","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2024 IEEE International Reliability Physics Symposium (IRPS)","raw_type":"proceedings-article"}],"best_oa_location":null,"sustainable_development_goals":[{"id":"https://metadata.un.org/sdg/7","display_name":"Affordable and clean energy","score":0.7400000095367432}],"awards":[],"funders":[{"id":"https://openalex.org/F4320325850","display_name":"Universit\u00e4t Stuttgart","ror":"https://ror.org/04vnq7t77"}],"has_content":{"grobid_xml":false,"pdf":false},"content_urls":null,"referenced_works_count":29,"referenced_works":["https://openalex.org/W2021433466","https://openalex.org/W2054324816","https://openalex.org/W2066500891","https://openalex.org/W2071691160","https://openalex.org/W2137147061","https://openalex.org/W2144688890","https://openalex.org/W2585884280","https://openalex.org/W2591285794","https://openalex.org/W2746656048","https://openalex.org/W2755984005","https://openalex.org/W2788656907","https://openalex.org/W2891246502","https://openalex.org/W2922461735","https://openalex.org/W2943308931","https://openalex.org/W2943843116","https://openalex.org/W2951126661","https://openalex.org/W2980181853","https://openalex.org/W2982169647","https://openalex.org/W3036985142","https://openalex.org/W3086979620","https://openalex.org/W3124658597","https://openalex.org/W3136787638","https://openalex.org/W3139090188","https://openalex.org/W3184465909","https://openalex.org/W4225541720","https://openalex.org/W4377099546","https://openalex.org/W4379116133","https://openalex.org/W4387042073","https://openalex.org/W6690302409"],"related_works":["https://openalex.org/W2136647108","https://openalex.org/W2350029007","https://openalex.org/W2152662857","https://openalex.org/W1965180958","https://openalex.org/W1973428399","https://openalex.org/W2182594080","https://openalex.org/W2484987020","https://openalex.org/W2017757432","https://openalex.org/W2047994557","https://openalex.org/W1980060958"],"abstract_inverted_index":{"Cryogenic":[0],"CMOS":[1],"devices":[2],"face":[3],"the":[4,24,28,36,40,44,48,61,71,81,87,102,134],"challenge":[5],"of":[6,30,63,73,137],"excessive":[7],"self-heating":[8],"(SH),":[9],"which":[10,65],"has":[11],"emerged":[12],"as":[13,126],"a":[14,144],"major":[15],"concern":[16],"for":[17],"quantum":[18],"computing":[19],"(QC).":[20],"This":[21],"work":[22],"is":[23],"first":[25,79],"to":[26,43,85,108,132],"reveal":[27],"impact":[29,72,136],"SH":[31,74,138],"in":[32],"cryogenic":[33,56,76,89],"circuits,":[34,77,142],"from":[35,55],"transistor":[37,91,104],"level":[38],"all":[39],"way":[41],"up":[42],"processor":[45,147],"level,":[46],"using":[47],"28nm":[49],"FDSOI":[50],"technology.":[51],"The":[52],"heat":[53],"generated":[54],"interfacing":[57],"circuits":[58],"severely":[59],"hinders":[60],"lifetime":[62],"qubits,":[64],"are":[66,106],"thermal":[67],"noise-sensitive.":[68],"To":[69],"investigate":[70],"on":[75,139],"we":[78],"extend":[80],"industry-standard":[82],"BSIM-IMG":[83],"model":[84,97],"incorporate":[86],"physics-based":[88],"temperature-specific":[90],"characteristics":[92],"and":[93,112,129],"then":[94],"validate":[95],"our":[96],"against":[98],"measured":[99],"data.":[100],"Then,":[101],"calibrated":[103],"models":[105],"employed":[107],"create":[109],"novel":[110],"cryogenic-aware":[111],"SH-aware":[113],"standard":[114],"cell":[115],"libraries.":[116],"We":[117],"deploy":[118],"those":[119],"libraries":[120],"within":[121],"industrial":[122],"EDA":[123],"tools,":[124],"such":[125],"logic":[127],"synthesis":[128],"timing":[130],"signoff,":[131],"unveil":[133],"overall":[135],"various":[140],"complex":[141],"including":[143],"full":[145],"RISC-V":[146],"core.":[148]},"counts_by_year":[{"year":2025,"cited_by_count":3},{"year":2024,"cited_by_count":2}],"updated_date":"2026-03-25T23:56:10.502304","created_date":"2025-10-10T00:00:00"}
