{"id":"https://openalex.org/W3157191380","doi":"https://doi.org/10.1109/irps46558.2021.9405130","title":"Conductance variations and their impact on the precision of in-memory computing with resistive switching memory (RRAM)","display_name":"Conductance variations and their impact on the precision of in-memory computing with resistive switching memory (RRAM)","publication_year":2021,"publication_date":"2021-03-01","ids":{"openalex":"https://openalex.org/W3157191380","doi":"https://doi.org/10.1109/irps46558.2021.9405130","mag":"3157191380"},"language":"en","primary_location":{"id":"doi:10.1109/irps46558.2021.9405130","is_oa":false,"landing_page_url":"https://doi.org/10.1109/irps46558.2021.9405130","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2021 IEEE International Reliability Physics Symposium (IRPS)","raw_type":"proceedings-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5082386666","display_name":"Giacomo Pedretti","orcid":"https://orcid.org/0000-0002-4501-8672"},"institutions":[{"id":"https://openalex.org/I93860229","display_name":"Politecnico di Milano","ror":"https://ror.org/01nffqt88","country_code":"IT","type":"education","lineage":["https://openalex.org/I93860229"]}],"countries":["IT"],"is_corresponding":true,"raw_author_name":"Giacomo Pedretti","raw_affiliation_strings":["Politecnico di Milano and IU.NET, Milano, Italy"],"affiliations":[{"raw_affiliation_string":"Politecnico di Milano and IU.NET, Milano, Italy","institution_ids":["https://openalex.org/I93860229"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5006552129","display_name":"Elia Ambrosi","orcid":"https://orcid.org/0000-0002-5418-7099"},"institutions":[{"id":"https://openalex.org/I93860229","display_name":"Politecnico di Milano","ror":"https://ror.org/01nffqt88","country_code":"IT","type":"education","lineage":["https://openalex.org/I93860229"]}],"countries":["IT"],"is_corresponding":false,"raw_author_name":"Elia Ambrosi","raw_affiliation_strings":["Politecnico di Milano and IU.NET, Milano, Italy"],"affiliations":[{"raw_affiliation_string":"Politecnico di Milano and IU.NET, Milano, Italy","institution_ids":["https://openalex.org/I93860229"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5054173368","display_name":"Daniele Ielmini","orcid":"https://orcid.org/0000-0002-1853-1614"},"institutions":[{"id":"https://openalex.org/I93860229","display_name":"Politecnico di Milano","ror":"https://ror.org/01nffqt88","country_code":"IT","type":"education","lineage":["https://openalex.org/I93860229"]}],"countries":["IT"],"is_corresponding":false,"raw_author_name":"Daniele Ielmini","raw_affiliation_strings":["Politecnico di Milano and IU.NET, Milano, Italy"],"affiliations":[{"raw_affiliation_string":"Politecnico di Milano and IU.NET, Milano, Italy","institution_ids":["https://openalex.org/I93860229"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":3,"corresponding_author_ids":["https://openalex.org/A5082386666"],"corresponding_institution_ids":["https://openalex.org/I93860229"],"apc_list":null,"apc_paid":null,"fwci":2.1057,"has_fulltext":false,"cited_by_count":29,"citation_normalized_percentile":{"value":0.87190164,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":{"min":93,"max":99},"biblio":{"volume":null,"issue":null,"first_page":"1","last_page":"8"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10502","display_name":"Advanced Memory and Neural Computing","score":1.0,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10502","display_name":"Advanced Memory and Neural Computing","score":1.0,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T12808","display_name":"Ferroelectric and Negative Capacitance Devices","score":0.9997000098228455,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11601","display_name":"Neuroscience and Neural Engineering","score":0.9911999702453613,"subfield":{"id":"https://openalex.org/subfields/2804","display_name":"Cellular and Molecular Neuroscience"},"field":{"id":"https://openalex.org/fields/28","display_name":"Neuroscience"},"domain":{"id":"https://openalex.org/domains/1","display_name":"Life Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/resistive-random-access-memory","display_name":"Resistive random-access memory","score":0.85610032081604},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.7156357765197754},{"id":"https://openalex.org/keywords/in-memory-processing","display_name":"In-Memory Processing","score":0.5563967227935791},{"id":"https://openalex.org/keywords/robustness","display_name":"Robustness (evolution)","score":0.510225772857666},{"id":"https://openalex.org/keywords/redundancy","display_name":"Redundancy (engineering)","score":0.4751967191696167},{"id":"https://openalex.org/keywords/binary-number","display_name":"Binary number","score":0.45939040184020996},{"id":"https://openalex.org/keywords/non-volatile-memory","display_name":"Non-volatile memory","score":0.4272046685218811},{"id":"https://openalex.org/keywords/static-random-access-memory","display_name":"Static random-access memory","score":0.4199671149253845},{"id":"https://openalex.org/keywords/electronic-engineering","display_name":"Electronic engineering","score":0.32847684621810913},{"id":"https://openalex.org/keywords/parallel-computing","display_name":"Parallel computing","score":0.32756704092025757},{"id":"https://openalex.org/keywords/computer-engineering","display_name":"Computer engineering","score":0.32321569323539734},{"id":"https://openalex.org/keywords/computer-hardware","display_name":"Computer hardware","score":0.2304776906967163},{"id":"https://openalex.org/keywords/arithmetic","display_name":"Arithmetic","score":0.14886868000030518},{"id":"https://openalex.org/keywords/electrical-engineering","display_name":"Electrical engineering","score":0.1342601776123047},{"id":"https://openalex.org/keywords/voltage","display_name":"Voltage","score":0.10339963436126709},{"id":"https://openalex.org/keywords/engineering","display_name":"Engineering","score":0.0927734375},{"id":"https://openalex.org/keywords/mathematics","display_name":"Mathematics","score":0.08412706851959229}],"concepts":[{"id":"https://openalex.org/C182019814","wikidata":"https://www.wikidata.org/wiki/Q1143830","display_name":"Resistive random-access memory","level":3,"score":0.85610032081604},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.7156357765197754},{"id":"https://openalex.org/C123593499","wikidata":"https://www.wikidata.org/wiki/Q6008583","display_name":"In-Memory Processing","level":5,"score":0.5563967227935791},{"id":"https://openalex.org/C63479239","wikidata":"https://www.wikidata.org/wiki/Q7353546","display_name":"Robustness (evolution)","level":3,"score":0.510225772857666},{"id":"https://openalex.org/C152124472","wikidata":"https://www.wikidata.org/wiki/Q1204361","display_name":"Redundancy (engineering)","level":2,"score":0.4751967191696167},{"id":"https://openalex.org/C48372109","wikidata":"https://www.wikidata.org/wiki/Q3913","display_name":"Binary number","level":2,"score":0.45939040184020996},{"id":"https://openalex.org/C177950962","wikidata":"https://www.wikidata.org/wiki/Q10997658","display_name":"Non-volatile memory","level":2,"score":0.4272046685218811},{"id":"https://openalex.org/C68043766","wikidata":"https://www.wikidata.org/wiki/Q267416","display_name":"Static random-access memory","level":2,"score":0.4199671149253845},{"id":"https://openalex.org/C24326235","wikidata":"https://www.wikidata.org/wiki/Q126095","display_name":"Electronic engineering","level":1,"score":0.32847684621810913},{"id":"https://openalex.org/C173608175","wikidata":"https://www.wikidata.org/wiki/Q232661","display_name":"Parallel computing","level":1,"score":0.32756704092025757},{"id":"https://openalex.org/C113775141","wikidata":"https://www.wikidata.org/wiki/Q428691","display_name":"Computer engineering","level":1,"score":0.32321569323539734},{"id":"https://openalex.org/C9390403","wikidata":"https://www.wikidata.org/wiki/Q3966","display_name":"Computer hardware","level":1,"score":0.2304776906967163},{"id":"https://openalex.org/C94375191","wikidata":"https://www.wikidata.org/wiki/Q11205","display_name":"Arithmetic","level":1,"score":0.14886868000030518},{"id":"https://openalex.org/C119599485","wikidata":"https://www.wikidata.org/wiki/Q43035","display_name":"Electrical engineering","level":1,"score":0.1342601776123047},{"id":"https://openalex.org/C165801399","wikidata":"https://www.wikidata.org/wiki/Q25428","display_name":"Voltage","level":2,"score":0.10339963436126709},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.0927734375},{"id":"https://openalex.org/C33923547","wikidata":"https://www.wikidata.org/wiki/Q395","display_name":"Mathematics","level":0,"score":0.08412706851959229},{"id":"https://openalex.org/C194222762","wikidata":"https://www.wikidata.org/wiki/Q114486","display_name":"Query by Example","level":4,"score":0.0},{"id":"https://openalex.org/C104317684","wikidata":"https://www.wikidata.org/wiki/Q7187","display_name":"Gene","level":2,"score":0.0},{"id":"https://openalex.org/C185592680","wikidata":"https://www.wikidata.org/wiki/Q2329","display_name":"Chemistry","level":0,"score":0.0},{"id":"https://openalex.org/C23123220","wikidata":"https://www.wikidata.org/wiki/Q816826","display_name":"Information retrieval","level":1,"score":0.0},{"id":"https://openalex.org/C55493867","wikidata":"https://www.wikidata.org/wiki/Q7094","display_name":"Biochemistry","level":1,"score":0.0},{"id":"https://openalex.org/C111919701","wikidata":"https://www.wikidata.org/wiki/Q9135","display_name":"Operating system","level":1,"score":0.0},{"id":"https://openalex.org/C97854310","wikidata":"https://www.wikidata.org/wiki/Q19541","display_name":"Search engine","level":2,"score":0.0},{"id":"https://openalex.org/C164120249","wikidata":"https://www.wikidata.org/wiki/Q995982","display_name":"Web search query","level":3,"score":0.0}],"mesh":[],"locations_count":2,"locations":[{"id":"doi:10.1109/irps46558.2021.9405130","is_oa":false,"landing_page_url":"https://doi.org/10.1109/irps46558.2021.9405130","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2021 IEEE International Reliability Physics Symposium (IRPS)","raw_type":"proceedings-article"},{"id":"pmh:oai:re.public.polimi.it:11311/1173656","is_oa":false,"landing_page_url":"http://hdl.handle.net/11311/1173656","pdf_url":null,"source":{"id":"https://openalex.org/S4306400312","display_name":"Virtual Community of Pathological Anatomy (University of Castilla La Mancha)","issn_l":null,"issn":null,"is_oa":false,"is_in_doaj":false,"is_core":false,"host_organization":"https://openalex.org/I79189158","host_organization_name":"University of Castilla-La Mancha","host_organization_lineage":["https://openalex.org/I79189158"],"host_organization_lineage_names":[],"type":"repository"},"license":null,"license_id":null,"version":"submittedVersion","is_accepted":false,"is_published":false,"raw_source_name":null,"raw_type":"info:eu-repo/semantics/conferenceObject"}],"best_oa_location":null,"sustainable_development_goals":[],"awards":[{"id":"https://openalex.org/G8584041158","display_name":null,"funder_award_id":"PGR01011","funder_id":"https://openalex.org/F4320323988","funder_display_name":"Ministero degli Affari Esteri e della Cooperazione Internazionale"}],"funders":[{"id":"https://openalex.org/F4320323988","display_name":"Ministero degli Affari Esteri e della Cooperazione Internazionale","ror":"https://ror.org/02jkm3388"}],"has_content":{"pdf":false,"grobid_xml":false},"content_urls":null,"referenced_works_count":33,"referenced_works":["https://openalex.org/W1570211401","https://openalex.org/W1908389539","https://openalex.org/W1964092902","https://openalex.org/W1968259326","https://openalex.org/W2039161462","https://openalex.org/W2045469471","https://openalex.org/W2099554009","https://openalex.org/W2104937488","https://openalex.org/W2307193480","https://openalex.org/W2398563917","https://openalex.org/W2518281301","https://openalex.org/W2585407525","https://openalex.org/W2769049661","https://openalex.org/W2775771159","https://openalex.org/W2778935320","https://openalex.org/W2782791387","https://openalex.org/W2785141883","https://openalex.org/W2803163155","https://openalex.org/W2807750997","https://openalex.org/W2913347375","https://openalex.org/W2915404303","https://openalex.org/W2970401101","https://openalex.org/W3004360755","https://openalex.org/W3004743841","https://openalex.org/W3005619596","https://openalex.org/W3006248624","https://openalex.org/W3015724253","https://openalex.org/W3028754834","https://openalex.org/W3036092616","https://openalex.org/W3098480967","https://openalex.org/W3099743262","https://openalex.org/W3157197680","https://openalex.org/W4243519499"],"related_works":["https://openalex.org/W2004526657","https://openalex.org/W2076211355","https://openalex.org/W2533127403","https://openalex.org/W2007070351","https://openalex.org/W2033811947","https://openalex.org/W2183989414","https://openalex.org/W1551399929","https://openalex.org/W2783549708","https://openalex.org/W2410132916","https://openalex.org/W989761102"],"abstract_inverted_index":{"This":[0],"work":[1],"addresses":[2],"the":[3,26,49,63,66,73,83,86,97,104,126,159,169],"reliability":[4],"of":[5,23,53,68,85,171],"RRAM,":[6],"with":[7,109,140],"a":[8,91,149],"focus":[9],"on":[10,16,114,168],"conductance":[11,105,143],"variation":[12],"and":[13,51,107,134,137,154,175],"its":[14],"impact":[15,113],"in-memory":[17],"computing":[18,45],"(IMC).":[19],"The":[20],"core":[21],"advantage":[22],"IMC":[24,93,115,160,163],"is":[25,60,96],"ability":[27],"to":[28,90,142],"execute":[29],"matrix-vector":[30],"multiplication":[31],"(MVM)":[32],"in":[33,36,62,72,78,125,158],"one":[34],"step":[35],"crosspoint":[37],"memory":[38,74,100,127,155],"arrays,":[39],"which":[40,80],"can":[41,76,81],"significantly":[42],"accelerate":[43],"data-intensive":[44],"tasks,":[46],"such":[47],"as":[48],"inference":[50],"training":[52],"deep":[54],"neural":[55],"networks":[56],"(DNNs).":[57],"Since":[58],"MVM":[59],"executed":[61],"analogue":[64],"domain,":[65],"imprecision":[67],"weight":[69],"parameters":[70],"stored":[71],"array":[75],"result":[77],"errors":[79],"affect":[82],"accuracy":[84,153],"computation.":[87],"By":[88],"referring":[89],"typical":[92],"device,":[94,128],"that":[95,148],"resistive":[98],"switching":[99],"(RRAM),":[101],"we":[102,118],"describe":[103],"variations":[106],"stability":[108],"time,":[110],"highlighting":[111],"their":[112,138],"accuracy.":[116],"Then":[117],"discuss":[119],"various":[120],"options":[121],"for":[122],"mapping":[123],"coefficients":[124],"including":[129],"multilevel,":[130],"binary,":[131],"unary,":[132],"redundancy":[133],"slicing":[135],"schemes,":[136],"robustness":[139],"respect":[141],"errors.":[144],"It":[145],"turns":[146],"out":[147],"tradeoff":[150],"exists":[151],"between":[152],"area":[156],"occupation":[157],"circuit.":[161],"Accurate":[162],"circuits":[164],"thus":[165],"must":[166],"rely":[167],"co-design":[170],"highly-precise,":[172],"highly-stable":[173],"devices":[174],"error":[176],"tolerant":[177],"mapping/computing":[178],"schemes.":[179]},"counts_by_year":[{"year":2026,"cited_by_count":1},{"year":2025,"cited_by_count":7},{"year":2024,"cited_by_count":8},{"year":2023,"cited_by_count":4},{"year":2022,"cited_by_count":7},{"year":2021,"cited_by_count":2}],"updated_date":"2025-11-06T03:46:38.306776","created_date":"2021-05-10T00:00:00"}
