{"id":"https://openalex.org/W1541682107","doi":"https://doi.org/10.1109/irps.2015.7112831","title":"MBU-Calc: A compact model for Multi-Bit Upset (MBU) SER estimation","display_name":"MBU-Calc: A compact model for Multi-Bit Upset (MBU) SER estimation","publication_year":2015,"publication_date":"2015-04-01","ids":{"openalex":"https://openalex.org/W1541682107","doi":"https://doi.org/10.1109/irps.2015.7112831","mag":"1541682107"},"language":"en","primary_location":{"id":"doi:10.1109/irps.2015.7112831","is_oa":false,"landing_page_url":"https://doi.org/10.1109/irps.2015.7112831","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2015 IEEE International Reliability Physics Symposium","raw_type":"proceedings-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5031436726","display_name":"Wei Wu","orcid":"https://orcid.org/0000-0003-0401-7363"},"institutions":[{"id":"https://openalex.org/I1343180700","display_name":"Intel (United States)","ror":"https://ror.org/01ek73717","country_code":"US","type":"company","lineage":["https://openalex.org/I1343180700"]}],"countries":["US"],"is_corresponding":true,"raw_author_name":"Wei Wu","raw_affiliation_strings":["Intel Labs","Intel Labs, Hillsboro 97124, USA"],"affiliations":[{"raw_affiliation_string":"Intel Labs","institution_ids":["https://openalex.org/I1343180700"]},{"raw_affiliation_string":"Intel Labs, Hillsboro 97124, USA","institution_ids":["https://openalex.org/I1343180700"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5022491215","display_name":"N. Seifert","orcid":"https://orcid.org/0000-0001-6780-9953"},"institutions":[],"countries":[],"is_corresponding":false,"raw_author_name":"Norbert Seifert","raw_affiliation_strings":["Logic Technology Development Quality and Reliability, Hillsboro, USA","Logic Technology Development Quality and Reliability, Hillsboro 97124, USA"],"affiliations":[{"raw_affiliation_string":"Logic Technology Development Quality and Reliability, Hillsboro, USA","institution_ids":[]},{"raw_affiliation_string":"Logic Technology Development Quality and Reliability, Hillsboro 97124, USA","institution_ids":[]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":2,"corresponding_author_ids":["https://openalex.org/A5031436726"],"corresponding_institution_ids":["https://openalex.org/I1343180700"],"apc_list":null,"apc_paid":null,"fwci":0.3946,"has_fulltext":false,"cited_by_count":6,"citation_normalized_percentile":{"value":0.6501725,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":{"min":89,"max":96},"biblio":{"volume":null,"issue":null,"first_page":"SE.2.1","last_page":"SE.2.6"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T11005","display_name":"Radiation Effects in Electronics","score":1.0,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T11005","display_name":"Radiation Effects in Electronics","score":1.0,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11032","display_name":"VLSI and Analog Circuit Testing","score":0.9998999834060669,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T14117","display_name":"Integrated Circuits and Semiconductor Failure Analysis","score":0.9998999834060669,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/upset","display_name":"Upset","score":0.8471603393554688},{"id":"https://openalex.org/keywords/single-event-upset","display_name":"Single event upset","score":0.5884665250778198},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.5869390964508057},{"id":"https://openalex.org/keywords/soft-error","display_name":"Soft error","score":0.4977124035358429},{"id":"https://openalex.org/keywords/static-random-access-memory","display_name":"Static random-access memory","score":0.4456072747707367},{"id":"https://openalex.org/keywords/electronic-engineering","display_name":"Electronic engineering","score":0.36342912912368774},{"id":"https://openalex.org/keywords/computer-hardware","display_name":"Computer hardware","score":0.2799924612045288},{"id":"https://openalex.org/keywords/engineering","display_name":"Engineering","score":0.18691661953926086}],"concepts":[{"id":"https://openalex.org/C2778002589","wikidata":"https://www.wikidata.org/wiki/Q2406791","display_name":"Upset","level":2,"score":0.8471603393554688},{"id":"https://openalex.org/C2780073065","wikidata":"https://www.wikidata.org/wiki/Q1476733","display_name":"Single event upset","level":3,"score":0.5884665250778198},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.5869390964508057},{"id":"https://openalex.org/C154474529","wikidata":"https://www.wikidata.org/wiki/Q1658917","display_name":"Soft error","level":2,"score":0.4977124035358429},{"id":"https://openalex.org/C68043766","wikidata":"https://www.wikidata.org/wiki/Q267416","display_name":"Static random-access memory","level":2,"score":0.4456072747707367},{"id":"https://openalex.org/C24326235","wikidata":"https://www.wikidata.org/wiki/Q126095","display_name":"Electronic engineering","level":1,"score":0.36342912912368774},{"id":"https://openalex.org/C9390403","wikidata":"https://www.wikidata.org/wiki/Q3966","display_name":"Computer hardware","level":1,"score":0.2799924612045288},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.18691661953926086},{"id":"https://openalex.org/C78519656","wikidata":"https://www.wikidata.org/wiki/Q101333","display_name":"Mechanical engineering","level":1,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/irps.2015.7112831","is_oa":false,"landing_page_url":"https://doi.org/10.1109/irps.2015.7112831","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2015 IEEE International Reliability Physics Symposium","raw_type":"proceedings-article"}],"best_oa_location":null,"sustainable_development_goals":[{"score":0.8199999928474426,"id":"https://metadata.un.org/sdg/16","display_name":"Peace, Justice and strong institutions"}],"awards":[],"funders":[],"has_content":{"pdf":false,"grobid_xml":false},"content_urls":null,"referenced_works_count":6,"referenced_works":["https://openalex.org/W2014215998","https://openalex.org/W2072397237","https://openalex.org/W2099569658","https://openalex.org/W2127178251","https://openalex.org/W2173097224","https://openalex.org/W3149410719"],"related_works":["https://openalex.org/W2102538861","https://openalex.org/W1523508240","https://openalex.org/W2622269177","https://openalex.org/W2086616086","https://openalex.org/W2978528242","https://openalex.org/W2065552285","https://openalex.org/W2165400042","https://openalex.org/W1500230652","https://openalex.org/W2051386096","https://openalex.org/W3208260600"],"abstract_inverted_index":{"Fast":[0],"and":[1,22,84],"accurate":[2,25,82],"Soft":[3],"Error":[4],"Rate":[5],"(SER)":[6],"estimation":[7],"is":[8,33,70,102],"an":[9],"important":[10],"system":[11],"design":[12],"aspect.":[13],"With":[14],"the":[15,28,71,99],"continued":[16],"scaling":[17],"of":[18,27,73,86,98],"SRAM":[19],"bit-cell":[20],"dimensions":[21],"cell":[23],"pitches,":[24],"modeling":[26],"Multi-Bit":[29],"Upset":[30,52],"(MBU)":[31],"component":[32],"becoming":[34],"increasingly":[35],"critical.":[36],"This":[37],"paper":[38],"introduces":[39],"MBU-Calc,":[40],"a":[41],"compact":[42],"model":[43,101],"for":[44],"MBU":[45,106],"SER":[46],"estimation.":[47],"The":[48,60,96],"tool":[49],"leverages":[50],"Multi-Cell":[51],"(MCU)":[53],"probabilities":[54],"obtained":[55],"through":[56],"direct":[57],"test-chip":[58],"measurements.":[59],"main":[61],"improvement":[62],"with":[63],"respect":[64],"to":[65],"prior":[66],"published":[67],"work":[68],"[2]":[69],"introduction":[72],"so-called":[74],"Line":[75],"Filling":[76],"(LF)":[77],"factors":[78],"which":[79],"enable":[80],"more":[81],"projection":[83],"bucketing":[85],"silent":[87],"data":[88],"corruption":[89],"(SDC)":[90],"versus":[91],"detected":[92],"unrecoverable":[93],"errors":[94],"(DUE).":[95],"accuracy":[97],"introduced":[100],"demonstrated":[103],"against":[104],"measured":[105],"results.":[107]},"counts_by_year":[{"year":2021,"cited_by_count":1},{"year":2020,"cited_by_count":1},{"year":2019,"cited_by_count":2},{"year":2017,"cited_by_count":1},{"year":2015,"cited_by_count":1}],"updated_date":"2025-11-06T03:46:38.306776","created_date":"2025-10-10T00:00:00"}
