{"id":"https://openalex.org/W1488749315","doi":"https://doi.org/10.1109/irps.2015.7112703","title":"Transistor reliability variation correlation to threshold voltage","display_name":"Transistor reliability variation correlation to threshold voltage","publication_year":2015,"publication_date":"2015-04-01","ids":{"openalex":"https://openalex.org/W1488749315","doi":"https://doi.org/10.1109/irps.2015.7112703","mag":"1488749315"},"language":"en","primary_location":{"id":"doi:10.1109/irps.2015.7112703","is_oa":false,"landing_page_url":"https://doi.org/10.1109/irps.2015.7112703","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2015 IEEE International Reliability Physics Symposium","raw_type":"proceedings-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5027832758","display_name":"S. Ramey","orcid":null},"institutions":[{"id":"https://openalex.org/I1343180700","display_name":"Intel (United States)","ror":"https://ror.org/01ek73717","country_code":"US","type":"company","lineage":["https://openalex.org/I1343180700"]},{"id":"https://openalex.org/I4210119464","display_name":"Quality and Reliability (Greece)","ror":"https://ror.org/02f8mda22","country_code":"GR","type":"company","lineage":["https://openalex.org/I4210119464"]}],"countries":["GR","US"],"is_corresponding":true,"raw_author_name":"S. Ramey","raw_affiliation_strings":["Logic Technology Development Quality, Reliability Intel Corp. Hillsboro, Oregon, U.S.A","Logic Technology Development Quality and Reliability, Intel Corp., Hillsboro, Oregon, U.S.A"],"affiliations":[{"raw_affiliation_string":"Logic Technology Development Quality, Reliability Intel Corp. Hillsboro, Oregon, U.S.A","institution_ids":["https://openalex.org/I4210119464","https://openalex.org/I1343180700"]},{"raw_affiliation_string":"Logic Technology Development Quality and Reliability, Intel Corp., Hillsboro, Oregon, U.S.A","institution_ids":["https://openalex.org/I4210119464","https://openalex.org/I1343180700"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5003409489","display_name":"Manisha Chahal","orcid":"https://orcid.org/0000-0003-4727-0561"},"institutions":[{"id":"https://openalex.org/I1343180700","display_name":"Intel (United States)","ror":"https://ror.org/01ek73717","country_code":"US","type":"company","lineage":["https://openalex.org/I1343180700"]},{"id":"https://openalex.org/I4210119464","display_name":"Quality and Reliability (Greece)","ror":"https://ror.org/02f8mda22","country_code":"GR","type":"company","lineage":["https://openalex.org/I4210119464"]}],"countries":["GR","US"],"is_corresponding":false,"raw_author_name":"M. Chahal","raw_affiliation_strings":["Logic Technology Development Quality, Reliability Intel Corp. Hillsboro, Oregon, U.S.A","Logic Technology Development Quality and Reliability, Intel Corp., Hillsboro, Oregon, U.S.A"],"affiliations":[{"raw_affiliation_string":"Logic Technology Development Quality, Reliability Intel Corp. Hillsboro, Oregon, U.S.A","institution_ids":["https://openalex.org/I4210119464","https://openalex.org/I1343180700"]},{"raw_affiliation_string":"Logic Technology Development Quality and Reliability, Intel Corp., Hillsboro, Oregon, U.S.A","institution_ids":["https://openalex.org/I4210119464","https://openalex.org/I1343180700"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5112779576","display_name":"P. Nayak","orcid":null},"institutions":[{"id":"https://openalex.org/I1343180700","display_name":"Intel (United States)","ror":"https://ror.org/01ek73717","country_code":"US","type":"company","lineage":["https://openalex.org/I1343180700"]},{"id":"https://openalex.org/I4210119464","display_name":"Quality and Reliability (Greece)","ror":"https://ror.org/02f8mda22","country_code":"GR","type":"company","lineage":["https://openalex.org/I4210119464"]}],"countries":["GR","US"],"is_corresponding":false,"raw_author_name":"P. Nayak","raw_affiliation_strings":["Logic Technology Development Quality, Reliability Intel Corp. Hillsboro, Oregon, U.S.A","Logic Technology Development Quality and Reliability, Intel Corp., Hillsboro, Oregon, U.S.A"],"affiliations":[{"raw_affiliation_string":"Logic Technology Development Quality, Reliability Intel Corp. Hillsboro, Oregon, U.S.A","institution_ids":["https://openalex.org/I4210119464","https://openalex.org/I1343180700"]},{"raw_affiliation_string":"Logic Technology Development Quality and Reliability, Intel Corp., Hillsboro, Oregon, U.S.A","institution_ids":["https://openalex.org/I4210119464","https://openalex.org/I1343180700"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5079033229","display_name":"S. Novak","orcid":null},"institutions":[{"id":"https://openalex.org/I1343180700","display_name":"Intel (United States)","ror":"https://ror.org/01ek73717","country_code":"US","type":"company","lineage":["https://openalex.org/I1343180700"]},{"id":"https://openalex.org/I4210119464","display_name":"Quality and Reliability (Greece)","ror":"https://ror.org/02f8mda22","country_code":"GR","type":"company","lineage":["https://openalex.org/I4210119464"]}],"countries":["GR","US"],"is_corresponding":false,"raw_author_name":"S. Novak","raw_affiliation_strings":["Logic Technology Development Quality, Reliability Intel Corp. Hillsboro, Oregon, U.S.A","Logic Technology Development Quality and Reliability, Intel Corp., Hillsboro, Oregon, U.S.A"],"affiliations":[{"raw_affiliation_string":"Logic Technology Development Quality, Reliability Intel Corp. Hillsboro, Oregon, U.S.A","institution_ids":["https://openalex.org/I4210119464","https://openalex.org/I1343180700"]},{"raw_affiliation_string":"Logic Technology Development Quality and Reliability, Intel Corp., Hillsboro, Oregon, U.S.A","institution_ids":["https://openalex.org/I4210119464","https://openalex.org/I1343180700"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5085027810","display_name":"C. Prasad","orcid":"https://orcid.org/0000-0001-8786-5389"},"institutions":[{"id":"https://openalex.org/I1343180700","display_name":"Intel (United States)","ror":"https://ror.org/01ek73717","country_code":"US","type":"company","lineage":["https://openalex.org/I1343180700"]},{"id":"https://openalex.org/I4210119464","display_name":"Quality and Reliability (Greece)","ror":"https://ror.org/02f8mda22","country_code":"GR","type":"company","lineage":["https://openalex.org/I4210119464"]}],"countries":["GR","US"],"is_corresponding":false,"raw_author_name":"C. Prasad","raw_affiliation_strings":["Logic Technology Development Quality, Reliability Intel Corp. Hillsboro, Oregon, U.S.A","Logic Technology Development Quality and Reliability, Intel Corp., Hillsboro, Oregon, U.S.A"],"affiliations":[{"raw_affiliation_string":"Logic Technology Development Quality, Reliability Intel Corp. Hillsboro, Oregon, U.S.A","institution_ids":["https://openalex.org/I4210119464","https://openalex.org/I1343180700"]},{"raw_affiliation_string":"Logic Technology Development Quality and Reliability, Intel Corp., Hillsboro, Oregon, U.S.A","institution_ids":["https://openalex.org/I4210119464","https://openalex.org/I1343180700"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5062266688","display_name":"J. Hicks","orcid":"https://orcid.org/0000-0002-7480-0719"},"institutions":[{"id":"https://openalex.org/I1343180700","display_name":"Intel (United States)","ror":"https://ror.org/01ek73717","country_code":"US","type":"company","lineage":["https://openalex.org/I1343180700"]},{"id":"https://openalex.org/I4210119464","display_name":"Quality and Reliability (Greece)","ror":"https://ror.org/02f8mda22","country_code":"GR","type":"company","lineage":["https://openalex.org/I4210119464"]}],"countries":["GR","US"],"is_corresponding":false,"raw_author_name":"J. Hicks","raw_affiliation_strings":["Logic Technology Development Quality, Reliability Intel Corp. Hillsboro, Oregon, U.S.A","Logic Technology Development Quality and Reliability, Intel Corp., Hillsboro, Oregon, U.S.A"],"affiliations":[{"raw_affiliation_string":"Logic Technology Development Quality, Reliability Intel Corp. Hillsboro, Oregon, U.S.A","institution_ids":["https://openalex.org/I4210119464","https://openalex.org/I1343180700"]},{"raw_affiliation_string":"Logic Technology Development Quality and Reliability, Intel Corp., Hillsboro, Oregon, U.S.A","institution_ids":["https://openalex.org/I4210119464","https://openalex.org/I1343180700"]}]}],"institutions":[],"countries_distinct_count":2,"institutions_distinct_count":6,"corresponding_author_ids":["https://openalex.org/A5027832758"],"corresponding_institution_ids":["https://openalex.org/I1343180700","https://openalex.org/I4210119464"],"apc_list":null,"apc_paid":null,"fwci":3.5512,"has_fulltext":false,"cited_by_count":32,"citation_normalized_percentile":{"value":0.93053099,"is_in_top_1_percent":false,"is_in_top_10_percent":true},"cited_by_percentile_year":{"min":90,"max":99},"biblio":{"volume":null,"issue":null,"first_page":"3B.2.1","last_page":"3B.2.6"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10472","display_name":"Semiconductor materials and devices","score":1.0,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10472","display_name":"Semiconductor materials and devices","score":1.0,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10558","display_name":"Advancements in Semiconductor Devices and Circuit Design","score":1.0,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T14117","display_name":"Integrated Circuits and Semiconductor Failure Analysis","score":0.9987999796867371,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/reliability","display_name":"Reliability (semiconductor)","score":0.7111586928367615},{"id":"https://openalex.org/keywords/variation","display_name":"Variation (astronomy)","score":0.6544857025146484},{"id":"https://openalex.org/keywords/time-dependent-gate-oxide-breakdown","display_name":"Time-dependent gate oxide breakdown","score":0.5648404955863953},{"id":"https://openalex.org/keywords/transistor","display_name":"Transistor","score":0.4811500310897827},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.43425440788269043},{"id":"https://openalex.org/keywords/mosfet","display_name":"MOSFET","score":0.41275182366371155},{"id":"https://openalex.org/keywords/degradation","display_name":"Degradation (telecommunications)","score":0.41110464930534363},{"id":"https://openalex.org/keywords/reliability-engineering","display_name":"Reliability engineering","score":0.3659086227416992},{"id":"https://openalex.org/keywords/electronic-engineering","display_name":"Electronic engineering","score":0.2848222851753235},{"id":"https://openalex.org/keywords/electrical-engineering","display_name":"Electrical engineering","score":0.2646702527999878},{"id":"https://openalex.org/keywords/engineering","display_name":"Engineering","score":0.24991032481193542},{"id":"https://openalex.org/keywords/voltage","display_name":"Voltage","score":0.23513585329055786},{"id":"https://openalex.org/keywords/physics","display_name":"Physics","score":0.2303621768951416},{"id":"https://openalex.org/keywords/gate-dielectric","display_name":"Gate dielectric","score":0.12054190039634705}],"concepts":[{"id":"https://openalex.org/C43214815","wikidata":"https://www.wikidata.org/wiki/Q7310987","display_name":"Reliability (semiconductor)","level":3,"score":0.7111586928367615},{"id":"https://openalex.org/C2778334786","wikidata":"https://www.wikidata.org/wiki/Q1586270","display_name":"Variation (astronomy)","level":2,"score":0.6544857025146484},{"id":"https://openalex.org/C152909973","wikidata":"https://www.wikidata.org/wiki/Q7804816","display_name":"Time-dependent gate oxide breakdown","level":5,"score":0.5648404955863953},{"id":"https://openalex.org/C172385210","wikidata":"https://www.wikidata.org/wiki/Q5339","display_name":"Transistor","level":3,"score":0.4811500310897827},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.43425440788269043},{"id":"https://openalex.org/C2778413303","wikidata":"https://www.wikidata.org/wiki/Q210793","display_name":"MOSFET","level":4,"score":0.41275182366371155},{"id":"https://openalex.org/C2779679103","wikidata":"https://www.wikidata.org/wiki/Q5251805","display_name":"Degradation (telecommunications)","level":2,"score":0.41110464930534363},{"id":"https://openalex.org/C200601418","wikidata":"https://www.wikidata.org/wiki/Q2193887","display_name":"Reliability engineering","level":1,"score":0.3659086227416992},{"id":"https://openalex.org/C24326235","wikidata":"https://www.wikidata.org/wiki/Q126095","display_name":"Electronic engineering","level":1,"score":0.2848222851753235},{"id":"https://openalex.org/C119599485","wikidata":"https://www.wikidata.org/wiki/Q43035","display_name":"Electrical engineering","level":1,"score":0.2646702527999878},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.24991032481193542},{"id":"https://openalex.org/C165801399","wikidata":"https://www.wikidata.org/wiki/Q25428","display_name":"Voltage","level":2,"score":0.23513585329055786},{"id":"https://openalex.org/C121332964","wikidata":"https://www.wikidata.org/wiki/Q413","display_name":"Physics","level":0,"score":0.2303621768951416},{"id":"https://openalex.org/C166972891","wikidata":"https://www.wikidata.org/wiki/Q5527011","display_name":"Gate dielectric","level":4,"score":0.12054190039634705},{"id":"https://openalex.org/C44870925","wikidata":"https://www.wikidata.org/wiki/Q37547","display_name":"Astrophysics","level":1,"score":0.0},{"id":"https://openalex.org/C163258240","wikidata":"https://www.wikidata.org/wiki/Q25342","display_name":"Power (physics)","level":2,"score":0.0},{"id":"https://openalex.org/C62520636","wikidata":"https://www.wikidata.org/wiki/Q944","display_name":"Quantum mechanics","level":1,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/irps.2015.7112703","is_oa":false,"landing_page_url":"https://doi.org/10.1109/irps.2015.7112703","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2015 IEEE International Reliability Physics Symposium","raw_type":"proceedings-article"}],"best_oa_location":null,"sustainable_development_goals":[],"awards":[],"funders":[],"has_content":{"grobid_xml":false,"pdf":false},"content_urls":null,"referenced_works_count":11,"referenced_works":["https://openalex.org/W1533965610","https://openalex.org/W1965229716","https://openalex.org/W1966797259","https://openalex.org/W1986824285","https://openalex.org/W1988922865","https://openalex.org/W1995863305","https://openalex.org/W2006445052","https://openalex.org/W2026610840","https://openalex.org/W2048127572","https://openalex.org/W2162517322","https://openalex.org/W2540699116"],"related_works":["https://openalex.org/W2099624314","https://openalex.org/W2386430105","https://openalex.org/W2392567938","https://openalex.org/W2106473374","https://openalex.org/W2356521405","https://openalex.org/W2311850564","https://openalex.org/W2038534795","https://openalex.org/W2384358604","https://openalex.org/W2108489988","https://openalex.org/W3011596590"],"abstract_inverted_index":{"MOSFET":[0],"reliability":[1,43,81],"data":[2,66,82],"are":[3,96],"often":[4],"represented":[5],"as":[6],"a":[7,78],"function":[8],"of":[9,41,57,80,93],"gate":[10,48],"overdrive":[11,26],"(V":[12],"<sub":[13,17],"xmlns:mml=\"http://www.w3.org/1998/Math/MathML\"":[14,18],"xmlns:xlink=\"http://www.w3.org/1999/xlink\">G</sub>":[15],"-V":[16],"xmlns:xlink=\"http://www.w3.org/1999/xlink\">T</sub>":[19],")":[20],"with":[21,88,101],"the":[22,28],"implicit":[23],"assumption":[24],"that":[25,73],"is":[27],"appropriate":[29],"normalizing":[30],"parameter.":[31],"While":[32],"this":[33],"can":[34],"be":[35],"true":[36],"for":[37],"some":[38,91],"specific":[39],"sources":[40,56,92],"variation,":[42],"does":[44,83],"not":[45],"necessarily":[46],"track":[47],"overdrive.":[49,89,102],"This":[50],"paper":[51],"explores":[52],"systematic":[53,94],"and":[54,62],"random":[55,74],"variation":[58,75,95],"in":[59,67,85],"TDDB,":[60],"BTI,":[61],"hot":[63],"carrier":[64],"degradation":[65],"Intel's":[68],"tri-gate":[69],"technologies.":[70],"We":[71],"find":[72],"captured":[76],"within":[77],"baseline":[79],"not,":[84],"general,":[86],"trend":[87],"However,":[90],"correlated":[97],"or,":[98],"interestingly,":[99],"anti-correlated":[100]},"counts_by_year":[{"year":2025,"cited_by_count":1},{"year":2021,"cited_by_count":5},{"year":2020,"cited_by_count":3},{"year":2019,"cited_by_count":5},{"year":2018,"cited_by_count":9},{"year":2017,"cited_by_count":1},{"year":2016,"cited_by_count":4},{"year":2015,"cited_by_count":4}],"updated_date":"2025-11-06T03:46:38.306776","created_date":"2025-10-10T00:00:00"}