{"id":"https://openalex.org/W2105810759","doi":"https://doi.org/10.1109/ipdps.2009.5161198","title":"A multiprocessor self-reconfigurable JPEG2000 encoder","display_name":"A multiprocessor self-reconfigurable JPEG2000 encoder","publication_year":2009,"publication_date":"2009-05-01","ids":{"openalex":"https://openalex.org/W2105810759","doi":"https://doi.org/10.1109/ipdps.2009.5161198","mag":"2105810759"},"language":"en","primary_location":{"id":"doi:10.1109/ipdps.2009.5161198","is_oa":false,"landing_page_url":"https://doi.org/10.1109/ipdps.2009.5161198","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2009 IEEE International Symposium on Parallel & Distributed Processing","raw_type":"proceedings-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5041853964","display_name":"Antonino Tumeo","orcid":"https://orcid.org/0000-0001-9452-120X"},"institutions":[{"id":"https://openalex.org/I93860229","display_name":"Politecnico di Milano","ror":"https://ror.org/01nffqt88","country_code":"IT","type":"education","lineage":["https://openalex.org/I93860229"]}],"countries":["IT"],"is_corresponding":true,"raw_author_name":"Antonino Tumeo","raw_affiliation_strings":["Politecnico di Milano-DEI, Milan, Italy","Politecnico di Milano - DEI, Via Ponzio 34/5, 20133, Italy#TAB#"],"affiliations":[{"raw_affiliation_string":"Politecnico di Milano-DEI, Milan, Italy","institution_ids":["https://openalex.org/I93860229"]},{"raw_affiliation_string":"Politecnico di Milano - DEI, Via Ponzio 34/5, 20133, Italy#TAB#","institution_ids":["https://openalex.org/I93860229"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5070824314","display_name":"Simone Borgio","orcid":null},"institutions":[{"id":"https://openalex.org/I93860229","display_name":"Politecnico di Milano","ror":"https://ror.org/01nffqt88","country_code":"IT","type":"education","lineage":["https://openalex.org/I93860229"]}],"countries":["IT"],"is_corresponding":false,"raw_author_name":"Simone Borgio","raw_affiliation_strings":["Politecnico di Milano-DEI, Milan, Italy","Politecnico di Milano - DEI, Via Ponzio 34/5, 20133, Italy#TAB#"],"affiliations":[{"raw_affiliation_string":"Politecnico di Milano-DEI, Milan, Italy","institution_ids":["https://openalex.org/I93860229"]},{"raw_affiliation_string":"Politecnico di Milano - DEI, Via Ponzio 34/5, 20133, Italy#TAB#","institution_ids":["https://openalex.org/I93860229"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5065923314","display_name":"Davide Bosisio","orcid":null},"institutions":[{"id":"https://openalex.org/I93860229","display_name":"Politecnico di Milano","ror":"https://ror.org/01nffqt88","country_code":"IT","type":"education","lineage":["https://openalex.org/I93860229"]}],"countries":["IT"],"is_corresponding":false,"raw_author_name":"Davide Bosisio","raw_affiliation_strings":["Politecnico di Milano-DEI, Milan, Italy","Politecnico di Milano - DEI, Via Ponzio 34/5, 20133, Italy#TAB#"],"affiliations":[{"raw_affiliation_string":"Politecnico di Milano-DEI, Milan, Italy","institution_ids":["https://openalex.org/I93860229"]},{"raw_affiliation_string":"Politecnico di Milano - DEI, Via Ponzio 34/5, 20133, Italy#TAB#","institution_ids":["https://openalex.org/I93860229"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5038294114","display_name":"Matteo Monchiero","orcid":null},"institutions":[{"id":"https://openalex.org/I1324840837","display_name":"Hewlett-Packard (United States)","ror":"https://ror.org/059rn9488","country_code":"US","type":"company","lineage":["https://openalex.org/I1324840837"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Matteo Monchiero","raw_affiliation_strings":["HP Laboratories, Palo Alto, CA, USA","HP Labs, 1501 Page Mill Rd., Palo Alto 94304 CA, USA"],"affiliations":[{"raw_affiliation_string":"HP Laboratories, Palo Alto, CA, USA","institution_ids":["https://openalex.org/I1324840837"]},{"raw_affiliation_string":"HP Labs, 1501 Page Mill Rd., Palo Alto 94304 CA, USA","institution_ids":["https://openalex.org/I1324840837"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5077005193","display_name":"Gianluca Palermo","orcid":"https://orcid.org/0000-0001-7955-8012"},"institutions":[{"id":"https://openalex.org/I93860229","display_name":"Politecnico di Milano","ror":"https://ror.org/01nffqt88","country_code":"IT","type":"education","lineage":["https://openalex.org/I93860229"]}],"countries":["IT"],"is_corresponding":false,"raw_author_name":"Gianluca Palermo","raw_affiliation_strings":["Politecnico di Milano-DEI, Milan, Italy","Politecnico di Milano - DEI, Via Ponzio 34/5, 20133, Italy#TAB#"],"affiliations":[{"raw_affiliation_string":"Politecnico di Milano-DEI, Milan, Italy","institution_ids":["https://openalex.org/I93860229"]},{"raw_affiliation_string":"Politecnico di Milano - DEI, Via Ponzio 34/5, 20133, Italy#TAB#","institution_ids":["https://openalex.org/I93860229"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5028565685","display_name":"Fabrizio Ferrandi","orcid":"https://orcid.org/0000-0003-0301-4419"},"institutions":[{"id":"https://openalex.org/I93860229","display_name":"Politecnico di Milano","ror":"https://ror.org/01nffqt88","country_code":"IT","type":"education","lineage":["https://openalex.org/I93860229"]}],"countries":["IT"],"is_corresponding":false,"raw_author_name":"Fabrizio Ferrandi","raw_affiliation_strings":["Politecnico di Milano-DEI, Milan, Italy","Politecnico di Milano - DEI, Via Ponzio 34/5, 20133, Italy#TAB#"],"affiliations":[{"raw_affiliation_string":"Politecnico di Milano-DEI, Milan, Italy","institution_ids":["https://openalex.org/I93860229"]},{"raw_affiliation_string":"Politecnico di Milano - DEI, Via Ponzio 34/5, 20133, Italy#TAB#","institution_ids":["https://openalex.org/I93860229"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5014181688","display_name":"Donatella Sciuto","orcid":"https://orcid.org/0000-0001-9030-6940"},"institutions":[{"id":"https://openalex.org/I93860229","display_name":"Politecnico di Milano","ror":"https://ror.org/01nffqt88","country_code":"IT","type":"education","lineage":["https://openalex.org/I93860229"]}],"countries":["IT"],"is_corresponding":false,"raw_author_name":"Donatella Sciuto","raw_affiliation_strings":["Politecnico di Milano-DEI, Milan, Italy","Politecnico di Milano - DEI, Via Ponzio 34/5, 20133, Italy#TAB#"],"affiliations":[{"raw_affiliation_string":"Politecnico di Milano-DEI, Milan, Italy","institution_ids":["https://openalex.org/I93860229"]},{"raw_affiliation_string":"Politecnico di Milano - DEI, Via Ponzio 34/5, 20133, Italy#TAB#","institution_ids":["https://openalex.org/I93860229"]}]}],"institutions":[],"countries_distinct_count":2,"institutions_distinct_count":7,"corresponding_author_ids":["https://openalex.org/A5041853964"],"corresponding_institution_ids":["https://openalex.org/I93860229"],"apc_list":null,"apc_paid":null,"fwci":1.3399,"has_fulltext":false,"cited_by_count":8,"citation_normalized_percentile":{"value":0.81656413,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":{"min":90,"max":96},"biblio":{"volume":null,"issue":null,"first_page":"1","last_page":"8"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10904","display_name":"Embedded Systems Design Techniques","score":0.9995999932289124,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10904","display_name":"Embedded Systems Design Techniques","score":0.9995999932289124,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10054","display_name":"Parallel Computing and Optimization Techniques","score":0.9900000095367432,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10829","display_name":"Interconnection Networks and Systems","score":0.9900000095367432,"subfield":{"id":"https://openalex.org/subfields/1705","display_name":"Computer Networks and Communications"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.8250808715820312},{"id":"https://openalex.org/keywords/control-reconfiguration","display_name":"Control reconfiguration","score":0.7651950716972351},{"id":"https://openalex.org/keywords/multithreading","display_name":"Multithreading","score":0.669519305229187},{"id":"https://openalex.org/keywords/field-programmable-gate-array","display_name":"Field-programmable gate array","score":0.6421035528182983},{"id":"https://openalex.org/keywords/embedded-system","display_name":"Embedded system","score":0.6229291558265686},{"id":"https://openalex.org/keywords/multiprocessing","display_name":"Multiprocessing","score":0.5252375602722168},{"id":"https://openalex.org/keywords/software","display_name":"Software","score":0.4889325201511383},{"id":"https://openalex.org/keywords/computer-architecture","display_name":"Computer architecture","score":0.48122692108154297},{"id":"https://openalex.org/keywords/encoder","display_name":"Encoder","score":0.4457043409347534},{"id":"https://openalex.org/keywords/thread","display_name":"Thread (computing)","score":0.43517446517944336},{"id":"https://openalex.org/keywords/parallel-computing","display_name":"Parallel computing","score":0.371923565864563},{"id":"https://openalex.org/keywords/computer-hardware","display_name":"Computer hardware","score":0.3604384958744049},{"id":"https://openalex.org/keywords/operating-system","display_name":"Operating system","score":0.30707550048828125}],"concepts":[{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.8250808715820312},{"id":"https://openalex.org/C119701452","wikidata":"https://www.wikidata.org/wiki/Q5165881","display_name":"Control reconfiguration","level":2,"score":0.7651950716972351},{"id":"https://openalex.org/C201410400","wikidata":"https://www.wikidata.org/wiki/Q1064412","display_name":"Multithreading","level":3,"score":0.669519305229187},{"id":"https://openalex.org/C42935608","wikidata":"https://www.wikidata.org/wiki/Q190411","display_name":"Field-programmable gate array","level":2,"score":0.6421035528182983},{"id":"https://openalex.org/C149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","level":1,"score":0.6229291558265686},{"id":"https://openalex.org/C4822641","wikidata":"https://www.wikidata.org/wiki/Q846651","display_name":"Multiprocessing","level":2,"score":0.5252375602722168},{"id":"https://openalex.org/C2777904410","wikidata":"https://www.wikidata.org/wiki/Q7397","display_name":"Software","level":2,"score":0.4889325201511383},{"id":"https://openalex.org/C118524514","wikidata":"https://www.wikidata.org/wiki/Q173212","display_name":"Computer architecture","level":1,"score":0.48122692108154297},{"id":"https://openalex.org/C118505674","wikidata":"https://www.wikidata.org/wiki/Q42586063","display_name":"Encoder","level":2,"score":0.4457043409347534},{"id":"https://openalex.org/C138101251","wikidata":"https://www.wikidata.org/wiki/Q213092","display_name":"Thread (computing)","level":2,"score":0.43517446517944336},{"id":"https://openalex.org/C173608175","wikidata":"https://www.wikidata.org/wiki/Q232661","display_name":"Parallel computing","level":1,"score":0.371923565864563},{"id":"https://openalex.org/C9390403","wikidata":"https://www.wikidata.org/wiki/Q3966","display_name":"Computer hardware","level":1,"score":0.3604384958744049},{"id":"https://openalex.org/C111919701","wikidata":"https://www.wikidata.org/wiki/Q9135","display_name":"Operating system","level":1,"score":0.30707550048828125}],"mesh":[],"locations_count":3,"locations":[{"id":"doi:10.1109/ipdps.2009.5161198","is_oa":false,"landing_page_url":"https://doi.org/10.1109/ipdps.2009.5161198","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2009 IEEE International Symposium on Parallel & Distributed Processing","raw_type":"proceedings-article"},{"id":"pmh:oai:CiteSeerX.psu:10.1.1.452.1658","is_oa":false,"landing_page_url":"http://citeseerx.ist.psu.edu/viewdoc/summary?doi=10.1.1.452.1658","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"submittedVersion","is_accepted":false,"is_published":false,"raw_source_name":"http://home.deib.polimi.it/gpalermo/papers/RAW09.pdf","raw_type":"text"},{"id":"pmh:oai:re.public.polimi.it:11311/553647","is_oa":false,"landing_page_url":"http://hdl.handle.net/11311/553647","pdf_url":null,"source":{"id":"https://openalex.org/S4306400312","display_name":"Virtual Community of Pathological Anatomy (University of Castilla La Mancha)","issn_l":null,"issn":null,"is_oa":false,"is_in_doaj":false,"is_core":false,"host_organization":"https://openalex.org/I79189158","host_organization_name":"University of Castilla-La Mancha","host_organization_lineage":["https://openalex.org/I79189158"],"host_organization_lineage_names":[],"type":"repository"},"license":null,"license_id":null,"version":"submittedVersion","is_accepted":false,"is_published":false,"raw_source_name":"","raw_type":"info:eu-repo/semantics/conferenceObject"}],"best_oa_location":null,"sustainable_development_goals":[],"awards":[],"funders":[],"has_content":{"pdf":false,"grobid_xml":false},"content_urls":null,"referenced_works_count":24,"referenced_works":["https://openalex.org/W1535397071","https://openalex.org/W1582084802","https://openalex.org/W2014977632","https://openalex.org/W2092529530","https://openalex.org/W2098129944","https://openalex.org/W2099248913","https://openalex.org/W2110674252","https://openalex.org/W2114097755","https://openalex.org/W2115294662","https://openalex.org/W2124354872","https://openalex.org/W2130193491","https://openalex.org/W2142490124","https://openalex.org/W2146188244","https://openalex.org/W2155384680","https://openalex.org/W2161577181","https://openalex.org/W2165099691","https://openalex.org/W2168092720","https://openalex.org/W2173393203","https://openalex.org/W2537571977","https://openalex.org/W3141634429","https://openalex.org/W3142290142","https://openalex.org/W3143317418","https://openalex.org/W6685238338","https://openalex.org/W6791956034"],"related_works":["https://openalex.org/W2115561485","https://openalex.org/W1985089255","https://openalex.org/W2374902472","https://openalex.org/W2010970156","https://openalex.org/W2153202644","https://openalex.org/W2105895556","https://openalex.org/W2733115356","https://openalex.org/W2377593213","https://openalex.org/W2170132667","https://openalex.org/W4235861380"],"abstract_inverted_index":{"This":[0],"paper":[1],"presents":[2],"a":[3,8,57,98],"multiprocessor":[4],"architecture":[5,48,61],"prototype":[6],"on":[7,52,56,97],"field":[9],"programmable":[10],"gate":[11],"arrays":[12],"(FPGA)":[13],"with":[14],"support":[15],"for":[16],"hardware":[17,36,75,113],"and":[18,35,108],"software":[19,34,91,115],"multithreading.":[20],"Thanks":[21],"to":[22,69,72,131],"partial":[23,63],"dynamic":[24,64],"reconfiguration,":[25],"this":[26],"system":[27],"can,":[28],"at":[29],"run":[30],"time,":[31],"spawn":[32],"both":[33],"threads,":[37,76],"sharing":[38],"not":[39],"only":[40],"the":[41,47,53,62,67,74,77,83,87,125,133],"general":[42],"purpose":[43],"soft-cores":[44],"present":[45],"in":[46],"but":[49],"also":[50,118],"area":[51],"FPGA.":[54],"While":[55],"standard":[58],"single":[59],"processor":[60,68],"reconfiguration":[65,84,134],"requires":[66],"stop":[70],"working":[71],"instantiate":[73],"proposed":[78,126],"solution":[79],"hides":[80],"most":[81],"of":[82,90,111],"latency":[85],"through":[86],"parallel":[88],"execution":[89],"threads.":[92],"We":[93,117],"validate":[94],"our":[95],"framework":[96],"JPEG":[99],"2000":[100],"encoder,":[101],"showing":[102],"how":[103],"threads":[104],"are":[105,129],"spawned,":[106],"executed":[107],"joined":[109],"independently":[110],"their":[112],"or":[114],"nature.":[116],"show":[119],"results":[120],"confirming":[121],"that,":[122],"by":[123],"using":[124],"approach,":[127],"we":[128],"able":[130],"hide":[132],"time.":[135]},"counts_by_year":[{"year":2019,"cited_by_count":2},{"year":2017,"cited_by_count":1},{"year":2012,"cited_by_count":2}],"updated_date":"2026-04-05T17:49:38.594831","created_date":"2025-10-10T00:00:00"}