{"id":"https://openalex.org/W2150736379","doi":"https://doi.org/10.1109/ipdps.2009.5161006","title":"Using hardware transactional memory for data race detection","display_name":"Using hardware transactional memory for data race detection","publication_year":2009,"publication_date":"2009-05-01","ids":{"openalex":"https://openalex.org/W2150736379","doi":"https://doi.org/10.1109/ipdps.2009.5161006","mag":"2150736379"},"language":"en","primary_location":{"id":"doi:10.1109/ipdps.2009.5161006","is_oa":false,"landing_page_url":"https://doi.org/10.1109/ipdps.2009.5161006","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2009 IEEE International Symposium on Parallel & Distributed Processing","raw_type":"proceedings-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5064330876","display_name":"Shantanu Gupta","orcid":"https://orcid.org/0000-0002-9931-1612"},"institutions":[{"id":"https://openalex.org/I27837315","display_name":"University of Michigan\u2013Ann Arbor","ror":"https://ror.org/00jmfr291","country_code":"US","type":"education","lineage":["https://openalex.org/I27837315"]}],"countries":["US"],"is_corresponding":true,"raw_author_name":"Shantanu Gupta","raw_affiliation_strings":["Department of EE and CS, University of Michigan, USA"],"affiliations":[{"raw_affiliation_string":"Department of EE and CS, University of Michigan, USA","institution_ids":["https://openalex.org/I27837315"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5102066457","display_name":"Florin Sultan","orcid":null},"institutions":[],"countries":[],"is_corresponding":false,"raw_author_name":"Florin Sultan","raw_affiliation_strings":["NEC Laboratories of America, Inc., Princeton, NJ, USA"],"affiliations":[{"raw_affiliation_string":"NEC Laboratories of America, Inc., Princeton, NJ, USA","institution_ids":[]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5034416611","display_name":"Srihari Cadambi","orcid":null},"institutions":[],"countries":[],"is_corresponding":false,"raw_author_name":"Srihari Cadambi","raw_affiliation_strings":["NEC Laboratories of America, Inc., Princeton, NJ, USA"],"affiliations":[{"raw_affiliation_string":"NEC Laboratories of America, Inc., Princeton, NJ, USA","institution_ids":[]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5020028377","display_name":"Franjo Ivan\u010di\u0107","orcid":null},"institutions":[],"countries":[],"is_corresponding":false,"raw_author_name":"Franjo Ivancic","raw_affiliation_strings":["NEC Laboratories of America, Inc., Princeton, NJ, USA"],"affiliations":[{"raw_affiliation_string":"NEC Laboratories of America, Inc., Princeton, NJ, USA","institution_ids":[]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5109086831","display_name":"Martin R\u00f6tteler","orcid":null},"institutions":[],"countries":[],"is_corresponding":false,"raw_author_name":"Martin Rotteler","raw_affiliation_strings":["NEC Laboratories of America, Inc., Princeton, NJ, USA"],"affiliations":[{"raw_affiliation_string":"NEC Laboratories of America, Inc., Princeton, NJ, USA","institution_ids":[]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":5,"corresponding_author_ids":["https://openalex.org/A5064330876"],"corresponding_institution_ids":["https://openalex.org/I27837315"],"apc_list":null,"apc_paid":null,"fwci":5.4321,"has_fulltext":false,"cited_by_count":31,"citation_normalized_percentile":{"value":0.96060148,"is_in_top_1_percent":false,"is_in_top_10_percent":true},"cited_by_percentile_year":{"min":89,"max":98},"biblio":{"volume":null,"issue":null,"first_page":"1","last_page":"11"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10772","display_name":"Distributed systems and fault tolerance","score":0.9998000264167786,"subfield":{"id":"https://openalex.org/subfields/1705","display_name":"Computer Networks and Communications"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10772","display_name":"Distributed systems and fault tolerance","score":0.9998000264167786,"subfield":{"id":"https://openalex.org/subfields/1705","display_name":"Computer Networks and Communications"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10054","display_name":"Parallel Computing and Optimization Techniques","score":0.9994999766349792,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11005","display_name":"Radiation Effects in Electronics","score":0.9983000159263611,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/transactional-memory","display_name":"Transactional memory","score":0.8997899293899536},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.8462896347045898},{"id":"https://openalex.org/keywords/exploit","display_name":"Exploit","score":0.6912315487861633},{"id":"https://openalex.org/keywords/concurrency","display_name":"Concurrency","score":0.5888334512710571},{"id":"https://openalex.org/keywords/debugging","display_name":"Debugging","score":0.518068790435791},{"id":"https://openalex.org/keywords/overhead","display_name":"Overhead (engineering)","score":0.504593014717102},{"id":"https://openalex.org/keywords/multi-core-processor","display_name":"Multi-core processor","score":0.5039450526237488},{"id":"https://openalex.org/keywords/multithreading","display_name":"Multithreading","score":0.46724915504455566},{"id":"https://openalex.org/keywords/synchronization","display_name":"Synchronization (alternating current)","score":0.46567484736442566},{"id":"https://openalex.org/keywords/software-transactional-memory","display_name":"Software transactional memory","score":0.4395742118358612},{"id":"https://openalex.org/keywords/embedded-system","display_name":"Embedded system","score":0.39301958680152893},{"id":"https://openalex.org/keywords/parallel-computing","display_name":"Parallel computing","score":0.3342927098274231},{"id":"https://openalex.org/keywords/computer-architecture","display_name":"Computer architecture","score":0.32063889503479004},{"id":"https://openalex.org/keywords/operating-system","display_name":"Operating system","score":0.29657745361328125},{"id":"https://openalex.org/keywords/programming-language","display_name":"Programming language","score":0.15077948570251465},{"id":"https://openalex.org/keywords/database-transaction","display_name":"Database transaction","score":0.11889028549194336},{"id":"https://openalex.org/keywords/computer-security","display_name":"Computer security","score":0.0934588611125946}],"concepts":[{"id":"https://openalex.org/C134277064","wikidata":"https://www.wikidata.org/wiki/Q878206","display_name":"Transactional memory","level":3,"score":0.8997899293899536},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.8462896347045898},{"id":"https://openalex.org/C165696696","wikidata":"https://www.wikidata.org/wiki/Q11287","display_name":"Exploit","level":2,"score":0.6912315487861633},{"id":"https://openalex.org/C193702766","wikidata":"https://www.wikidata.org/wiki/Q1414548","display_name":"Concurrency","level":2,"score":0.5888334512710571},{"id":"https://openalex.org/C168065819","wikidata":"https://www.wikidata.org/wiki/Q845566","display_name":"Debugging","level":2,"score":0.518068790435791},{"id":"https://openalex.org/C2779960059","wikidata":"https://www.wikidata.org/wiki/Q7113681","display_name":"Overhead (engineering)","level":2,"score":0.504593014717102},{"id":"https://openalex.org/C78766204","wikidata":"https://www.wikidata.org/wiki/Q555032","display_name":"Multi-core processor","level":2,"score":0.5039450526237488},{"id":"https://openalex.org/C201410400","wikidata":"https://www.wikidata.org/wiki/Q1064412","display_name":"Multithreading","level":3,"score":0.46724915504455566},{"id":"https://openalex.org/C2778562939","wikidata":"https://www.wikidata.org/wiki/Q1298791","display_name":"Synchronization (alternating current)","level":3,"score":0.46567484736442566},{"id":"https://openalex.org/C167149655","wikidata":"https://www.wikidata.org/wiki/Q1189004","display_name":"Software transactional memory","level":4,"score":0.4395742118358612},{"id":"https://openalex.org/C149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","level":1,"score":0.39301958680152893},{"id":"https://openalex.org/C173608175","wikidata":"https://www.wikidata.org/wiki/Q232661","display_name":"Parallel computing","level":1,"score":0.3342927098274231},{"id":"https://openalex.org/C118524514","wikidata":"https://www.wikidata.org/wiki/Q173212","display_name":"Computer architecture","level":1,"score":0.32063889503479004},{"id":"https://openalex.org/C111919701","wikidata":"https://www.wikidata.org/wiki/Q9135","display_name":"Operating system","level":1,"score":0.29657745361328125},{"id":"https://openalex.org/C199360897","wikidata":"https://www.wikidata.org/wiki/Q9143","display_name":"Programming language","level":1,"score":0.15077948570251465},{"id":"https://openalex.org/C75949130","wikidata":"https://www.wikidata.org/wiki/Q848010","display_name":"Database transaction","level":2,"score":0.11889028549194336},{"id":"https://openalex.org/C38652104","wikidata":"https://www.wikidata.org/wiki/Q3510521","display_name":"Computer security","level":1,"score":0.0934588611125946},{"id":"https://openalex.org/C138101251","wikidata":"https://www.wikidata.org/wiki/Q213092","display_name":"Thread (computing)","level":2,"score":0.0},{"id":"https://openalex.org/C127162648","wikidata":"https://www.wikidata.org/wiki/Q16858953","display_name":"Channel (broadcasting)","level":2,"score":0.0},{"id":"https://openalex.org/C31258907","wikidata":"https://www.wikidata.org/wiki/Q1301371","display_name":"Computer network","level":1,"score":0.0}],"mesh":[],"locations_count":2,"locations":[{"id":"doi:10.1109/ipdps.2009.5161006","is_oa":false,"landing_page_url":"https://doi.org/10.1109/ipdps.2009.5161006","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2009 IEEE International Symposium on Parallel & Distributed Processing","raw_type":"proceedings-article"},{"id":"pmh:oai:CiteSeerX.psu:10.1.1.407.7975","is_oa":false,"landing_page_url":"http://citeseerx.ist.psu.edu/viewdoc/summary?doi=10.1.1.407.7975","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"submittedVersion","is_accepted":false,"is_published":false,"raw_source_name":"http://web.eecs.umich.edu/~shangupt/publications/sgupta-ipdps09.pdf","raw_type":"text"}],"best_oa_location":null,"sustainable_development_goals":[],"awards":[],"funders":[],"has_content":{"pdf":false,"grobid_xml":false},"content_urls":null,"referenced_works_count":41,"referenced_works":["https://openalex.org/W1487375638","https://openalex.org/W1652742168","https://openalex.org/W1967925841","https://openalex.org/W1972544179","https://openalex.org/W1973501242","https://openalex.org/W1986913310","https://openalex.org/W2005646196","https://openalex.org/W2041205948","https://openalex.org/W2046699259","https://openalex.org/W2092911542","https://openalex.org/W2099537990","https://openalex.org/W2101161997","https://openalex.org/W2105055683","https://openalex.org/W2105391037","https://openalex.org/W2107150212","https://openalex.org/W2108204150","https://openalex.org/W2109691981","https://openalex.org/W2110710544","https://openalex.org/W2112143545","https://openalex.org/W2113751407","https://openalex.org/W2125445874","https://openalex.org/W2127532866","https://openalex.org/W2127989655","https://openalex.org/W2135430119","https://openalex.org/W2139588056","https://openalex.org/W2143869535","https://openalex.org/W2145021036","https://openalex.org/W2145471566","https://openalex.org/W2149473197","https://openalex.org/W2162446957","https://openalex.org/W2170651063","https://openalex.org/W2257284989","https://openalex.org/W3023641965","https://openalex.org/W3137220996","https://openalex.org/W4205283737","https://openalex.org/W4234703016","https://openalex.org/W4238549726","https://openalex.org/W4244583165","https://openalex.org/W4248655060","https://openalex.org/W6636927302","https://openalex.org/W6651866598"],"related_works":["https://openalex.org/W2088444093","https://openalex.org/W133473147","https://openalex.org/W2152491655","https://openalex.org/W924353067","https://openalex.org/W4252722439","https://openalex.org/W2992926879","https://openalex.org/W1144911151","https://openalex.org/W2076409732","https://openalex.org/W120707803","https://openalex.org/W2104221844"],"abstract_inverted_index":{"Widespread":[0],"emergence":[1],"of":[2,8,15,112,122],"multicore":[3],"processors":[4],"will":[5,23,77],"spur":[6],"development":[7],"parallel":[9],"applications,":[10],"exposing":[11],"programmers":[12],"to":[13,25,30,37,47,69,103,126],"degrees":[14],"hardware":[16,75,95],"concurrency":[17],"hitherto":[18],"unavailable.":[19],"Dependable":[20],"multithreaded":[21],"software":[22],"have":[24,52],"rely":[26],"on":[27,140],"the":[28,110,118,147],"ability":[29],"dynamically":[31],"detect":[32],"non-deterministic":[33],"and":[34,60,137,162],"notoriously":[35],"hard":[36],"reproduce":[38],"synchronization":[39],"bugs":[40],"manifested":[41],"through":[42],"data":[43,49,70,105,128,141,160],"races.":[44],"Previous":[45],"solutions":[46],"dynamic":[48],"race":[50,71,106,129],"detection":[51,72,120],"required":[53],"specialized":[54],"hardware,":[55],"at":[56,158],"additional":[57],"power,":[58],"design":[59],"area":[61],"costs.":[62],"We":[63,108,131],"propose":[64,109],"RaceTM,":[65],"a":[66,86,133],"novel":[67],"approach":[68],"that":[73,76,116,153],"exploits":[74],"likely":[78],"be":[79,101],"present":[80,132],"in":[81],"future":[82],"multiprocessors,":[83],"albeit":[84],"for":[85,97],"different":[87],"purpose.":[88],"In":[89],"particular,":[90],"we":[91],"show":[92,152],"how":[93],"emerging":[94],"support":[96],"transactional":[98,123],"memory":[99,124],"can":[100],"leveraged":[102],"aid":[104],"detection.":[107,130],"concept":[111],"lightweight":[113],"debug":[114],"transactions":[115],"exploit":[117],"conflict":[119],"mechanisms":[121],"systems":[125],"perform":[127],"proof-of-concept":[134],"simulation":[135],"prototype,":[136],"evaluate":[138],"it":[139],"races":[142,161],"injected":[143],"into":[144],"applications":[145],"from":[146],"SPLASH-2":[148],"suite.":[149],"Our":[150],"experiments":[151],"this":[154],"technique":[155],"is":[156],"effective":[157],"discovering":[159],"has":[163],"low":[164],"performance":[165],"overhead.":[166]},"counts_by_year":[{"year":2025,"cited_by_count":1},{"year":2023,"cited_by_count":1},{"year":2022,"cited_by_count":1},{"year":2021,"cited_by_count":1},{"year":2020,"cited_by_count":1},{"year":2018,"cited_by_count":1},{"year":2016,"cited_by_count":2},{"year":2015,"cited_by_count":4},{"year":2014,"cited_by_count":1},{"year":2013,"cited_by_count":3},{"year":2012,"cited_by_count":2}],"updated_date":"2026-04-04T16:13:02.066488","created_date":"2025-10-10T00:00:00"}