{"id":"https://openalex.org/W2157667696","doi":"https://doi.org/10.1109/ipdps.2008.4536505","title":"A self-adaptive on-line task placement algorithm for partially reconfigurable systems","display_name":"A self-adaptive on-line task placement algorithm for partially reconfigurable systems","publication_year":2008,"publication_date":"2008-04-01","ids":{"openalex":"https://openalex.org/W2157667696","doi":"https://doi.org/10.1109/ipdps.2008.4536505","mag":"2157667696"},"language":"en","primary_location":{"id":"doi:10.1109/ipdps.2008.4536505","is_oa":false,"landing_page_url":"https://doi.org/10.1109/ipdps.2008.4536505","pdf_url":null,"source":{"id":"https://openalex.org/S4210174069","display_name":"Proceedings - IEEE International Parallel and Distributed Processing Symposium","issn_l":"1530-2075","issn":["1530-2075"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310319808","host_organization_name":"Institute of Electrical and Electronics Engineers","host_organization_lineage":["https://openalex.org/P4310319808"],"host_organization_lineage_names":["Institute of Electrical and Electronics Engineers"],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2008 IEEE International Symposium on Parallel and Distributed Processing","raw_type":"proceedings-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5100661757","display_name":"Yi Lu","orcid":"https://orcid.org/0000-0001-7994-7798"},"institutions":[{"id":"https://openalex.org/I98358874","display_name":"Delft University of Technology","ror":"https://ror.org/02e2c7k09","country_code":"NL","type":"education","lineage":["https://openalex.org/I98358874"]}],"countries":["NL"],"is_corresponding":true,"raw_author_name":"Yi Lu","raw_affiliation_strings":["Computer Engineering Laboratory, Delft, Netherlands"],"affiliations":[{"raw_affiliation_string":"Computer Engineering Laboratory, Delft, Netherlands","institution_ids":["https://openalex.org/I98358874"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5012303251","display_name":"Thomas Marconi","orcid":null},"institutions":[{"id":"https://openalex.org/I98358874","display_name":"Delft University of Technology","ror":"https://ror.org/02e2c7k09","country_code":"NL","type":"education","lineage":["https://openalex.org/I98358874"]}],"countries":["NL"],"is_corresponding":false,"raw_author_name":"Thomas Marconi","raw_affiliation_strings":["Computer Engineering Laboratory, Delft, Netherlands"],"affiliations":[{"raw_affiliation_string":"Computer Engineering Laboratory, Delft, Netherlands","institution_ids":["https://openalex.org/I98358874"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5075050234","display_name":"Georgi Gaydadjiev","orcid":"https://orcid.org/0000-0002-3678-7007"},"institutions":[{"id":"https://openalex.org/I98358874","display_name":"Delft University of Technology","ror":"https://ror.org/02e2c7k09","country_code":"NL","type":"education","lineage":["https://openalex.org/I98358874"]}],"countries":["NL"],"is_corresponding":false,"raw_author_name":"Georgi Gaydadjiev","raw_affiliation_strings":["Computer Engineering Laboratory, Delft, Netherlands"],"affiliations":[{"raw_affiliation_string":"Computer Engineering Laboratory, Delft, Netherlands","institution_ids":["https://openalex.org/I98358874"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5058128591","display_name":"Koen Bertels","orcid":"https://orcid.org/0000-0001-9310-4885"},"institutions":[{"id":"https://openalex.org/I98358874","display_name":"Delft University of Technology","ror":"https://ror.org/02e2c7k09","country_code":"NL","type":"education","lineage":["https://openalex.org/I98358874"]}],"countries":["NL"],"is_corresponding":false,"raw_author_name":"Koen Bertels","raw_affiliation_strings":["Computer Engineering Laboratory, Delft, Netherlands"],"affiliations":[{"raw_affiliation_string":"Computer Engineering Laboratory, Delft, Netherlands","institution_ids":["https://openalex.org/I98358874"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5066952816","display_name":"Roel Meeuws","orcid":null},"institutions":[{"id":"https://openalex.org/I98358874","display_name":"Delft University of Technology","ror":"https://ror.org/02e2c7k09","country_code":"NL","type":"education","lineage":["https://openalex.org/I98358874"]}],"countries":["NL"],"is_corresponding":false,"raw_author_name":"Roel Meeuws","raw_affiliation_strings":["Computer Engineering Laboratory, Delft, Netherlands"],"affiliations":[{"raw_affiliation_string":"Computer Engineering Laboratory, Delft, Netherlands","institution_ids":["https://openalex.org/I98358874"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":5,"corresponding_author_ids":["https://openalex.org/A5100661757"],"corresponding_institution_ids":["https://openalex.org/I98358874"],"apc_list":null,"apc_paid":null,"fwci":4.4897,"has_fulltext":false,"cited_by_count":18,"citation_normalized_percentile":{"value":0.95044194,"is_in_top_1_percent":false,"is_in_top_10_percent":true},"cited_by_percentile_year":{"min":91,"max":96},"biblio":{"volume":null,"issue":null,"first_page":"1","last_page":"8"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10904","display_name":"Embedded Systems Design Techniques","score":0.9998999834060669,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10904","display_name":"Embedded Systems Design Techniques","score":0.9998999834060669,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10829","display_name":"Interconnection Networks and Systems","score":0.9997000098228455,"subfield":{"id":"https://openalex.org/subfields/1705","display_name":"Computer Networks and Communications"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10054","display_name":"Parallel Computing and Optimization Techniques","score":0.9993000030517578,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/control-reconfiguration","display_name":"Control reconfiguration","score":0.8620526790618896},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.8196735382080078},{"id":"https://openalex.org/keywords/field-programmable-gate-array","display_name":"Field-programmable gate array","score":0.8080278635025024},{"id":"https://openalex.org/keywords/task","display_name":"Task (project management)","score":0.7138124704360962},{"id":"https://openalex.org/keywords/flexibility","display_name":"Flexibility (engineering)","score":0.6693949699401855},{"id":"https://openalex.org/keywords/feature","display_name":"Feature (linguistics)","score":0.47303077578544617},{"id":"https://openalex.org/keywords/line","display_name":"Line (geometry)","score":0.42640185356140137},{"id":"https://openalex.org/keywords/reconfigurable-computing","display_name":"Reconfigurable computing","score":0.42381036281585693},{"id":"https://openalex.org/keywords/execution-time","display_name":"Execution time","score":0.4101627469062805},{"id":"https://openalex.org/keywords/algorithm","display_name":"Algorithm","score":0.4097500443458557},{"id":"https://openalex.org/keywords/embedded-system","display_name":"Embedded system","score":0.3910450339317322},{"id":"https://openalex.org/keywords/parallel-computing","display_name":"Parallel computing","score":0.3433716297149658},{"id":"https://openalex.org/keywords/engineering","display_name":"Engineering","score":0.06517758965492249}],"concepts":[{"id":"https://openalex.org/C119701452","wikidata":"https://www.wikidata.org/wiki/Q5165881","display_name":"Control reconfiguration","level":2,"score":0.8620526790618896},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.8196735382080078},{"id":"https://openalex.org/C42935608","wikidata":"https://www.wikidata.org/wiki/Q190411","display_name":"Field-programmable gate array","level":2,"score":0.8080278635025024},{"id":"https://openalex.org/C2780451532","wikidata":"https://www.wikidata.org/wiki/Q759676","display_name":"Task (project management)","level":2,"score":0.7138124704360962},{"id":"https://openalex.org/C2780598303","wikidata":"https://www.wikidata.org/wiki/Q65921492","display_name":"Flexibility (engineering)","level":2,"score":0.6693949699401855},{"id":"https://openalex.org/C2776401178","wikidata":"https://www.wikidata.org/wiki/Q12050496","display_name":"Feature (linguistics)","level":2,"score":0.47303077578544617},{"id":"https://openalex.org/C198352243","wikidata":"https://www.wikidata.org/wiki/Q37105","display_name":"Line (geometry)","level":2,"score":0.42640185356140137},{"id":"https://openalex.org/C142962650","wikidata":"https://www.wikidata.org/wiki/Q240838","display_name":"Reconfigurable computing","level":3,"score":0.42381036281585693},{"id":"https://openalex.org/C2989134064","wikidata":"https://www.wikidata.org/wiki/Q288510","display_name":"Execution time","level":2,"score":0.4101627469062805},{"id":"https://openalex.org/C11413529","wikidata":"https://www.wikidata.org/wiki/Q8366","display_name":"Algorithm","level":1,"score":0.4097500443458557},{"id":"https://openalex.org/C149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","level":1,"score":0.3910450339317322},{"id":"https://openalex.org/C173608175","wikidata":"https://www.wikidata.org/wiki/Q232661","display_name":"Parallel computing","level":1,"score":0.3433716297149658},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.06517758965492249},{"id":"https://openalex.org/C105795698","wikidata":"https://www.wikidata.org/wiki/Q12483","display_name":"Statistics","level":1,"score":0.0},{"id":"https://openalex.org/C33923547","wikidata":"https://www.wikidata.org/wiki/Q395","display_name":"Mathematics","level":0,"score":0.0},{"id":"https://openalex.org/C201995342","wikidata":"https://www.wikidata.org/wiki/Q682496","display_name":"Systems engineering","level":1,"score":0.0},{"id":"https://openalex.org/C138885662","wikidata":"https://www.wikidata.org/wiki/Q5891","display_name":"Philosophy","level":0,"score":0.0},{"id":"https://openalex.org/C41895202","wikidata":"https://www.wikidata.org/wiki/Q8162","display_name":"Linguistics","level":1,"score":0.0},{"id":"https://openalex.org/C2524010","wikidata":"https://www.wikidata.org/wiki/Q8087","display_name":"Geometry","level":1,"score":0.0}],"mesh":[],"locations_count":2,"locations":[{"id":"doi:10.1109/ipdps.2008.4536505","is_oa":false,"landing_page_url":"https://doi.org/10.1109/ipdps.2008.4536505","pdf_url":null,"source":{"id":"https://openalex.org/S4210174069","display_name":"Proceedings - IEEE International Parallel and Distributed Processing Symposium","issn_l":"1530-2075","issn":["1530-2075"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310319808","host_organization_name":"Institute of Electrical and Electronics Engineers","host_organization_lineage":["https://openalex.org/P4310319808"],"host_organization_lineage_names":["Institute of Electrical and Electronics Engineers"],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2008 IEEE International Symposium on Parallel and Distributed Processing","raw_type":"proceedings-article"},{"id":"pmh:oai:CiteSeerX.psu:10.1.1.158.8588","is_oa":false,"landing_page_url":"http://citeseerx.ist.psu.edu/viewdoc/summary?doi=10.1.1.158.8588","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"submittedVersion","is_accepted":false,"is_published":false,"raw_source_name":"http://ce.et.tudelft.nl/publicationfiles/1480_755_yilu_RAW.pdf","raw_type":"text"}],"best_oa_location":null,"sustainable_development_goals":[],"awards":[],"funders":[],"has_content":{"grobid_xml":false,"pdf":false},"content_urls":null,"referenced_works_count":14,"referenced_works":["https://openalex.org/W34557826","https://openalex.org/W102718729","https://openalex.org/W1491948222","https://openalex.org/W1522103810","https://openalex.org/W1576594927","https://openalex.org/W1792849551","https://openalex.org/W1823959354","https://openalex.org/W2079543149","https://openalex.org/W2101497050","https://openalex.org/W2102673224","https://openalex.org/W2108029534","https://openalex.org/W2135839110","https://openalex.org/W2146188244","https://openalex.org/W6629466944"],"related_works":["https://openalex.org/W2810427553","https://openalex.org/W2135053878","https://openalex.org/W2941434274","https://openalex.org/W4249632163","https://openalex.org/W1760305469","https://openalex.org/W2797161794","https://openalex.org/W2073075351","https://openalex.org/W2340647897","https://openalex.org/W2808484818","https://openalex.org/W1574948540"],"abstract_inverted_index":{"With":[0],"the":[1,24,38,75,83],"arrival":[2],"of":[3,100],"partial":[4],"reconfiguration":[5],"technology,":[6],"modern":[7],"FPGAs":[8],"support":[9],"swapping":[10],"tasks":[11,21,46],"in":[12,98],"or":[13],"out":[14],"individually":[15],"at":[16,48],"run-time":[17,49,66],"without":[18],"interrupting":[19],"other":[20],"running":[22],"on":[23,50,74],"same":[25],"FPGA.":[26],"Although,":[27],"implementing":[28],"this":[29,56,64],"feature":[30],"achieves":[31],"much":[32],"better":[33,90],"flexibility":[34],"and":[35,43,77,106],"device":[36],"utilization,":[37],"challenge":[39],"remains":[40],"to":[41,62],"quickly":[42],"efficiently":[44],"place":[45],"arriving":[47],"such":[51],"partially":[52],"reconfigurable":[53],"systems.":[54],"In":[55],"paper,":[57],"we":[58],"propose":[59],"an":[60],"algorithm":[61,88],"handle":[63],"on-line,":[65],"task":[67,101],"placement":[68,104],"problem.":[69],"By":[70],"adding":[71],"logical":[72],"constraints":[73],"FPGA":[76],"introducing":[78],"our":[79,87],"resources":[80],"management":[81],"solution,":[82],"simulation":[84],"results":[85],"show":[86],"has":[89],"overall":[91],"performances":[92],"compared":[93],"with":[94],"previous":[95],"reported":[96],"methods":[97],"terms":[99],"rejection":[102],"number,":[103],"quality":[105],"execution":[107],"time.":[108]},"counts_by_year":[{"year":2025,"cited_by_count":1},{"year":2015,"cited_by_count":2},{"year":2012,"cited_by_count":2}],"updated_date":"2026-04-05T17:49:38.594831","created_date":"2025-10-10T00:00:00"}