{"id":"https://openalex.org/W2118668706","doi":"https://doi.org/10.1109/ipdps.2008.4536287","title":"DiCo-CMP: Efficient cache coherency in tiled CMP architectures","display_name":"DiCo-CMP: Efficient cache coherency in tiled CMP architectures","publication_year":2008,"publication_date":"2008-04-01","ids":{"openalex":"https://openalex.org/W2118668706","doi":"https://doi.org/10.1109/ipdps.2008.4536287","mag":"2118668706"},"language":"en","primary_location":{"id":"doi:10.1109/ipdps.2008.4536287","is_oa":false,"landing_page_url":"https://doi.org/10.1109/ipdps.2008.4536287","pdf_url":null,"source":{"id":"https://openalex.org/S4210174069","display_name":"Proceedings - IEEE International Parallel and Distributed Processing Symposium","issn_l":"1530-2075","issn":["1530-2075"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310319808","host_organization_name":"Institute of Electrical and Electronics Engineers","host_organization_lineage":["https://openalex.org/P4310319808"],"host_organization_lineage_names":["Institute of Electrical and Electronics Engineers"],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2008 IEEE International Symposium on Parallel and Distributed Processing","raw_type":"proceedings-article"},"type":"conference-paper","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5073507304","display_name":"Alberto Ros","orcid":"https://orcid.org/0000-0001-5757-1064"},"institutions":[{"id":"https://openalex.org/I80180929","display_name":"Universidad de Murcia","ror":"https://ror.org/03p3aeb86","country_code":"ES","type":"education","lineage":["https://openalex.org/I80180929"]}],"countries":["ES"],"is_corresponding":false,"raw_author_name":"Alberto Ros","raw_affiliation_strings":["Departmento de Ingenier\u00eda y Tecnolog\u00eda de Computadores, Universidad de Murcia, Murcia, Spain","Dept. de Ing. y Tecnol. de Comput., Univ. de Murcia, Murcia"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Departmento de Ingenier\u00eda y Tecnolog\u00eda de Computadores, Universidad de Murcia, Murcia, Spain","institution_ids":["https://openalex.org/I80180929"]},{"raw_affiliation_string":"Dept. de Ing. y Tecnol. de Comput., Univ. de Murcia, Murcia","institution_ids":["https://openalex.org/I80180929"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5010840475","display_name":"Manuel E. Acacio","orcid":"https://orcid.org/0000-0003-0935-4078"},"institutions":[{"id":"https://openalex.org/I80180929","display_name":"Universidad de Murcia","ror":"https://ror.org/03p3aeb86","country_code":"ES","type":"education","lineage":["https://openalex.org/I80180929"]}],"countries":["ES"],"is_corresponding":false,"raw_author_name":"Manuel E. Acacio","raw_affiliation_strings":["Departmento de Ingenier\u00eda y Tecnolog\u00eda de Computadores, Universidad de Murcia, Murcia, Spain","Dept. de Ing. y Tecnol. de Comput., Univ. de Murcia, Murcia"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Departmento de Ingenier\u00eda y Tecnolog\u00eda de Computadores, Universidad de Murcia, Murcia, Spain","institution_ids":["https://openalex.org/I80180929"]},{"raw_affiliation_string":"Dept. de Ing. y Tecnol. de Comput., Univ. de Murcia, Murcia","institution_ids":["https://openalex.org/I80180929"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5070286319","display_name":"Jos\u00e9 M. Garc\u0131\u0301a","orcid":"https://orcid.org/0000-0002-6388-2835"},"institutions":[{"id":"https://openalex.org/I80180929","display_name":"Universidad de Murcia","ror":"https://ror.org/03p3aeb86","country_code":"ES","type":"education","lineage":["https://openalex.org/I80180929"]}],"countries":["ES"],"is_corresponding":false,"raw_author_name":"Jose M. Garcia","raw_affiliation_strings":["Departmento de Ingenier\u00eda y Tecnolog\u00eda de Computadores, Universidad de Murcia, Murcia, Spain","Dept. de Ing. y Tecnol. de Comput., Univ. de Murcia, Murcia"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Departmento de Ingenier\u00eda y Tecnolog\u00eda de Computadores, Universidad de Murcia, Murcia, Spain","institution_ids":["https://openalex.org/I80180929"]},{"raw_affiliation_string":"Dept. de Ing. y Tecnol. de Comput., Univ. de Murcia, Murcia","institution_ids":["https://openalex.org/I80180929"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":1,"corresponding_author_ids":[],"corresponding_institution_ids":["https://openalex.org/I80180929"],"apc_list":null,"apc_paid":null,"fwci":2.6304,"has_fulltext":false,"cited_by_count":39,"citation_normalized_percentile":{"value":0.91085044,"is_in_top_1_percent":false,"is_in_top_10_percent":true},"cited_by_percentile_year":{"min":89,"max":98},"biblio":{"volume":null,"issue":null,"first_page":"1","last_page":"11"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10054","display_name":"Parallel Computing and Optimization Techniques","score":1.0,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10054","display_name":"Parallel Computing and Optimization Techniques","score":1.0,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10829","display_name":"Interconnection Networks and Systems","score":0.9998999834060669,"subfield":{"id":"https://openalex.org/subfields/1705","display_name":"Computer Networks and Communications"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10502","display_name":"Advanced Memory and Neural Computing","score":0.9993000030517578,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.8717978596687317},{"id":"https://openalex.org/keywords/cache-coherence","display_name":"Cache coherence","score":0.7913948893547058},{"id":"https://openalex.org/keywords/mesi-protocol","display_name":"MESI protocol","score":0.6717507243156433},{"id":"https://openalex.org/keywords/cache","display_name":"Cache","score":0.5998255610466003},{"id":"https://openalex.org/keywords/mesif-protocol","display_name":"MESIF protocol","score":0.5839748382568359},{"id":"https://openalex.org/keywords/computer-network","display_name":"Computer network","score":0.5817556381225586},{"id":"https://openalex.org/keywords/interconnection","display_name":"Interconnection","score":0.46086442470550537},{"id":"https://openalex.org/keywords/bus-sniffing","display_name":"Bus sniffing","score":0.45218318700790405},{"id":"https://openalex.org/keywords/directory","display_name":"Directory","score":0.4380890130996704},{"id":"https://openalex.org/keywords/security-token","display_name":"Security token","score":0.434698224067688},{"id":"https://openalex.org/keywords/cache-algorithms","display_name":"Cache algorithms","score":0.4326283931732178},{"id":"https://openalex.org/keywords/parallel-computing","display_name":"Parallel computing","score":0.34109196066856384},{"id":"https://openalex.org/keywords/operating-system","display_name":"Operating system","score":0.29106253385543823},{"id":"https://openalex.org/keywords/cpu-cache","display_name":"CPU cache","score":0.27621668577194214}],"concepts":[{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.8717978596687317},{"id":"https://openalex.org/C141917322","wikidata":"https://www.wikidata.org/wiki/Q1025017","display_name":"Cache coherence","level":5,"score":0.7913948893547058},{"id":"https://openalex.org/C120936851","wikidata":"https://www.wikidata.org/wiki/Q1408065","display_name":"MESI protocol","level":5,"score":0.6717507243156433},{"id":"https://openalex.org/C115537543","wikidata":"https://www.wikidata.org/wiki/Q165596","display_name":"Cache","level":2,"score":0.5998255610466003},{"id":"https://openalex.org/C199979278","wikidata":"https://www.wikidata.org/wiki/Q263221","display_name":"MESIF protocol","level":5,"score":0.5839748382568359},{"id":"https://openalex.org/C31258907","wikidata":"https://www.wikidata.org/wiki/Q1301371","display_name":"Computer network","level":1,"score":0.5817556381225586},{"id":"https://openalex.org/C123745756","wikidata":"https://www.wikidata.org/wiki/Q1665949","display_name":"Interconnection","level":2,"score":0.46086442470550537},{"id":"https://openalex.org/C51185590","wikidata":"https://www.wikidata.org/wiki/Q1017228","display_name":"Bus sniffing","level":5,"score":0.45218318700790405},{"id":"https://openalex.org/C2777683733","wikidata":"https://www.wikidata.org/wiki/Q201456","display_name":"Directory","level":2,"score":0.4380890130996704},{"id":"https://openalex.org/C48145219","wikidata":"https://www.wikidata.org/wiki/Q1335365","display_name":"Security token","level":2,"score":0.434698224067688},{"id":"https://openalex.org/C38556500","wikidata":"https://www.wikidata.org/wiki/Q13404475","display_name":"Cache algorithms","level":4,"score":0.4326283931732178},{"id":"https://openalex.org/C173608175","wikidata":"https://www.wikidata.org/wiki/Q232661","display_name":"Parallel computing","level":1,"score":0.34109196066856384},{"id":"https://openalex.org/C111919701","wikidata":"https://www.wikidata.org/wiki/Q9135","display_name":"Operating system","level":1,"score":0.29106253385543823},{"id":"https://openalex.org/C189783530","wikidata":"https://www.wikidata.org/wiki/Q352090","display_name":"CPU cache","level":3,"score":0.27621668577194214}],"mesh":[],"locations_count":2,"locations":[{"id":"doi:10.1109/ipdps.2008.4536287","is_oa":false,"landing_page_url":"https://doi.org/10.1109/ipdps.2008.4536287","pdf_url":null,"source":{"id":"https://openalex.org/S4210174069","display_name":"Proceedings - IEEE International Parallel and Distributed Processing Symposium","issn_l":"1530-2075","issn":["1530-2075"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310319808","host_organization_name":"Institute of Electrical and Electronics Engineers","host_organization_lineage":["https://openalex.org/P4310319808"],"host_organization_lineage_names":["Institute of Electrical and Electronics Engineers"],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2008 IEEE International Symposium on Parallel and Distributed Processing","raw_type":"proceedings-article"},{"id":"pmh:oai:CiteSeerX.psu:10.1.1.559.11","is_oa":false,"landing_page_url":"http://citeseerx.ist.psu.edu/viewdoc/summary?doi=10.1.1.559.11","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"submittedVersion","is_accepted":false,"is_published":false,"raw_source_name":"","raw_type":"text"}],"best_oa_location":null,"sustainable_development_goals":[{"score":0.6499999761581421,"id":"https://metadata.un.org/sdg/7","display_name":"Affordable and clean energy"}],"awards":[],"funders":[{"id":"https://openalex.org/F4320313710","display_name":"Menzies School of Health Research","ror":"https://ror.org/006mbby82"}],"has_content":{"pdf":false,"grobid_xml":false},"content_urls":null,"referenced_works_count":40,"referenced_works":["https://openalex.org/W1769402780","https://openalex.org/W1838445182","https://openalex.org/W1955250293","https://openalex.org/W2055204455","https://openalex.org/W2099373777","https://openalex.org/W2102453798","https://openalex.org/W2109681980","https://openalex.org/W2114421447","https://openalex.org/W2114995630","https://openalex.org/W2118543332","https://openalex.org/W2120635877","https://openalex.org/W2126372249","https://openalex.org/W2135673469","https://openalex.org/W2139239342","https://openalex.org/W2141386638","https://openalex.org/W2142002613","https://openalex.org/W2143515003","https://openalex.org/W2145021036","https://openalex.org/W2145252892","https://openalex.org/W2148954445","https://openalex.org/W2163061018","https://openalex.org/W2163691271","https://openalex.org/W2164264749","https://openalex.org/W2167848093","https://openalex.org/W2169387321","https://openalex.org/W2170068005","https://openalex.org/W2170653240","https://openalex.org/W2171164959","https://openalex.org/W2172212694","https://openalex.org/W3148484433","https://openalex.org/W4232116545","https://openalex.org/W4238549726","https://openalex.org/W4244034697","https://openalex.org/W4248342989","https://openalex.org/W4249165316","https://openalex.org/W4255387252","https://openalex.org/W4255628813","https://openalex.org/W4255746825","https://openalex.org/W6676231733","https://openalex.org/W6793277613"],"related_works":["https://openalex.org/W2290195868","https://openalex.org/W2584505417","https://openalex.org/W4285204597","https://openalex.org/W1555453305","https://openalex.org/W3193874149","https://openalex.org/W2987765027","https://openalex.org/W2290179447","https://openalex.org/W2123859627","https://openalex.org/W1993010599","https://openalex.org/W3139889547"],"abstract_inverted_index":{"Future":[0],"CMP":[1,109,113],"designs":[2],"that":[3,135,165,211],"will":[4,11,44],"integrate":[5],"tens":[6],"of":[7,24,49,116,206,218,232,235],"processor":[8],"cores":[9],"on-chip":[10,32],"be":[12,46,172],"constrained":[13],"by":[14,154,193],"area":[15],"and":[16,35,71,121,177,228],"power.":[17],"Area":[18],"constraints":[19,52],"make":[20,53],"impractical":[21,54],"the":[22,31,47,114,133,138,146,160,179,190],"use":[23],"a":[25,28,40,99,141,151,225],"bus":[26],"or":[27,62],"crossbar":[29],"as":[30],"interconnection":[33,42,191],"network,":[34],"tiled":[36,108],"CMPs":[37],"organized":[38],"around":[39],"direct":[41],"network":[43,180,233],"probably":[45],"architecture":[48],"choice.":[50],"Power":[51],"to":[55,85,106,132,150,163,183,220,237,242],"rely":[56],"on":[57,140,222,239],"broadcasts":[58],"(as":[59,169],"Token-CMP":[60,184],"does)":[61],"any":[63],"other":[64],"brute-force":[65,175],"method":[66],"for":[67,126,199],"keeping":[68],"cache":[69,73,101,134],"coherence,":[70],"directory-based":[72],"coherence":[74,102,156],"protocols":[75,82],"are":[76],"currently":[77],"being":[78],"employed.":[79],"Unfortunately,":[80],"directory":[81,87,152,226],"introduce":[83],"indirection":[84],"access":[86],"information,":[88],"which":[89],"negatively":[90],"impacts":[91],"performance.":[92],"In":[93,111],"this":[94],"work,":[95],"we":[96,209],"present":[97],"DiCo-CMP,":[98],"novel":[100],"protocol":[103,153],"especially":[104],"suited":[105],"future":[107],"architectures.":[110],"DiCo-":[112],"role":[115],"storing":[117],"up-to-date":[118],"sharing":[119],"information":[120],"ensuring":[122],"totally":[123],"ordered":[124],"accesses":[125],"every":[127],"memory":[128],"block":[129,139],"is":[130],"assigned":[131],"must":[136,166],"provide":[137],"miss.":[142,201],"Therefore,":[143],"DiCo-CMP":[144,212],"reduces":[145,178],"miss":[147],"latency":[148],"compared":[149,182,241],"sending":[155,194],"messages":[157],"directly":[158],"from":[159],"requesting":[161],"caches":[162],"those":[164],"observe":[167],"them":[168],"it":[170],"would":[171],"done":[173],"in":[174,189,215,230],"protocols),":[176],"traffic":[181,234],"(and":[185],"consequently,":[186],"power":[187],"consumption":[188],"network)":[192],"just":[195],"one":[196],"request":[197],"message":[198],"each":[200],"Using":[202],"an":[203],"extended":[204],"version":[205],"GEMS":[207],"simulator":[208],"show":[210],"achieves":[213],"improvements":[214],"execution":[216],"time":[217],"up":[219,236],"8%":[221],"average":[223,240],"over":[224],"protocol,":[227],"reductions":[229],"terms":[231],"42%":[238],"Token-CMP.":[243]},"counts_by_year":[{"year":2024,"cited_by_count":1},{"year":2022,"cited_by_count":2},{"year":2021,"cited_by_count":1},{"year":2020,"cited_by_count":1},{"year":2018,"cited_by_count":1},{"year":2017,"cited_by_count":2},{"year":2016,"cited_by_count":2},{"year":2015,"cited_by_count":3},{"year":2014,"cited_by_count":5},{"year":2013,"cited_by_count":2},{"year":2012,"cited_by_count":5}],"updated_date":"2026-07-29T14:22:42.915294","created_date":"2025-10-10T00:00:00"}
