{"id":"https://openalex.org/W3147174270","doi":"https://doi.org/10.1109/ipdps.2006.1639465","title":"Increasing analog programmability in SoCs","display_name":"Increasing analog programmability in SoCs","publication_year":2006,"publication_date":"2006-01-01","ids":{"openalex":"https://openalex.org/W3147174270","doi":"https://doi.org/10.1109/ipdps.2006.1639465","mag":"3147174270"},"language":"en","primary_location":{"id":"doi:10.1109/ipdps.2006.1639465","is_oa":false,"landing_page_url":"https://doi.org/10.1109/ipdps.2006.1639465","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"Proceedings 20th IEEE International Parallel &amp; Distributed Processing Symposium","raw_type":"proceedings-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5069177613","display_name":"Erik Sch\u00fcler","orcid":null},"institutions":[{"id":"https://openalex.org/I130442723","display_name":"Universidade Federal do Rio Grande do Sul","ror":"https://ror.org/041yk2d64","country_code":"BR","type":"education","lineage":["https://openalex.org/I130442723"]}],"countries":["BR"],"is_corresponding":true,"raw_author_name":"E. Schuler","raw_affiliation_strings":["Department of Electrical Engineering, UFRGS, Porto Alegre, Brazil"],"affiliations":[{"raw_affiliation_string":"Department of Electrical Engineering, UFRGS, Porto Alegre, Brazil","institution_ids":["https://openalex.org/I130442723"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5062358729","display_name":"Luigi Carro","orcid":"https://orcid.org/0000-0002-7402-4780"},"institutions":[{"id":"https://openalex.org/I130442723","display_name":"Universidade Federal do Rio Grande do Sul","ror":"https://ror.org/041yk2d64","country_code":"BR","type":"education","lineage":["https://openalex.org/I130442723"]}],"countries":["BR"],"is_corresponding":false,"raw_author_name":"L. Carro","raw_affiliation_strings":["Department of Electrical Engineering, UFRGS, Porto Alegre, Brazil"],"affiliations":[{"raw_affiliation_string":"Department of Electrical Engineering, UFRGS, Porto Alegre, Brazil","institution_ids":["https://openalex.org/I130442723"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":2,"corresponding_author_ids":["https://openalex.org/A5069177613"],"corresponding_institution_ids":["https://openalex.org/I130442723"],"apc_list":null,"apc_paid":null,"fwci":0.0,"has_fulltext":false,"cited_by_count":0,"citation_normalized_percentile":{"value":0.37856159,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":null,"biblio":{"volume":null,"issue":null,"first_page":"4 pp.","last_page":"4 pp."},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10904","display_name":"Embedded Systems Design Techniques","score":0.9968000054359436,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10904","display_name":"Embedded Systems Design Techniques","score":0.9968000054359436,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11032","display_name":"VLSI and Analog Circuit Testing","score":0.9922000169754028,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11522","display_name":"VLSI and FPGA Design Techniques","score":0.9896000027656555,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.628655195236206},{"id":"https://openalex.org/keywords/system-on-a-chip","display_name":"System on a chip","score":0.5797480344772339},{"id":"https://openalex.org/keywords/cover","display_name":"Cover (algebra)","score":0.5434913039207458},{"id":"https://openalex.org/keywords/electronic-engineering","display_name":"Electronic engineering","score":0.4976651966571808},{"id":"https://openalex.org/keywords/radio-frequency","display_name":"Radio frequency","score":0.4213404655456543},{"id":"https://openalex.org/keywords/chip","display_name":"Chip","score":0.4159241318702698},{"id":"https://openalex.org/keywords/instrumentation","display_name":"Instrumentation (computer programming)","score":0.41341933608055115},{"id":"https://openalex.org/keywords/embedded-system","display_name":"Embedded system","score":0.4128810465335846},{"id":"https://openalex.org/keywords/engineering","display_name":"Engineering","score":0.26665109395980835},{"id":"https://openalex.org/keywords/telecommunications","display_name":"Telecommunications","score":0.1795041561126709}],"concepts":[{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.628655195236206},{"id":"https://openalex.org/C118021083","wikidata":"https://www.wikidata.org/wiki/Q610398","display_name":"System on a chip","level":2,"score":0.5797480344772339},{"id":"https://openalex.org/C2780428219","wikidata":"https://www.wikidata.org/wiki/Q16952335","display_name":"Cover (algebra)","level":2,"score":0.5434913039207458},{"id":"https://openalex.org/C24326235","wikidata":"https://www.wikidata.org/wiki/Q126095","display_name":"Electronic engineering","level":1,"score":0.4976651966571808},{"id":"https://openalex.org/C74064498","wikidata":"https://www.wikidata.org/wiki/Q3396184","display_name":"Radio frequency","level":2,"score":0.4213404655456543},{"id":"https://openalex.org/C165005293","wikidata":"https://www.wikidata.org/wiki/Q1074500","display_name":"Chip","level":2,"score":0.4159241318702698},{"id":"https://openalex.org/C118530786","wikidata":"https://www.wikidata.org/wiki/Q1134732","display_name":"Instrumentation (computer programming)","level":2,"score":0.41341933608055115},{"id":"https://openalex.org/C149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","level":1,"score":0.4128810465335846},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.26665109395980835},{"id":"https://openalex.org/C76155785","wikidata":"https://www.wikidata.org/wiki/Q418","display_name":"Telecommunications","level":1,"score":0.1795041561126709},{"id":"https://openalex.org/C111919701","wikidata":"https://www.wikidata.org/wiki/Q9135","display_name":"Operating system","level":1,"score":0.0},{"id":"https://openalex.org/C78519656","wikidata":"https://www.wikidata.org/wiki/Q101333","display_name":"Mechanical engineering","level":1,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/ipdps.2006.1639465","is_oa":false,"landing_page_url":"https://doi.org/10.1109/ipdps.2006.1639465","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"Proceedings 20th IEEE International Parallel &amp; Distributed Processing Symposium","raw_type":"proceedings-article"}],"best_oa_location":null,"sustainable_development_goals":[],"awards":[],"funders":[],"has_content":{"grobid_xml":false,"pdf":false},"content_urls":null,"referenced_works_count":6,"referenced_works":["https://openalex.org/W1499518662","https://openalex.org/W1573278177","https://openalex.org/W2149518767","https://openalex.org/W4235685203","https://openalex.org/W4239318364","https://openalex.org/W6634103060"],"related_works":["https://openalex.org/W1972557159","https://openalex.org/W562823126","https://openalex.org/W2165392093","https://openalex.org/W2106037662","https://openalex.org/W1530419332","https://openalex.org/W2469134140","https://openalex.org/W2993874308","https://openalex.org/W2113699753","https://openalex.org/W2115579119","https://openalex.org/W2017236304"],"abstract_inverted_index":{"The":[0],"use":[1,71],"of":[2,14,21,72,80],"programmability":[3,56],"in":[4,57,76],"systems-on-chip":[5],"(SoC)":[6],"brings":[7],"as":[8],"the":[9,12,16,19,54,70,73,88],"main":[10],"advantage":[11],"possibility":[13],"reducing":[15],"time-to-market":[17],"and":[18,27,36],"cost":[20],"design,":[22],"specially":[23],"when":[24],"different":[25,31],"systems":[26],"functions":[28],"must":[29],"cover":[30],"markets,":[32],"going":[33],"from":[34,94],"low-power":[35],"low-frequency":[37],"instrumentation":[38],"to":[39,52,63,96],"high":[40],"frequency":[41],"communication.":[42],"This":[43],"paper":[44],"presents":[45],"a":[46,58,77],"technique":[47,90],"that":[48,87],"can":[49,91],"be":[50,92],"used":[51,93],"increase":[53],"analog":[55,66,74],"SoC,":[59],"also":[60],"allowing":[61],"one":[62],"integrate":[64],"more":[65],"functions,":[67],"while":[68],"guaranteeing":[69],"part":[75],"larger":[78],"range":[79],"applications.":[81],"Practical":[82],"results":[83],"are":[84],"presented":[85],"showing":[86],"proposed":[89],"DC":[95],"RF":[97],"applications":[98]},"counts_by_year":[],"updated_date":"2025-11-06T03:46:38.306776","created_date":"2025-10-10T00:00:00"}
