{"id":"https://openalex.org/W4236792074","doi":"https://doi.org/10.1109/ipdps.2006.1639326","title":"Coterminous locality and coterminous group data prefetching on chip-multiprocessors","display_name":"Coterminous locality and coterminous group data prefetching on chip-multiprocessors","publication_year":2006,"publication_date":"2006-01-01","ids":{"openalex":"https://openalex.org/W4236792074","doi":"https://doi.org/10.1109/ipdps.2006.1639326"},"language":"en","primary_location":{"id":"doi:10.1109/ipdps.2006.1639326","is_oa":false,"landing_page_url":"https://doi.org/10.1109/ipdps.2006.1639326","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"Proceedings 20th IEEE International Parallel &amp; Distributed Processing Symposium","raw_type":"proceedings-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5102974424","display_name":"Xudong Shi","orcid":"https://orcid.org/0000-0001-6469-3481"},"institutions":[{"id":"https://openalex.org/I33213144","display_name":"University of Florida","ror":"https://ror.org/02y3ad647","country_code":"US","type":"education","lineage":["https://openalex.org/I33213144"]}],"countries":["US"],"is_corresponding":true,"raw_author_name":"Xudong Shi","raw_affiliation_strings":["Computer & Information Science & Engineering, University of Florida, Gainesville, FL, USA"],"affiliations":[{"raw_affiliation_string":"Computer & Information Science & Engineering, University of Florida, Gainesville, FL, USA","institution_ids":["https://openalex.org/I33213144"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5100354830","display_name":"Zhen Yang","orcid":"https://orcid.org/0009-0002-5594-4546"},"institutions":[{"id":"https://openalex.org/I33213144","display_name":"University of Florida","ror":"https://ror.org/02y3ad647","country_code":"US","type":"education","lineage":["https://openalex.org/I33213144"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Zhen Yang","raw_affiliation_strings":["Computer & Information Science & Engineering, University of Florida, Gainesville, FL, USA"],"affiliations":[{"raw_affiliation_string":"Computer & Information Science & Engineering, University of Florida, Gainesville, FL, USA","institution_ids":["https://openalex.org/I33213144"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5110277378","display_name":"Jih-Kwon Peir","orcid":null},"institutions":[{"id":"https://openalex.org/I33213144","display_name":"University of Florida","ror":"https://ror.org/02y3ad647","country_code":"US","type":"education","lineage":["https://openalex.org/I33213144"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Jih-Kwon Peir","raw_affiliation_strings":["Computer & Information Science & Engineering, University of Florida, Gainesville, FL, USA"],"affiliations":[{"raw_affiliation_string":"Computer & Information Science & Engineering, University of Florida, Gainesville, FL, USA","institution_ids":["https://openalex.org/I33213144"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5017071421","display_name":"Peng Lu","orcid":"https://orcid.org/0000-0001-5611-4902"},"institutions":[{"id":"https://openalex.org/I121820613","display_name":"Louisiana State University","ror":"https://ror.org/05ect4e57","country_code":"US","type":"education","lineage":["https://openalex.org/I121820613"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Lu Peng","raw_affiliation_strings":["Electrical & Computer Engineering, Louisiana State University, Baton Rouge, LA, USA"],"affiliations":[{"raw_affiliation_string":"Electrical & Computer Engineering, Louisiana State University, Baton Rouge, LA, USA","institution_ids":["https://openalex.org/I121820613"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5042651234","display_name":"Yen-Kuang Chen","orcid":"https://orcid.org/0000-0003-4546-9497"},"institutions":[{"id":"https://openalex.org/I1343180700","display_name":"Intel (United States)","ror":"https://ror.org/01ek73717","country_code":"US","type":"company","lineage":["https://openalex.org/I1343180700"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Yen-Kuang Chen","raw_affiliation_strings":["Architecture Research Laboratory, Intel Corporation, Santa Clara, CA, USA"],"affiliations":[{"raw_affiliation_string":"Architecture Research Laboratory, Intel Corporation, Santa Clara, CA, USA","institution_ids":["https://openalex.org/I1343180700"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5039542483","display_name":"Vint Lee","orcid":null},"institutions":[{"id":"https://openalex.org/I1343180700","display_name":"Intel (United States)","ror":"https://ror.org/01ek73717","country_code":"US","type":"company","lineage":["https://openalex.org/I1343180700"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"V. Lee","raw_affiliation_strings":["Architecture Research Laboratory, Intel Corporation, Santa Clara, CA, USA"],"affiliations":[{"raw_affiliation_string":"Architecture Research Laboratory, Intel Corporation, Santa Clara, CA, USA","institution_ids":["https://openalex.org/I1343180700"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5040243330","display_name":"B. Liang","orcid":null},"institutions":[{"id":"https://openalex.org/I1343180700","display_name":"Intel (United States)","ror":"https://ror.org/01ek73717","country_code":"US","type":"company","lineage":["https://openalex.org/I1343180700"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"B. Liang","raw_affiliation_strings":["Architecture Research Laboratory, Intel Corporation, Santa Clara, CA, USA"],"affiliations":[{"raw_affiliation_string":"Architecture Research Laboratory, Intel Corporation, Santa Clara, CA, USA","institution_ids":["https://openalex.org/I1343180700"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":7,"corresponding_author_ids":["https://openalex.org/A5102974424"],"corresponding_institution_ids":["https://openalex.org/I33213144"],"apc_list":null,"apc_paid":null,"fwci":0.2685002,"has_fulltext":false,"cited_by_count":4,"citation_normalized_percentile":{"value":0.603233,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":{"min":94,"max":96},"biblio":{"volume":"16","issue":null,"first_page":"10 pp.","last_page":"10 pp."},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10054","display_name":"Parallel Computing and Optimization Techniques","score":1.0,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10054","display_name":"Parallel Computing and Optimization Techniques","score":1.0,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11181","display_name":"Advanced Data Storage Technologies","score":0.9998000264167786,"subfield":{"id":"https://openalex.org/subfields/1705","display_name":"Computer Networks and Communications"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10829","display_name":"Interconnection Networks and Systems","score":0.9995999932289124,"subfield":{"id":"https://openalex.org/subfields/1705","display_name":"Computer Networks and Communications"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/locality","display_name":"Locality","score":0.8106294870376587},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.7657750844955444},{"id":"https://openalex.org/keywords/cache","display_name":"Cache","score":0.6008991599082947},{"id":"https://openalex.org/keywords/parallel-computing","display_name":"Parallel computing","score":0.5792128443717957},{"id":"https://openalex.org/keywords/workload","display_name":"Workload","score":0.4840918779373169},{"id":"https://openalex.org/keywords/chip","display_name":"Chip","score":0.4721370339393616},{"id":"https://openalex.org/keywords/reuse","display_name":"Reuse","score":0.4592539966106415},{"id":"https://openalex.org/keywords/cache-pollution","display_name":"Cache pollution","score":0.4559531509876251},{"id":"https://openalex.org/keywords/interconnection","display_name":"Interconnection","score":0.4240735173225403},{"id":"https://openalex.org/keywords/locality-of-reference","display_name":"Locality of reference","score":0.42343127727508545},{"id":"https://openalex.org/keywords/block","display_name":"Block (permutation group theory)","score":0.4187883734703064},{"id":"https://openalex.org/keywords/cpu-cache","display_name":"CPU cache","score":0.3201969861984253},{"id":"https://openalex.org/keywords/operating-system","display_name":"Operating system","score":0.28850841522216797},{"id":"https://openalex.org/keywords/cache-algorithms","display_name":"Cache algorithms","score":0.2665155529975891},{"id":"https://openalex.org/keywords/computer-network","display_name":"Computer network","score":0.15587660670280457},{"id":"https://openalex.org/keywords/engineering","display_name":"Engineering","score":0.06801843643188477},{"id":"https://openalex.org/keywords/telecommunications","display_name":"Telecommunications","score":0.06548520922660828}],"concepts":[{"id":"https://openalex.org/C2779808786","wikidata":"https://www.wikidata.org/wiki/Q6664603","display_name":"Locality","level":2,"score":0.8106294870376587},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.7657750844955444},{"id":"https://openalex.org/C115537543","wikidata":"https://www.wikidata.org/wiki/Q165596","display_name":"Cache","level":2,"score":0.6008991599082947},{"id":"https://openalex.org/C173608175","wikidata":"https://www.wikidata.org/wiki/Q232661","display_name":"Parallel computing","level":1,"score":0.5792128443717957},{"id":"https://openalex.org/C2778476105","wikidata":"https://www.wikidata.org/wiki/Q628539","display_name":"Workload","level":2,"score":0.4840918779373169},{"id":"https://openalex.org/C165005293","wikidata":"https://www.wikidata.org/wiki/Q1074500","display_name":"Chip","level":2,"score":0.4721370339393616},{"id":"https://openalex.org/C206588197","wikidata":"https://www.wikidata.org/wiki/Q846574","display_name":"Reuse","level":2,"score":0.4592539966106415},{"id":"https://openalex.org/C113166858","wikidata":"https://www.wikidata.org/wiki/Q5015981","display_name":"Cache pollution","level":5,"score":0.4559531509876251},{"id":"https://openalex.org/C123745756","wikidata":"https://www.wikidata.org/wiki/Q1665949","display_name":"Interconnection","level":2,"score":0.4240735173225403},{"id":"https://openalex.org/C27602214","wikidata":"https://www.wikidata.org/wiki/Q1868547","display_name":"Locality of reference","level":3,"score":0.42343127727508545},{"id":"https://openalex.org/C2777210771","wikidata":"https://www.wikidata.org/wiki/Q4927124","display_name":"Block (permutation group theory)","level":2,"score":0.4187883734703064},{"id":"https://openalex.org/C189783530","wikidata":"https://www.wikidata.org/wiki/Q352090","display_name":"CPU cache","level":3,"score":0.3201969861984253},{"id":"https://openalex.org/C111919701","wikidata":"https://www.wikidata.org/wiki/Q9135","display_name":"Operating system","level":1,"score":0.28850841522216797},{"id":"https://openalex.org/C38556500","wikidata":"https://www.wikidata.org/wiki/Q13404475","display_name":"Cache algorithms","level":4,"score":0.2665155529975891},{"id":"https://openalex.org/C31258907","wikidata":"https://www.wikidata.org/wiki/Q1301371","display_name":"Computer network","level":1,"score":0.15587660670280457},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.06801843643188477},{"id":"https://openalex.org/C76155785","wikidata":"https://www.wikidata.org/wiki/Q418","display_name":"Telecommunications","level":1,"score":0.06548520922660828},{"id":"https://openalex.org/C2524010","wikidata":"https://www.wikidata.org/wiki/Q8087","display_name":"Geometry","level":1,"score":0.0},{"id":"https://openalex.org/C33923547","wikidata":"https://www.wikidata.org/wiki/Q395","display_name":"Mathematics","level":0,"score":0.0},{"id":"https://openalex.org/C41895202","wikidata":"https://www.wikidata.org/wiki/Q8162","display_name":"Linguistics","level":1,"score":0.0},{"id":"https://openalex.org/C138885662","wikidata":"https://www.wikidata.org/wiki/Q5891","display_name":"Philosophy","level":0,"score":0.0},{"id":"https://openalex.org/C548081761","wikidata":"https://www.wikidata.org/wiki/Q180388","display_name":"Waste management","level":1,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/ipdps.2006.1639326","is_oa":false,"landing_page_url":"https://doi.org/10.1109/ipdps.2006.1639326","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"Proceedings 20th IEEE International Parallel &amp; Distributed Processing Symposium","raw_type":"proceedings-article"}],"best_oa_location":null,"sustainable_development_goals":[],"awards":[],"funders":[{"id":"https://openalex.org/F4320306076","display_name":"National Science Foundation","ror":"https://ror.org/021nxhr62"},{"id":"https://openalex.org/F4320307102","display_name":"Intel Corporation","ror":"https://ror.org/01ek73717"}],"has_content":{"pdf":false,"grobid_xml":false},"content_urls":null,"referenced_works_count":28,"referenced_works":["https://openalex.org/W1967869476","https://openalex.org/W1981932714","https://openalex.org/W2016558956","https://openalex.org/W2107354725","https://openalex.org/W2119024804","https://openalex.org/W2120635877","https://openalex.org/W2128650116","https://openalex.org/W2132552633","https://openalex.org/W2148954445","https://openalex.org/W2152422320","https://openalex.org/W2153456949","https://openalex.org/W2156672769","https://openalex.org/W2159449877","https://openalex.org/W2170282806","https://openalex.org/W2170653240","https://openalex.org/W2537450429","https://openalex.org/W3024192220","https://openalex.org/W3148484433","https://openalex.org/W3155063289","https://openalex.org/W3209920695","https://openalex.org/W4214519867","https://openalex.org/W4237150160","https://openalex.org/W4238055111","https://openalex.org/W4253924656","https://openalex.org/W4254589276","https://openalex.org/W6682822640","https://openalex.org/W6682896276","https://openalex.org/W6793277613"],"related_works":["https://openalex.org/W1555349535","https://openalex.org/W2583128298","https://openalex.org/W2167303720","https://openalex.org/W2012518269","https://openalex.org/W4243772489","https://openalex.org/W2100416723","https://openalex.org/W57688818","https://openalex.org/W2141676084","https://openalex.org/W4235221324","https://openalex.org/W2143317419"],"abstract_inverted_index":{"Due":[0],"to":[1,112],"shared":[2],"cache":[3],"contentions":[4],"and":[5,20,118],"interconnect":[6],"delays,":[7],"data":[8,39,97],"prefetching":[9],"is":[10,63,73],"more":[11],"critical":[12],"in":[13,70,82,120],"alleviating":[14],"penalties":[15],"from":[16],"increasing":[17],"memory":[18,40],"latencies":[19],"demands":[21],"on":[22,87,99],"chip-multiprocessors":[23],"(CMPs).":[24],"Through":[25],"deep":[26],"analysis":[27],"of":[28,36,114,122],"SPEC2000":[29],"applications,":[30],"we":[31,92],"find":[32],"that":[33,66,104],"a":[34,57,68,71,94],"part":[35],"the":[37,75,83,88,105,115],"nearby":[38],"references":[41,54],"often":[42],"exhibit":[43],"highly-repeated":[44],"patterns":[45],"with":[46],"long,":[47],"but":[48],"equal":[49],"block":[50],"reuse":[51],"distance.":[52],"These":[53],"can":[55,108],"form":[56],"coterminous":[58,89],"group":[59],"(CG).":[60],"Coterminous":[61],"locality":[62,90],"introduced":[64],"as":[65],"when":[67],"member":[69],"CG":[72,96],"referenced,":[74],"remaining":[76],"members":[77],"will":[78],"likely":[79],"be":[80],"referenced":[81],"near":[84],"future.":[85],"Based":[86],"behavior,":[91],"implement":[93],"novel":[95],"prefetcher":[98,107],"CMPs.":[100],"Performance":[101],"evaluations":[102],"show":[103],"proposed":[106],"accurately":[109],"cover":[110],"up":[111],"40-50%":[113],"total":[116],"misses,":[117],"result":[119],"50-60%":[121],"potential":[123],"performance":[124],"improvement":[125],"for":[126],"several":[127],"selected":[128],"workload":[129],"mixes":[130]},"counts_by_year":[{"year":2012,"cited_by_count":2}],"updated_date":"2025-11-06T03:46:38.306776","created_date":"2025-10-10T00:00:00"}
