{"id":"https://openalex.org/W2119841583","doi":"https://doi.org/10.1109/ipdps.2004.1303123","title":"Designing a runtime reconfigurable processor for general purpose applications","display_name":"Designing a runtime reconfigurable processor for general purpose applications","publication_year":2004,"publication_date":"2004-06-10","ids":{"openalex":"https://openalex.org/W2119841583","doi":"https://doi.org/10.1109/ipdps.2004.1303123","mag":"2119841583"},"language":"en","primary_location":{"id":"doi:10.1109/ipdps.2004.1303123","is_oa":false,"landing_page_url":"https://doi.org/10.1109/ipdps.2004.1303123","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"18th International Parallel and Distributed Processing Symposium, 2004. Proceedings.","raw_type":"proceedings-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5020892518","display_name":"Adronis Niyonkuru","orcid":null},"institutions":[{"id":"https://openalex.org/I4210109719","display_name":"Bundeswehrkrankenhaus","ror":"https://ror.org/01wept116","country_code":"DE","type":"healthcare","lineage":["https://openalex.org/I4210109719","https://openalex.org/I4387152969"]},{"id":"https://openalex.org/I190134885","display_name":"Helmut Schmidt University","ror":"https://ror.org/04e8jbs38","country_code":"DE","type":"education","lineage":["https://openalex.org/I190134885"]}],"countries":["DE"],"is_corresponding":true,"raw_author_name":"A. Niyonkuru","raw_affiliation_strings":["Universit\u00e4t der Bundeswehr Hamburg, Hamburg, Germany","Univ. der Bundeswehr Hamburg, Germany"],"affiliations":[{"raw_affiliation_string":"Universit\u00e4t der Bundeswehr Hamburg, Hamburg, Germany","institution_ids":["https://openalex.org/I4210109719","https://openalex.org/I190134885"]},{"raw_affiliation_string":"Univ. der Bundeswehr Hamburg, Germany","institution_ids":["https://openalex.org/I4210109719"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5060205332","display_name":"Hans Christoph Zeidler","orcid":null},"institutions":[{"id":"https://openalex.org/I4210109719","display_name":"Bundeswehrkrankenhaus","ror":"https://ror.org/01wept116","country_code":"DE","type":"healthcare","lineage":["https://openalex.org/I4210109719","https://openalex.org/I4387152969"]},{"id":"https://openalex.org/I190134885","display_name":"Helmut Schmidt University","ror":"https://ror.org/04e8jbs38","country_code":"DE","type":"education","lineage":["https://openalex.org/I190134885"]}],"countries":["DE"],"is_corresponding":false,"raw_author_name":"H.C. Zeidler","raw_affiliation_strings":["Universit\u00e4t der Bundeswehr Hamburg, Hamburg, Germany","Univ. der Bundeswehr Hamburg, Germany"],"affiliations":[{"raw_affiliation_string":"Universit\u00e4t der Bundeswehr Hamburg, Hamburg, Germany","institution_ids":["https://openalex.org/I4210109719","https://openalex.org/I190134885"]},{"raw_affiliation_string":"Univ. der Bundeswehr Hamburg, Germany","institution_ids":["https://openalex.org/I4210109719"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":2,"corresponding_author_ids":["https://openalex.org/A5020892518"],"corresponding_institution_ids":["https://openalex.org/I190134885","https://openalex.org/I4210109719"],"apc_list":null,"apc_paid":null,"fwci":1.8431,"has_fulltext":false,"cited_by_count":13,"citation_normalized_percentile":{"value":0.85058071,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":{"min":89,"max":94},"biblio":{"volume":null,"issue":null,"first_page":"143","last_page":"149"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10904","display_name":"Embedded Systems Design Techniques","score":0.9998999834060669,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10904","display_name":"Embedded Systems Design Techniques","score":0.9998999834060669,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10054","display_name":"Parallel Computing and Optimization Techniques","score":0.9998000264167786,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10829","display_name":"Interconnection Networks and Systems","score":0.9987000226974487,"subfield":{"id":"https://openalex.org/subfields/1705","display_name":"Computer Networks and Communications"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.844716489315033},{"id":"https://openalex.org/keywords/control-reconfiguration","display_name":"Control reconfiguration","score":0.785180389881134},{"id":"https://openalex.org/keywords/embedded-system","display_name":"Embedded system","score":0.5788931846618652},{"id":"https://openalex.org/keywords/microprocessor","display_name":"Microprocessor","score":0.524181067943573},{"id":"https://openalex.org/keywords/process","display_name":"Process (computing)","score":0.5023837089538574},{"id":"https://openalex.org/keywords/cache","display_name":"Cache","score":0.485272616147995},{"id":"https://openalex.org/keywords/trace","display_name":"TRACE (psycholinguistics)","score":0.47012150287628174},{"id":"https://openalex.org/keywords/field-programmable-gate-array","display_name":"Field-programmable gate array","score":0.45021679997444153},{"id":"https://openalex.org/keywords/data-flow-diagram","display_name":"Data flow diagram","score":0.42753419280052185},{"id":"https://openalex.org/keywords/macro","display_name":"Macro","score":0.42202886939048767},{"id":"https://openalex.org/keywords/control-flow","display_name":"Control flow","score":0.41217151284217834},{"id":"https://openalex.org/keywords/computer-architecture","display_name":"Computer architecture","score":0.3949470818042755},{"id":"https://openalex.org/keywords/parallel-computing","display_name":"Parallel computing","score":0.3769785165786743},{"id":"https://openalex.org/keywords/operating-system","display_name":"Operating system","score":0.35973089933395386},{"id":"https://openalex.org/keywords/programming-language","display_name":"Programming language","score":0.17694616317749023}],"concepts":[{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.844716489315033},{"id":"https://openalex.org/C119701452","wikidata":"https://www.wikidata.org/wiki/Q5165881","display_name":"Control reconfiguration","level":2,"score":0.785180389881134},{"id":"https://openalex.org/C149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","level":1,"score":0.5788931846618652},{"id":"https://openalex.org/C2780728072","wikidata":"https://www.wikidata.org/wiki/Q5297","display_name":"Microprocessor","level":2,"score":0.524181067943573},{"id":"https://openalex.org/C98045186","wikidata":"https://www.wikidata.org/wiki/Q205663","display_name":"Process (computing)","level":2,"score":0.5023837089538574},{"id":"https://openalex.org/C115537543","wikidata":"https://www.wikidata.org/wiki/Q165596","display_name":"Cache","level":2,"score":0.485272616147995},{"id":"https://openalex.org/C75291252","wikidata":"https://www.wikidata.org/wiki/Q1315756","display_name":"TRACE (psycholinguistics)","level":2,"score":0.47012150287628174},{"id":"https://openalex.org/C42935608","wikidata":"https://www.wikidata.org/wiki/Q190411","display_name":"Field-programmable gate array","level":2,"score":0.45021679997444153},{"id":"https://openalex.org/C489000","wikidata":"https://www.wikidata.org/wiki/Q747385","display_name":"Data flow diagram","level":2,"score":0.42753419280052185},{"id":"https://openalex.org/C166955791","wikidata":"https://www.wikidata.org/wiki/Q629579","display_name":"Macro","level":2,"score":0.42202886939048767},{"id":"https://openalex.org/C160191386","wikidata":"https://www.wikidata.org/wiki/Q868299","display_name":"Control flow","level":2,"score":0.41217151284217834},{"id":"https://openalex.org/C118524514","wikidata":"https://www.wikidata.org/wiki/Q173212","display_name":"Computer architecture","level":1,"score":0.3949470818042755},{"id":"https://openalex.org/C173608175","wikidata":"https://www.wikidata.org/wiki/Q232661","display_name":"Parallel computing","level":1,"score":0.3769785165786743},{"id":"https://openalex.org/C111919701","wikidata":"https://www.wikidata.org/wiki/Q9135","display_name":"Operating system","level":1,"score":0.35973089933395386},{"id":"https://openalex.org/C199360897","wikidata":"https://www.wikidata.org/wiki/Q9143","display_name":"Programming language","level":1,"score":0.17694616317749023},{"id":"https://openalex.org/C41895202","wikidata":"https://www.wikidata.org/wiki/Q8162","display_name":"Linguistics","level":1,"score":0.0},{"id":"https://openalex.org/C138885662","wikidata":"https://www.wikidata.org/wiki/Q5891","display_name":"Philosophy","level":0,"score":0.0},{"id":"https://openalex.org/C77088390","wikidata":"https://www.wikidata.org/wiki/Q8513","display_name":"Database","level":1,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/ipdps.2004.1303123","is_oa":false,"landing_page_url":"https://doi.org/10.1109/ipdps.2004.1303123","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"18th International Parallel and Distributed Processing Symposium, 2004. Proceedings.","raw_type":"proceedings-article"}],"best_oa_location":null,"sustainable_development_goals":[{"score":0.5400000214576721,"id":"https://metadata.un.org/sdg/9","display_name":"Industry, innovation and infrastructure"}],"awards":[],"funders":[],"has_content":{"pdf":false,"grobid_xml":false},"content_urls":null,"referenced_works_count":24,"referenced_works":["https://openalex.org/W198709078","https://openalex.org/W1499156209","https://openalex.org/W1526526967","https://openalex.org/W1555556478","https://openalex.org/W1555915743","https://openalex.org/W1981057695","https://openalex.org/W2050998234","https://openalex.org/W2103518090","https://openalex.org/W2122992089","https://openalex.org/W2148911285","https://openalex.org/W2164490311","https://openalex.org/W2165099691","https://openalex.org/W2165423885","https://openalex.org/W2165666359","https://openalex.org/W2169601811","https://openalex.org/W2725179571","https://openalex.org/W2739649174","https://openalex.org/W4242630332","https://openalex.org/W4242976792","https://openalex.org/W4252466729","https://openalex.org/W6608173102","https://openalex.org/W6629799285","https://openalex.org/W6631419021","https://openalex.org/W6684387282"],"related_works":["https://openalex.org/W2095925360","https://openalex.org/W1549956274","https://openalex.org/W4246377515","https://openalex.org/W2052160877","https://openalex.org/W2040778456","https://openalex.org/W2148473336","https://openalex.org/W2119238100","https://openalex.org/W4254236578","https://openalex.org/W2144344516","https://openalex.org/W1754116331"],"abstract_inverted_index":{"Summary":[0],"form":[1,71],"only":[2],"given.":[3],"A":[4],"superscalar":[5],"microprocessor":[6],"with":[7],"a":[8,34,58,72],"variable":[9],"number":[10],"of":[11,27,51,78],"execution":[12,20,79],"units":[13,80],"which":[14],"are":[15,67],"dynamically":[16],"configured":[17],"during":[18],"program":[19],"has":[21],"been":[22],"modeled.":[23],"The":[24,85],"runtime":[25],"behaviour":[26],"an":[28],"executed":[29],"application":[30],"is":[31,43,92],"determined":[32],"using":[33],"trace":[35],"cache":[36],"and":[37,89],"the":[38,52],"most":[39],"suitable":[40],"hardware":[41],"configuration":[42],"loaded":[44],"dynamically.":[45],"We":[46],"discuss":[47],"major":[48],"design":[49,61],"aspects":[50],"ongoing":[53],"implementation":[54],"process":[55],"based":[56],"on":[57],"partial":[59],"reconfiguration":[60],"flow.":[62],"Thus,":[63],"some":[64],"microarchitectural":[65],"components":[66],"put":[68],"together":[69],"to":[70],"fixed":[73,88],"module":[74],"while":[75],"different":[76],"sets":[77],"build":[81],"up":[82],"reconfigurable":[83,90],"ones.":[84],"communication":[86],"between":[87],"modules":[91],"assured":[93],"by":[94],"Xilinx":[95],"bus":[96],"macros.":[97]},"counts_by_year":[{"year":2015,"cited_by_count":1},{"year":2014,"cited_by_count":1},{"year":2013,"cited_by_count":1}],"updated_date":"2025-11-06T03:46:38.306776","created_date":"2025-10-10T00:00:00"}