{"id":"https://openalex.org/W2124900722","doi":"https://doi.org/10.1109/ipdps.2004.1303117","title":"Hardware assisted two dimensional ultra fast placement","display_name":"Hardware assisted two dimensional ultra fast placement","publication_year":2004,"publication_date":"2004-06-10","ids":{"openalex":"https://openalex.org/W2124900722","doi":"https://doi.org/10.1109/ipdps.2004.1303117","mag":"2124900722"},"language":"en","primary_location":{"id":"doi:10.1109/ipdps.2004.1303117","is_oa":false,"landing_page_url":"https://doi.org/10.1109/ipdps.2004.1303117","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"18th International Parallel and Distributed Processing Symposium, 2004. Proceedings.","raw_type":"proceedings-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5024901422","display_name":"Manish Handa","orcid":null},"institutions":[{"id":"https://openalex.org/I63135867","display_name":"University of Cincinnati","ror":"https://ror.org/01e3m7079","country_code":"US","type":"education","lineage":["https://openalex.org/I63135867"]}],"countries":["US"],"is_corresponding":true,"raw_author_name":"M. Handa","raw_affiliation_strings":["Department of ECECS, University of Cincinnati, Cincinnati, OH, USA","Dept. of ECECS, Cincinnati Univ., OH, USA"],"affiliations":[{"raw_affiliation_string":"Department of ECECS, University of Cincinnati, Cincinnati, OH, USA","institution_ids":["https://openalex.org/I63135867"]},{"raw_affiliation_string":"Dept. of ECECS, Cincinnati Univ., OH, USA","institution_ids":["https://openalex.org/I63135867"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5040975645","display_name":"Ranga Vemuri","orcid":"https://orcid.org/0000-0002-4903-2746"},"institutions":[{"id":"https://openalex.org/I63135867","display_name":"University of Cincinnati","ror":"https://ror.org/01e3m7079","country_code":"US","type":"education","lineage":["https://openalex.org/I63135867"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"R. Vemuri","raw_affiliation_strings":["Department of ECECS, University of Cincinnati, Cincinnati, OH, USA","Dept. of ECECS, Cincinnati Univ., OH, USA"],"affiliations":[{"raw_affiliation_string":"Department of ECECS, University of Cincinnati, Cincinnati, OH, USA","institution_ids":["https://openalex.org/I63135867"]},{"raw_affiliation_string":"Dept. of ECECS, Cincinnati Univ., OH, USA","institution_ids":["https://openalex.org/I63135867"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":2,"corresponding_author_ids":["https://openalex.org/A5024901422"],"corresponding_institution_ids":["https://openalex.org/I63135867"],"apc_list":null,"apc_paid":null,"fwci":0.2633,"has_fulltext":false,"cited_by_count":2,"citation_normalized_percentile":{"value":0.57523163,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":null,"biblio":{"volume":"290","issue":null,"first_page":"140","last_page":"147"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10904","display_name":"Embedded Systems Design Techniques","score":0.9998000264167786,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10904","display_name":"Embedded Systems Design Techniques","score":0.9998000264167786,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11522","display_name":"VLSI and FPGA Design Techniques","score":0.9995999932289124,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10829","display_name":"Interconnection Networks and Systems","score":0.9991000294685364,"subfield":{"id":"https://openalex.org/subfields/1705","display_name":"Computer Networks and Communications"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.8430929183959961},{"id":"https://openalex.org/keywords/overhead","display_name":"Overhead (engineering)","score":0.6679337024688721},{"id":"https://openalex.org/keywords/process","display_name":"Process (computing)","score":0.6058008670806885},{"id":"https://openalex.org/keywords/field-programmable-gate-array","display_name":"Field-programmable gate array","score":0.5455741882324219},{"id":"https://openalex.org/keywords/embedded-system","display_name":"Embedded system","score":0.5454041957855225},{"id":"https://openalex.org/keywords/reconfigurable-computing","display_name":"Reconfigurable computing","score":0.5065239667892456},{"id":"https://openalex.org/keywords/parallel-computing","display_name":"Parallel computing","score":0.4894377291202545},{"id":"https://openalex.org/keywords/architecture","display_name":"Architecture","score":0.45438656210899353},{"id":"https://openalex.org/keywords/computer-architecture","display_name":"Computer architecture","score":0.44281578063964844},{"id":"https://openalex.org/keywords/computer-hardware","display_name":"Computer hardware","score":0.3827342987060547},{"id":"https://openalex.org/keywords/operating-system","display_name":"Operating system","score":0.15194496512413025}],"concepts":[{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.8430929183959961},{"id":"https://openalex.org/C2779960059","wikidata":"https://www.wikidata.org/wiki/Q7113681","display_name":"Overhead (engineering)","level":2,"score":0.6679337024688721},{"id":"https://openalex.org/C98045186","wikidata":"https://www.wikidata.org/wiki/Q205663","display_name":"Process (computing)","level":2,"score":0.6058008670806885},{"id":"https://openalex.org/C42935608","wikidata":"https://www.wikidata.org/wiki/Q190411","display_name":"Field-programmable gate array","level":2,"score":0.5455741882324219},{"id":"https://openalex.org/C149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","level":1,"score":0.5454041957855225},{"id":"https://openalex.org/C142962650","wikidata":"https://www.wikidata.org/wiki/Q240838","display_name":"Reconfigurable computing","level":3,"score":0.5065239667892456},{"id":"https://openalex.org/C173608175","wikidata":"https://www.wikidata.org/wiki/Q232661","display_name":"Parallel computing","level":1,"score":0.4894377291202545},{"id":"https://openalex.org/C123657996","wikidata":"https://www.wikidata.org/wiki/Q12271","display_name":"Architecture","level":2,"score":0.45438656210899353},{"id":"https://openalex.org/C118524514","wikidata":"https://www.wikidata.org/wiki/Q173212","display_name":"Computer architecture","level":1,"score":0.44281578063964844},{"id":"https://openalex.org/C9390403","wikidata":"https://www.wikidata.org/wiki/Q3966","display_name":"Computer hardware","level":1,"score":0.3827342987060547},{"id":"https://openalex.org/C111919701","wikidata":"https://www.wikidata.org/wiki/Q9135","display_name":"Operating system","level":1,"score":0.15194496512413025},{"id":"https://openalex.org/C153349607","wikidata":"https://www.wikidata.org/wiki/Q36649","display_name":"Visual arts","level":1,"score":0.0},{"id":"https://openalex.org/C142362112","wikidata":"https://www.wikidata.org/wiki/Q735","display_name":"Art","level":0,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/ipdps.2004.1303117","is_oa":false,"landing_page_url":"https://doi.org/10.1109/ipdps.2004.1303117","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"18th International Parallel and Distributed Processing Symposium, 2004. Proceedings.","raw_type":"proceedings-article"}],"best_oa_location":null,"sustainable_development_goals":[{"id":"https://metadata.un.org/sdg/9","score":0.4099999964237213,"display_name":"Industry, innovation and infrastructure"}],"awards":[],"funders":[],"has_content":{"pdf":false,"grobid_xml":false},"content_urls":null,"referenced_works_count":16,"referenced_works":["https://openalex.org/W186640888","https://openalex.org/W1526797733","https://openalex.org/W1576594927","https://openalex.org/W1823959354","https://openalex.org/W1839353707","https://openalex.org/W2076639376","https://openalex.org/W2079543149","https://openalex.org/W2098769867","https://openalex.org/W2100412947","https://openalex.org/W2140510043","https://openalex.org/W2141219405","https://openalex.org/W4237094247","https://openalex.org/W4244639180","https://openalex.org/W4248438810","https://openalex.org/W4285719527","https://openalex.org/W6674963508"],"related_works":["https://openalex.org/W1612076744","https://openalex.org/W2152074211","https://openalex.org/W2126857316","https://openalex.org/W2129019972","https://openalex.org/W3164085601","https://openalex.org/W1522032972","https://openalex.org/W2139962137","https://openalex.org/W2113308450","https://openalex.org/W1967938402","https://openalex.org/W2386041993"],"abstract_inverted_index":{"Summary":[0],"form":[1],"only":[2],"given.":[3],"Placement":[4],"time":[5,13],"is":[6],"an":[7,15],"overhead":[8],"on":[9],"the":[10,24,28,37],"application":[11],"execution":[12,61],"in":[14],"online":[16,48],"placement":[17,38,71],"system.":[18],"In":[19],"a":[20,74],"partially":[21],"reconfigurable":[22,29],"system,":[23],"inherent":[25],"parallelism":[26],"of":[27,67,78],"hardware":[30,79],"can":[31],"be":[32],"explored":[33],"to":[34],"speed":[35],"up":[36],"process.":[39],"We":[40],"present":[41],"three":[42],"different":[43,53],"architectures":[44,64],"for":[45],"two":[46],"dimensional":[47],"placement.":[49],"Each":[50],"architecture":[51],"makes":[52],"trade-offs":[54],"between":[55],"area":[56],"usage,":[57],"memory":[58],"requirement":[59],"and":[60],"time.":[62],"These":[63],"are":[65],"capable":[66],"achieving":[68],"very":[69,75],"fast":[70],"while":[72],"using":[73],"small":[76],"number":[77],"resources.":[80]},"counts_by_year":[],"updated_date":"2025-11-06T03:46:38.306776","created_date":"2025-10-10T00:00:00"}
