{"id":"https://openalex.org/W2167655076","doi":"https://doi.org/10.1109/ipdps.2004.1303109","title":"System-level parallelism and throughput optimization in designing reconfigurable computing applications","display_name":"System-level parallelism and throughput optimization in designing reconfigurable computing applications","publication_year":2004,"publication_date":"2004-06-10","ids":{"openalex":"https://openalex.org/W2167655076","doi":"https://doi.org/10.1109/ipdps.2004.1303109","mag":"2167655076"},"language":"en","primary_location":{"id":"doi:10.1109/ipdps.2004.1303109","is_oa":false,"landing_page_url":"https://doi.org/10.1109/ipdps.2004.1303109","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"18th International Parallel and Distributed Processing Symposium, 2004. Proceedings.","raw_type":"proceedings-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5057201097","display_name":"Esam El\u2010Araby","orcid":"https://orcid.org/0000-0002-4575-1049"},"institutions":[{"id":"https://openalex.org/I193531525","display_name":"George Washington University","ror":"https://ror.org/00y4zzh67","country_code":"US","type":"education","lineage":["https://openalex.org/I193531525"]}],"countries":["US"],"is_corresponding":true,"raw_author_name":"E. El-Araby","raw_affiliation_strings":["George Washington University, USA"],"affiliations":[{"raw_affiliation_string":"George Washington University, USA","institution_ids":["https://openalex.org/I193531525"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5036641211","display_name":"Mohamed Taher","orcid":"https://orcid.org/0000-0002-4808-4018"},"institutions":[{"id":"https://openalex.org/I193531525","display_name":"George Washington University","ror":"https://ror.org/00y4zzh67","country_code":"US","type":"education","lineage":["https://openalex.org/I193531525"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"M. Taher","raw_affiliation_strings":["George Washington University, USA"],"affiliations":[{"raw_affiliation_string":"George Washington University, USA","institution_ids":["https://openalex.org/I193531525"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5004924763","display_name":"Kris Gaj","orcid":"https://orcid.org/0000-0002-5050-8748"},"institutions":[{"id":"https://openalex.org/I162714631","display_name":"George Mason University","ror":"https://ror.org/02jqj7156","country_code":"US","type":"education","lineage":["https://openalex.org/I162714631"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"K. Gaj","raw_affiliation_strings":["George Mason University, USA"],"affiliations":[{"raw_affiliation_string":"George Mason University, USA","institution_ids":["https://openalex.org/I162714631"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5001914825","display_name":"Tarek El\u2010Ghazawi","orcid":"https://orcid.org/0000-0001-9687-7939"},"institutions":[{"id":"https://openalex.org/I193531525","display_name":"George Washington University","ror":"https://ror.org/00y4zzh67","country_code":"US","type":"education","lineage":["https://openalex.org/I193531525"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"T. El-Ghazawi","raw_affiliation_strings":["George Washington University, USA"],"affiliations":[{"raw_affiliation_string":"George Washington University, USA","institution_ids":["https://openalex.org/I193531525"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5014103317","display_name":"David Caliga","orcid":null},"institutions":[],"countries":[],"is_corresponding":false,"raw_author_name":"D. Caliga","raw_affiliation_strings":["SRC Computers, Inc"],"affiliations":[{"raw_affiliation_string":"SRC Computers, Inc","institution_ids":[]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5074779638","display_name":"Nikitas A. Alexandridis","orcid":null},"institutions":[],"countries":[],"is_corresponding":false,"raw_author_name":"N. Alexandridis","raw_affiliation_strings":["SRC Computers, Inc"],"affiliations":[{"raw_affiliation_string":"SRC Computers, Inc","institution_ids":[]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":6,"corresponding_author_ids":["https://openalex.org/A5057201097"],"corresponding_institution_ids":["https://openalex.org/I193531525"],"apc_list":null,"apc_paid":null,"fwci":1.0932,"has_fulltext":false,"cited_by_count":6,"citation_normalized_percentile":{"value":0.80675181,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":null,"biblio":{"volume":null,"issue":null,"first_page":"136","last_page":"143"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10688","display_name":"Image and Signal Denoising Methods","score":0.9961000084877014,"subfield":{"id":"https://openalex.org/subfields/1707","display_name":"Computer Vision and Pattern Recognition"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10688","display_name":"Image and Signal Denoising Methods","score":0.9961000084877014,"subfield":{"id":"https://openalex.org/subfields/1707","display_name":"Computer Vision and Pattern Recognition"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11992","display_name":"CCD and CMOS Imaging Sensors","score":0.9916999936103821,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10901","display_name":"Advanced Data Compression Techniques","score":0.9904000163078308,"subfield":{"id":"https://openalex.org/subfields/1707","display_name":"Computer Vision and Pattern Recognition"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.8192642331123352},{"id":"https://openalex.org/keywords/bottleneck","display_name":"Bottleneck","score":0.7410392761230469},{"id":"https://openalex.org/keywords/field-programmable-gate-array","display_name":"Field-programmable gate array","score":0.6839622855186462},{"id":"https://openalex.org/keywords/parallel-computing","display_name":"Parallel computing","score":0.6598744988441467},{"id":"https://openalex.org/keywords/leverage","display_name":"Leverage (statistics)","score":0.6184314489364624},{"id":"https://openalex.org/keywords/reconfigurable-computing","display_name":"Reconfigurable computing","score":0.5847440958023071},{"id":"https://openalex.org/keywords/computer-architecture","display_name":"Computer architecture","score":0.5339744091033936},{"id":"https://openalex.org/keywords/throughput","display_name":"Throughput","score":0.5301899313926697},{"id":"https://openalex.org/keywords/computation","display_name":"Computation","score":0.5150146484375},{"id":"https://openalex.org/keywords/microprocessor","display_name":"Microprocessor","score":0.4660407602787018},{"id":"https://openalex.org/keywords/embedded-system","display_name":"Embedded system","score":0.4523712694644928},{"id":"https://openalex.org/keywords/algorithm","display_name":"Algorithm","score":0.09327441453933716},{"id":"https://openalex.org/keywords/operating-system","display_name":"Operating system","score":0.08485782146453857}],"concepts":[{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.8192642331123352},{"id":"https://openalex.org/C2780513914","wikidata":"https://www.wikidata.org/wiki/Q18210350","display_name":"Bottleneck","level":2,"score":0.7410392761230469},{"id":"https://openalex.org/C42935608","wikidata":"https://www.wikidata.org/wiki/Q190411","display_name":"Field-programmable gate array","level":2,"score":0.6839622855186462},{"id":"https://openalex.org/C173608175","wikidata":"https://www.wikidata.org/wiki/Q232661","display_name":"Parallel computing","level":1,"score":0.6598744988441467},{"id":"https://openalex.org/C153083717","wikidata":"https://www.wikidata.org/wiki/Q6535263","display_name":"Leverage (statistics)","level":2,"score":0.6184314489364624},{"id":"https://openalex.org/C142962650","wikidata":"https://www.wikidata.org/wiki/Q240838","display_name":"Reconfigurable computing","level":3,"score":0.5847440958023071},{"id":"https://openalex.org/C118524514","wikidata":"https://www.wikidata.org/wiki/Q173212","display_name":"Computer architecture","level":1,"score":0.5339744091033936},{"id":"https://openalex.org/C157764524","wikidata":"https://www.wikidata.org/wiki/Q1383412","display_name":"Throughput","level":3,"score":0.5301899313926697},{"id":"https://openalex.org/C45374587","wikidata":"https://www.wikidata.org/wiki/Q12525525","display_name":"Computation","level":2,"score":0.5150146484375},{"id":"https://openalex.org/C2780728072","wikidata":"https://www.wikidata.org/wiki/Q5297","display_name":"Microprocessor","level":2,"score":0.4660407602787018},{"id":"https://openalex.org/C149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","level":1,"score":0.4523712694644928},{"id":"https://openalex.org/C11413529","wikidata":"https://www.wikidata.org/wiki/Q8366","display_name":"Algorithm","level":1,"score":0.09327441453933716},{"id":"https://openalex.org/C111919701","wikidata":"https://www.wikidata.org/wiki/Q9135","display_name":"Operating system","level":1,"score":0.08485782146453857},{"id":"https://openalex.org/C555944384","wikidata":"https://www.wikidata.org/wiki/Q249","display_name":"Wireless","level":2,"score":0.0},{"id":"https://openalex.org/C119857082","wikidata":"https://www.wikidata.org/wiki/Q2539","display_name":"Machine learning","level":1,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/ipdps.2004.1303109","is_oa":false,"landing_page_url":"https://doi.org/10.1109/ipdps.2004.1303109","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"18th International Parallel and Distributed Processing Symposium, 2004. Proceedings.","raw_type":"proceedings-article"}],"best_oa_location":null,"sustainable_development_goals":[],"awards":[],"funders":[],"has_content":{"pdf":false,"grobid_xml":false},"content_urls":null,"referenced_works_count":6,"referenced_works":["https://openalex.org/W1501488688","https://openalex.org/W1575841671","https://openalex.org/W1599293419","https://openalex.org/W2132984323","https://openalex.org/W2142367315","https://openalex.org/W6635897543"],"related_works":["https://openalex.org/W1612076744","https://openalex.org/W2126857316","https://openalex.org/W2152074211","https://openalex.org/W2129019972","https://openalex.org/W3164085601","https://openalex.org/W1522032972","https://openalex.org/W2113308450","https://openalex.org/W2139962137","https://openalex.org/W3139915793","https://openalex.org/W2340647897"],"abstract_inverted_index":{"Summary":[0],"form":[1],"only":[2],"given.":[3],"Reconfigurable":[4],"computers":[5],"(RCs)":[6],"can":[7],"leverage":[8],"the":[9,22,36,46,52,55,59,63,67,71,90,97,107,115],"synergism":[10],"between":[11,58],"conventional":[12],"processors":[13],"and":[14,62,78,105],"FPGAs":[15],"to":[16,110],"provide":[17],"low-level":[18],"hardware":[19],"functionality":[20],"at":[21],"same":[23],"level":[24],"of":[25,34,54,66,81,89],"programmability":[26],"as":[27],"general-purpose":[28],"computers.":[29],"In":[30],"a":[31,50,76],"large":[32],"class":[33],"applications,":[35],"total":[37],"I/O":[38],"time":[39],"is":[40],"comparable":[41],"or":[42],"even":[43],"greater":[44],"than":[45],"computations":[47],"time.":[48],"As":[49],"result,":[51],"rate":[53],"DMA":[56],"transfer":[57],"microprocessor":[60],"memory":[61,65],"on-board":[64],"FPGA-based":[68],"processor":[69],"becomes":[70],"performance":[72,84],"bottleneck.":[73],"We":[74,103],"perform":[75],"theoretical":[77],"experimental":[79],"study":[80],"this":[82,111],"specific":[83],"limitation.":[85],"The":[86],"mathematical":[87],"formulation":[88],"problem":[91,112],"has":[92],"been":[93],"experimentally":[94],"verified":[95],"on":[96],"state-of-the":[98],"art":[99],"reconfigurable":[100,119],"platform,":[101],"SRC-6E.":[102],"demonstrate":[104],"quantify":[106],"possible":[108],"solution":[109],"that":[113],"exploits":[114],"system-level":[116],"parallelism":[117],"within":[118],"machines.":[120]},"counts_by_year":[],"updated_date":"2025-11-06T03:46:38.306776","created_date":"2025-10-10T00:00:00"}
