{"id":"https://openalex.org/W1939534717","doi":"https://doi.org/10.1109/ipdps.2003.1213421","title":"Semi-structured portable library for multiprocessor servers","display_name":"Semi-structured portable library for multiprocessor servers","publication_year":2004,"publication_date":"2004-03-22","ids":{"openalex":"https://openalex.org/W1939534717","doi":"https://doi.org/10.1109/ipdps.2003.1213421","mag":"1939534717"},"language":"en","primary_location":{"id":"doi:10.1109/ipdps.2003.1213421","is_oa":false,"landing_page_url":"http://doi.org/10.1109/ipdps.2003.1213421","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"Proceedings International Parallel and Distributed Processing Symposium","raw_type":"proceedings-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5058058511","display_name":"G. Tsilikas","orcid":null},"institutions":[{"id":"https://openalex.org/I110002522","display_name":"University of Essex","ror":"https://ror.org/02nkf1q06","country_code":"GB","type":"education","lineage":["https://openalex.org/I110002522"]}],"countries":["GB"],"is_corresponding":false,"raw_author_name":"G. Tsilikas","raw_affiliation_strings":["Multimedia Architectures Lab., Essex Univ., Colchester, UK"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Multimedia Architectures Lab., Essex Univ., Colchester, UK","institution_ids":["https://openalex.org/I110002522"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5040334407","display_name":"Martin Fleury","orcid":"https://orcid.org/0000-0001-7039-9879"},"institutions":[{"id":"https://openalex.org/I110002522","display_name":"University of Essex","ror":"https://ror.org/02nkf1q06","country_code":"GB","type":"education","lineage":["https://openalex.org/I110002522"]}],"countries":["GB"],"is_corresponding":false,"raw_author_name":"M. Fleury","raw_affiliation_strings":["Multimedia Architectures Lab., Essex Univ., Colchester, UK"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Multimedia Architectures Lab., Essex Univ., Colchester, UK","institution_ids":["https://openalex.org/I110002522"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":1,"corresponding_author_ids":[],"corresponding_institution_ids":["https://openalex.org/I110002522"],"apc_list":null,"apc_paid":null,"fwci":0.0,"has_fulltext":false,"cited_by_count":0,"citation_normalized_percentile":{"value":0.10553929,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":null,"biblio":{"volume":"10","issue":null,"first_page":"6","last_page":"6"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10054","display_name":"Parallel Computing and Optimization Techniques","score":0.9998000264167786,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10054","display_name":"Parallel Computing and Optimization Techniques","score":0.9998000264167786,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11269","display_name":"Algorithms and Data Compression","score":0.9991999864578247,"subfield":{"id":"https://openalex.org/subfields/1702","display_name":"Artificial Intelligence"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10904","display_name":"Embedded Systems Design Techniques","score":0.9972000122070312,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.8645859360694885},{"id":"https://openalex.org/keywords/multiprocessing","display_name":"Multiprocessing","score":0.6551847457885742},{"id":"https://openalex.org/keywords/concurrency","display_name":"Concurrency","score":0.6186033487319946},{"id":"https://openalex.org/keywords/parallel-computing","display_name":"Parallel computing","score":0.6047124266624451},{"id":"https://openalex.org/keywords/parsing","display_name":"Parsing","score":0.5552852153778076},{"id":"https://openalex.org/keywords/server","display_name":"Server","score":0.5082285404205322},{"id":"https://openalex.org/keywords/operating-system","display_name":"Operating system","score":0.4815942943096161},{"id":"https://openalex.org/keywords/computer-architecture","display_name":"Computer architecture","score":0.3970456123352051},{"id":"https://openalex.org/keywords/programming-language","display_name":"Programming language","score":0.34224921464920044}],"concepts":[{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.8645859360694885},{"id":"https://openalex.org/C4822641","wikidata":"https://www.wikidata.org/wiki/Q846651","display_name":"Multiprocessing","level":2,"score":0.6551847457885742},{"id":"https://openalex.org/C193702766","wikidata":"https://www.wikidata.org/wiki/Q1414548","display_name":"Concurrency","level":2,"score":0.6186033487319946},{"id":"https://openalex.org/C173608175","wikidata":"https://www.wikidata.org/wiki/Q232661","display_name":"Parallel computing","level":1,"score":0.6047124266624451},{"id":"https://openalex.org/C186644900","wikidata":"https://www.wikidata.org/wiki/Q194152","display_name":"Parsing","level":2,"score":0.5552852153778076},{"id":"https://openalex.org/C93996380","wikidata":"https://www.wikidata.org/wiki/Q44127","display_name":"Server","level":2,"score":0.5082285404205322},{"id":"https://openalex.org/C111919701","wikidata":"https://www.wikidata.org/wiki/Q9135","display_name":"Operating system","level":1,"score":0.4815942943096161},{"id":"https://openalex.org/C118524514","wikidata":"https://www.wikidata.org/wiki/Q173212","display_name":"Computer architecture","level":1,"score":0.3970456123352051},{"id":"https://openalex.org/C199360897","wikidata":"https://www.wikidata.org/wiki/Q9143","display_name":"Programming language","level":1,"score":0.34224921464920044}],"mesh":[],"locations_count":2,"locations":[{"id":"doi:10.1109/ipdps.2003.1213421","is_oa":false,"landing_page_url":"http://doi.org/10.1109/ipdps.2003.1213421","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"Proceedings International Parallel and Distributed Processing Symposium","raw_type":"proceedings-article"},{"id":"pmh:oai:CiteSeerX.psu:10.1.1.58.6786","is_oa":false,"landing_page_url":"http://citeseerx.ist.psu.edu/viewdoc/summary?doi=10.1.1.58.6786","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"submittedVersion","is_accepted":false,"is_published":false,"raw_source_name":"http://privatewww.essex.ac.uk/~fleum/Nicev6.pdf","raw_type":"text"}],"best_oa_location":null,"sustainable_development_goals":[],"awards":[],"funders":[],"has_content":{"pdf":false,"grobid_xml":false},"content_urls":null,"referenced_works_count":18,"referenced_works":["https://openalex.org/W320467665","https://openalex.org/W1520630674","https://openalex.org/W1536867128","https://openalex.org/W1541473758","https://openalex.org/W1983163123","https://openalex.org/W2025608635","https://openalex.org/W2061291998","https://openalex.org/W2074673642","https://openalex.org/W2114701528","https://openalex.org/W2115910059","https://openalex.org/W2153237730","https://openalex.org/W2536469098","https://openalex.org/W4241035809","https://openalex.org/W6631901870","https://openalex.org/W6632495317","https://openalex.org/W6665815944","https://openalex.org/W6728697527","https://openalex.org/W6830688956"],"related_works":["https://openalex.org/W2092530219","https://openalex.org/W2388464034","https://openalex.org/W2533125852","https://openalex.org/W2140460949","https://openalex.org/W2105580438","https://openalex.org/W2057435755","https://openalex.org/W2018782216","https://openalex.org/W3121798572","https://openalex.org/W2101552690","https://openalex.org/W2084925448"],"abstract_inverted_index":{"The":[0,10,21,46],"MiPPS":[1,47],"library":[2,11,48],"supports":[3],"a":[4,55],"hybrid":[5],"model":[6],"of":[7,23,54,57],"parallel":[8],"programming.":[9],"is":[12],"targeted":[13],"at":[14],"commodity":[15],"multiprocessors,":[16],"with":[17],"support":[18],"for":[19,63],"clusters.":[20],"implementation":[22],"the":[24,52,58],"concurrency":[25],"routines":[26],"reveals":[27],"discrepancies":[28,40],"between":[29],"popular":[30],"operating":[31],"systems.":[32],"Tests":[33],"on":[34],"suitable":[35],"applications":[36],"also":[37,50],"reveal":[38],"similar":[39],"in":[41],"performance":[42],"across":[43],"different":[44],"multiprocessors.":[45],"has":[49],"been":[51],"basis":[53],"parallelization":[56],"Active":[59],"Chart":[60],"Parsing":[61],"algorithm":[62],"speech":[64],"understanding.":[65]},"counts_by_year":[],"updated_date":"2026-06-26T08:34:08.712188","created_date":"2025-10-10T00:00:00"}
