{"id":"https://openalex.org/W4238258770","doi":"https://doi.org/10.1109/ipdps.2003.1213349","title":"An optically differential reconfigurable gate array with a dynamic reconfiguration circuit","display_name":"An optically differential reconfigurable gate array with a dynamic reconfiguration circuit","publication_year":2004,"publication_date":"2004-03-22","ids":{"openalex":"https://openalex.org/W4238258770","doi":"https://doi.org/10.1109/ipdps.2003.1213349"},"language":"en","primary_location":{"id":"doi:10.1109/ipdps.2003.1213349","is_oa":false,"landing_page_url":"https://doi.org/10.1109/ipdps.2003.1213349","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"Proceedings International Parallel and Distributed Processing Symposium","raw_type":"proceedings-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5101887712","display_name":"Minoru Watanabe","orcid":"https://orcid.org/0000-0002-7452-3555"},"institutions":[{"id":"https://openalex.org/I207014233","display_name":"Kyushu Institute of Technology","ror":"https://ror.org/02278tr80","country_code":"JP","type":"education","lineage":["https://openalex.org/I207014233"]}],"countries":["JP"],"is_corresponding":true,"raw_author_name":"M. Watanabe","raw_affiliation_strings":["Department of Control Engineering and Science, Kyushu Institute of Technology, Fukuoka, Japan"],"affiliations":[{"raw_affiliation_string":"Department of Control Engineering and Science, Kyushu Institute of Technology, Fukuoka, Japan","institution_ids":["https://openalex.org/I207014233"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5030309812","display_name":"F. Kobayashi","orcid":null},"institutions":[{"id":"https://openalex.org/I207014233","display_name":"Kyushu Institute of Technology","ror":"https://ror.org/02278tr80","country_code":"JP","type":"education","lineage":["https://openalex.org/I207014233"]}],"countries":["JP"],"is_corresponding":false,"raw_author_name":"F. Kobayashi","raw_affiliation_strings":["Department of Control Engineering and Science, Kyushu Institute of Technology, Fukuoka, Japan"],"affiliations":[{"raw_affiliation_string":"Department of Control Engineering and Science, Kyushu Institute of Technology, Fukuoka, Japan","institution_ids":["https://openalex.org/I207014233"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":2,"corresponding_author_ids":["https://openalex.org/A5101887712"],"corresponding_institution_ids":["https://openalex.org/I207014233"],"apc_list":null,"apc_paid":null,"fwci":1.8431,"has_fulltext":false,"cited_by_count":7,"citation_normalized_percentile":{"value":0.85867154,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":null,"biblio":{"volume":"3490","issue":null,"first_page":"4","last_page":"4"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T11032","display_name":"VLSI and Analog Circuit Testing","score":0.9994999766349792,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T11032","display_name":"VLSI and Analog Circuit Testing","score":0.9994999766349792,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10904","display_name":"Embedded Systems Design Techniques","score":0.9994000196456909,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11522","display_name":"VLSI and FPGA Design Techniques","score":0.9994000196456909,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/control-reconfiguration","display_name":"Control reconfiguration","score":0.916783332824707},{"id":"https://openalex.org/keywords/very-large-scale-integration","display_name":"Very-large-scale integration","score":0.8106259107589722},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.6379002332687378},{"id":"https://openalex.org/keywords/chip","display_name":"Chip","score":0.5930224657058716},{"id":"https://openalex.org/keywords/electronic-engineering","display_name":"Electronic engineering","score":0.48775726556777954},{"id":"https://openalex.org/keywords/differential","display_name":"Differential (mechanical device)","score":0.44407832622528076},{"id":"https://openalex.org/keywords/process","display_name":"Process (computing)","score":0.41116029024124146},{"id":"https://openalex.org/keywords/embedded-system","display_name":"Embedded system","score":0.28942346572875977},{"id":"https://openalex.org/keywords/engineering","display_name":"Engineering","score":0.21467584371566772},{"id":"https://openalex.org/keywords/telecommunications","display_name":"Telecommunications","score":0.0791555643081665}],"concepts":[{"id":"https://openalex.org/C119701452","wikidata":"https://www.wikidata.org/wiki/Q5165881","display_name":"Control reconfiguration","level":2,"score":0.916783332824707},{"id":"https://openalex.org/C14580979","wikidata":"https://www.wikidata.org/wiki/Q876049","display_name":"Very-large-scale integration","level":2,"score":0.8106259107589722},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.6379002332687378},{"id":"https://openalex.org/C165005293","wikidata":"https://www.wikidata.org/wiki/Q1074500","display_name":"Chip","level":2,"score":0.5930224657058716},{"id":"https://openalex.org/C24326235","wikidata":"https://www.wikidata.org/wiki/Q126095","display_name":"Electronic engineering","level":1,"score":0.48775726556777954},{"id":"https://openalex.org/C93226319","wikidata":"https://www.wikidata.org/wiki/Q193137","display_name":"Differential (mechanical device)","level":2,"score":0.44407832622528076},{"id":"https://openalex.org/C98045186","wikidata":"https://www.wikidata.org/wiki/Q205663","display_name":"Process (computing)","level":2,"score":0.41116029024124146},{"id":"https://openalex.org/C149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","level":1,"score":0.28942346572875977},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.21467584371566772},{"id":"https://openalex.org/C76155785","wikidata":"https://www.wikidata.org/wiki/Q418","display_name":"Telecommunications","level":1,"score":0.0791555643081665},{"id":"https://openalex.org/C111919701","wikidata":"https://www.wikidata.org/wiki/Q9135","display_name":"Operating system","level":1,"score":0.0},{"id":"https://openalex.org/C146978453","wikidata":"https://www.wikidata.org/wiki/Q3798668","display_name":"Aerospace engineering","level":1,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/ipdps.2003.1213349","is_oa":false,"landing_page_url":"https://doi.org/10.1109/ipdps.2003.1213349","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"Proceedings International Parallel and Distributed Processing Symposium","raw_type":"proceedings-article"}],"best_oa_location":null,"sustainable_development_goals":[{"id":"https://metadata.un.org/sdg/7","score":0.8299999833106995,"display_name":"Affordable and clean energy"}],"awards":[],"funders":[],"has_content":{"pdf":false,"grobid_xml":false},"content_urls":null,"referenced_works_count":10,"referenced_works":["https://openalex.org/W1536364934","https://openalex.org/W1586802923","https://openalex.org/W2009084733","https://openalex.org/W2025562853","https://openalex.org/W2168753898","https://openalex.org/W4245017517","https://openalex.org/W6631964662","https://openalex.org/W6684961531","https://openalex.org/W7051339733","https://openalex.org/W7061034308"],"related_works":["https://openalex.org/W1981002473","https://openalex.org/W2357657342","https://openalex.org/W2153432761","https://openalex.org/W2152623100","https://openalex.org/W4214878056","https://openalex.org/W1580144672","https://openalex.org/W2142042635","https://openalex.org/W1988127757","https://openalex.org/W2165091308","https://openalex.org/W2098218272"],"abstract_inverted_index":{"An":[0],"optically":[1],"differential":[2],"reconfigurable":[3],"gate":[4],"array":[5],"(ODRGA)":[6],"using":[7,59],"a":[8,24,43,64,71],"dynamic":[9,73],"circuit":[10,22,53,61,75],"technique":[11],"is":[12,31],"proposed":[13,57],"to":[14],"reduce":[15],"the":[16,20,35,84,91],"area":[17,82],"occupied":[18],"by":[19,33,90],"configuration":[21,39,49],"on":[23,42,83],"VLSI":[25,44,85],"chip.":[26],"The":[27,51],"ODRGA":[28,58],"reconfiguration":[29,52,74],"process":[30],"performed":[32],"calculating":[34],"difference":[36],"between":[37],"previous":[38],"data":[40],"stored":[41],"chip":[45,86],"and":[46,76],"subsequent":[47],"optically-supplied":[48],"data.":[50],"of":[54,80],"our":[55],"previously":[56],"static":[60,92],"techniques":[62],"required":[63],"large":[65],"implementation":[66],"area.":[67],"This":[68],"paper":[69],"introduces":[70],"new":[72],"compares":[77],"an":[78],"estimate":[79],"its":[81],"with":[87],"that":[88],"obtained":[89],"technique.":[93]},"counts_by_year":[],"updated_date":"2025-11-06T03:46:38.306776","created_date":"2025-10-10T00:00:00"}