{"id":"https://openalex.org/W1643441470","doi":"https://doi.org/10.1109/ipdps.2003.1213318","title":"Reconfigurable mapping functions for online architectures","display_name":"Reconfigurable mapping functions for online architectures","publication_year":2004,"publication_date":"2004-03-22","ids":{"openalex":"https://openalex.org/W1643441470","doi":"https://doi.org/10.1109/ipdps.2003.1213318","mag":"1643441470"},"language":"en","primary_location":{"id":"doi:10.1109/ipdps.2003.1213318","is_oa":false,"landing_page_url":"https://doi.org/10.1109/ipdps.2003.1213318","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"Proceedings International Parallel and Distributed Processing Symposium","raw_type":"proceedings-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5008876586","display_name":"S. Harinath","orcid":null},"institutions":[{"id":"https://openalex.org/I8078737","display_name":"Clemson University","ror":"https://ror.org/037s24f05","country_code":"US","type":"education","lineage":["https://openalex.org/I8078737"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"S. Harinath","raw_affiliation_strings":["Parallel Architecture Research Lab, Holcombe Department of Electrical and Computer Engineering, Clemson University, Clemson, SC, USA","Dept. of Electr. & Comput. Eng. Clemson Univ., SC, USA"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Parallel Architecture Research Lab, Holcombe Department of Electrical and Computer Engineering, Clemson University, Clemson, SC, USA","institution_ids":["https://openalex.org/I8078737"]},{"raw_affiliation_string":"Dept. of Electr. & Comput. Eng. Clemson Univ., SC, USA","institution_ids":["https://openalex.org/I8078737"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5107855443","display_name":"R. Sass","orcid":null},"institutions":[{"id":"https://openalex.org/I8078737","display_name":"Clemson University","ror":"https://ror.org/037s24f05","country_code":"US","type":"education","lineage":["https://openalex.org/I8078737"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"R. Sass","raw_affiliation_strings":["Parallel Architecture Research Lab, Holcombe Department of Electrical and Computer Engineering, Clemson University, Clemson, SC, USA","Dept. of Electr. & Comput. Eng. Clemson Univ., SC, USA"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Parallel Architecture Research Lab, Holcombe Department of Electrical and Computer Engineering, Clemson University, Clemson, SC, USA","institution_ids":["https://openalex.org/I8078737"]},{"raw_affiliation_string":"Dept. of Electr. & Comput. Eng. Clemson Univ., SC, USA","institution_ids":["https://openalex.org/I8078737"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":2,"corresponding_author_ids":[],"corresponding_institution_ids":[],"apc_list":null,"apc_paid":null,"fwci":0.0,"has_fulltext":false,"cited_by_count":0,"citation_normalized_percentile":{"value":0.0925745,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":null,"biblio":{"volume":"34","issue":null,"first_page":"8","last_page":"8"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10054","display_name":"Parallel Computing and Optimization Techniques","score":0.9997000098228455,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10054","display_name":"Parallel Computing and Optimization Techniques","score":0.9997000098228455,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10904","display_name":"Embedded Systems Design Techniques","score":0.9994999766349792,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T12326","display_name":"Network Packet Processing and Optimization","score":0.9991000294685364,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/control-reconfiguration","display_name":"Control reconfiguration","score":0.9384520053863525},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.8232201337814331},{"id":"https://openalex.org/keywords/implementation","display_name":"Implementation","score":0.7746040225028992},{"id":"https://openalex.org/keywords/latency","display_name":"Latency (audio)","score":0.714680552482605},{"id":"https://openalex.org/keywords/component","display_name":"Component (thermodynamics)","score":0.6285857558250427},{"id":"https://openalex.org/keywords/computer-architecture","display_name":"Computer architecture","score":0.5729411840438843},{"id":"https://openalex.org/keywords/architecture","display_name":"Architecture","score":0.530204176902771},{"id":"https://openalex.org/keywords/function","display_name":"Function (biology)","score":0.4684933125972748},{"id":"https://openalex.org/keywords/cas-latency","display_name":"CAS latency","score":0.46520596742630005},{"id":"https://openalex.org/keywords/distributed-computing","display_name":"Distributed computing","score":0.4579628109931946},{"id":"https://openalex.org/keywords/parallel-computing","display_name":"Parallel computing","score":0.431194931268692},{"id":"https://openalex.org/keywords/design-space-exploration","display_name":"Design space exploration","score":0.4144132137298584},{"id":"https://openalex.org/keywords/embedded-system","display_name":"Embedded system","score":0.4135203957557678},{"id":"https://openalex.org/keywords/computer-hardware","display_name":"Computer hardware","score":0.16814514994621277},{"id":"https://openalex.org/keywords/semiconductor-memory","display_name":"Semiconductor memory","score":0.09141209721565247},{"id":"https://openalex.org/keywords/programming-language","display_name":"Programming language","score":0.08967304229736328}],"concepts":[{"id":"https://openalex.org/C119701452","wikidata":"https://www.wikidata.org/wiki/Q5165881","display_name":"Control reconfiguration","level":2,"score":0.9384520053863525},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.8232201337814331},{"id":"https://openalex.org/C26713055","wikidata":"https://www.wikidata.org/wiki/Q245962","display_name":"Implementation","level":2,"score":0.7746040225028992},{"id":"https://openalex.org/C82876162","wikidata":"https://www.wikidata.org/wiki/Q17096504","display_name":"Latency (audio)","level":2,"score":0.714680552482605},{"id":"https://openalex.org/C168167062","wikidata":"https://www.wikidata.org/wiki/Q1117970","display_name":"Component (thermodynamics)","level":2,"score":0.6285857558250427},{"id":"https://openalex.org/C118524514","wikidata":"https://www.wikidata.org/wiki/Q173212","display_name":"Computer architecture","level":1,"score":0.5729411840438843},{"id":"https://openalex.org/C123657996","wikidata":"https://www.wikidata.org/wiki/Q12271","display_name":"Architecture","level":2,"score":0.530204176902771},{"id":"https://openalex.org/C14036430","wikidata":"https://www.wikidata.org/wiki/Q3736076","display_name":"Function (biology)","level":2,"score":0.4684933125972748},{"id":"https://openalex.org/C189930140","wikidata":"https://www.wikidata.org/wiki/Q1112878","display_name":"CAS latency","level":4,"score":0.46520596742630005},{"id":"https://openalex.org/C120314980","wikidata":"https://www.wikidata.org/wiki/Q180634","display_name":"Distributed computing","level":1,"score":0.4579628109931946},{"id":"https://openalex.org/C173608175","wikidata":"https://www.wikidata.org/wiki/Q232661","display_name":"Parallel computing","level":1,"score":0.431194931268692},{"id":"https://openalex.org/C2776221188","wikidata":"https://www.wikidata.org/wiki/Q21072556","display_name":"Design space exploration","level":2,"score":0.4144132137298584},{"id":"https://openalex.org/C149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","level":1,"score":0.4135203957557678},{"id":"https://openalex.org/C9390403","wikidata":"https://www.wikidata.org/wiki/Q3966","display_name":"Computer hardware","level":1,"score":0.16814514994621277},{"id":"https://openalex.org/C98986596","wikidata":"https://www.wikidata.org/wiki/Q1143031","display_name":"Semiconductor memory","level":2,"score":0.09141209721565247},{"id":"https://openalex.org/C199360897","wikidata":"https://www.wikidata.org/wiki/Q9143","display_name":"Programming language","level":1,"score":0.08967304229736328},{"id":"https://openalex.org/C76155785","wikidata":"https://www.wikidata.org/wiki/Q418","display_name":"Telecommunications","level":1,"score":0.0},{"id":"https://openalex.org/C153349607","wikidata":"https://www.wikidata.org/wiki/Q36649","display_name":"Visual arts","level":1,"score":0.0},{"id":"https://openalex.org/C121332964","wikidata":"https://www.wikidata.org/wiki/Q413","display_name":"Physics","level":0,"score":0.0},{"id":"https://openalex.org/C86803240","wikidata":"https://www.wikidata.org/wiki/Q420","display_name":"Biology","level":0,"score":0.0},{"id":"https://openalex.org/C100800780","wikidata":"https://www.wikidata.org/wiki/Q1175867","display_name":"Memory controller","level":3,"score":0.0},{"id":"https://openalex.org/C78458016","wikidata":"https://www.wikidata.org/wiki/Q840400","display_name":"Evolutionary biology","level":1,"score":0.0},{"id":"https://openalex.org/C97355855","wikidata":"https://www.wikidata.org/wiki/Q11473","display_name":"Thermodynamics","level":1,"score":0.0},{"id":"https://openalex.org/C142362112","wikidata":"https://www.wikidata.org/wiki/Q735","display_name":"Art","level":0,"score":0.0}],"mesh":[],"locations_count":3,"locations":[{"id":"doi:10.1109/ipdps.2003.1213318","is_oa":false,"landing_page_url":"https://doi.org/10.1109/ipdps.2003.1213318","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"Proceedings International Parallel and Distributed Processing Symposium","raw_type":"proceedings-article"},{"id":"pmh:oai:tigerprints.clemson.edu:arv_theses-6342","is_oa":false,"landing_page_url":"https://tigerprints.clemson.edu/arv_theses/5342","pdf_url":null,"source":{"id":"https://openalex.org/S4377196397","display_name":"TigerPrints (Clemson University)","issn_l":null,"issn":null,"is_oa":false,"is_in_doaj":false,"is_core":false,"host_organization":"https://openalex.org/I8078737","host_organization_name":"Clemson University","host_organization_lineage":["https://openalex.org/I8078737"],"host_organization_lineage_names":[],"type":"repository"},"license":null,"license_id":null,"version":"submittedVersion","is_accepted":false,"is_published":false,"raw_source_name":"Archived Theses","raw_type":"text"},{"id":"pmh:oai:open.clemson.edu:arv_theses-6342","is_oa":false,"landing_page_url":"https://open.clemson.edu/arv_theses/5342","pdf_url":null,"source":{"id":"https://openalex.org/S4377196397","display_name":"TigerPrints (Clemson University)","issn_l":null,"issn":null,"is_oa":false,"is_in_doaj":false,"is_core":false,"host_organization":"https://openalex.org/I8078737","host_organization_name":"Clemson University","host_organization_lineage":["https://openalex.org/I8078737"],"host_organization_lineage_names":[],"type":"repository"},"license":null,"license_id":null,"version":"submittedVersion","is_accepted":false,"is_published":false,"raw_source_name":"Archived Theses","raw_type":"text"}],"best_oa_location":null,"sustainable_development_goals":[{"display_name":"Peace, Justice and strong institutions","score":0.4399999976158142,"id":"https://metadata.un.org/sdg/16"}],"awards":[],"funders":[],"has_content":{"pdf":false,"grobid_xml":false},"content_urls":null,"referenced_works_count":8,"referenced_works":["https://openalex.org/W1555915743","https://openalex.org/W1597348009","https://openalex.org/W1665993821","https://openalex.org/W2018094844","https://openalex.org/W2115294662","https://openalex.org/W2158583421","https://openalex.org/W2725179571","https://openalex.org/W6637231232"],"related_works":["https://openalex.org/W2357657342","https://openalex.org/W2153432761","https://openalex.org/W1580144672","https://openalex.org/W2152623100","https://openalex.org/W2142042635","https://openalex.org/W2133942601","https://openalex.org/W2619340758","https://openalex.org/W2800626838","https://openalex.org/W4297098431","https://openalex.org/W2437914309"],"abstract_inverted_index":{"Content":[0],"addressable":[1,99],"memory":[2,100],"is":[3,91,121],"an":[4,29,47,53,62,102],"expensive":[5],"component":[6,66,81],"in":[7,20,70,124],"fixed":[8],"architecture":[9],"systems":[10,27],"however":[11],"it":[12],"may":[13],"prove":[14],"to":[15,33,95],"be":[16],"a":[17,43,97,128],"valuable":[18],"tool":[19],"online":[21,30,54],"architectures":[22],"(that":[23],"is,":[24],"run-time":[25],"reconfigurable":[26],"with":[28],"decision":[31],"algorithm":[32],"determine":[34],"the":[35,85,92,108,118],"next":[36],"reconfiguration).":[37],"In":[38],"this":[39],"paper":[40],"we":[41],"define":[42],"related":[44],"problem":[45],"called":[46],"arbitrary":[48,63,103],"mapping":[49,64,104],"function":[50,65],"and":[51,67,80],"describe":[52],"architecture.":[55],"We":[56],"look":[57],"at":[58],"four":[59],"implementations":[60,86,109],"of":[61,72,75,84,107],"compare":[68],"them":[69],"terms":[71],"space":[73,125],"(number":[74],"CLB":[76],"used),":[77],"reconfiguration":[78,116,130],"time,":[79],"latency.":[82],"All":[83],"offer":[87],"low":[88],"latency;":[89],"which":[90],"primary":[93],"reason":[94],"use":[96],"content":[98],"or":[101],"function.":[105],"Three":[106],"trade":[110],"large":[111,129],"size":[112],"for":[113],"very":[114],"fast":[115],"while":[117],"last":[119],"implementation":[120],"extremely":[122],"conservative":[123],"but":[126],"has":[127],"time.":[131]},"counts_by_year":[],"updated_date":"2026-06-11T09:08:48.828518","created_date":"2025-10-10T00:00:00"}