{"id":"https://openalex.org/W4244197002","doi":"https://doi.org/10.1109/ipdps.2003.1213252","title":"Compiler and runtime support for running OpenMP programs on Pentium- and Itanium-architectures","display_name":"Compiler and runtime support for running OpenMP programs on Pentium- and Itanium-architectures","publication_year":2004,"publication_date":"2004-03-22","ids":{"openalex":"https://openalex.org/W4244197002","doi":"https://doi.org/10.1109/ipdps.2003.1213252"},"language":"en","primary_location":{"id":"doi:10.1109/ipdps.2003.1213252","is_oa":false,"landing_page_url":"https://doi.org/10.1109/ipdps.2003.1213252","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"Proceedings International Parallel and Distributed Processing Symposium","raw_type":"proceedings-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5101131112","display_name":"Xinmin Tian","orcid":null},"institutions":[{"id":"https://openalex.org/I1343180700","display_name":"Intel (United States)","ror":"https://ror.org/01ek73717","country_code":"US","type":"company","lineage":["https://openalex.org/I1343180700"]}],"countries":["US"],"is_corresponding":true,"raw_author_name":"Xinmin Tian","raw_affiliation_strings":["Intel Compiler Laboratory, Software Solution Group, Intel Corporation, Santa Clara, CA, USA"],"affiliations":[{"raw_affiliation_string":"Intel Compiler Laboratory, Software Solution Group, Intel Corporation, Santa Clara, CA, USA","institution_ids":["https://openalex.org/I1343180700"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5009108433","display_name":"Milind Girkar","orcid":null},"institutions":[{"id":"https://openalex.org/I1343180700","display_name":"Intel (United States)","ror":"https://ror.org/01ek73717","country_code":"US","type":"company","lineage":["https://openalex.org/I1343180700"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"M. Girkar","raw_affiliation_strings":["Intel Compiler Laboratory, Software Solution Group, Intel Corporation, Santa Clara, CA, USA"],"affiliations":[{"raw_affiliation_string":"Intel Compiler Laboratory, Software Solution Group, Intel Corporation, Santa Clara, CA, USA","institution_ids":["https://openalex.org/I1343180700"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5049303874","display_name":"Syed Afaq Ali Shah","orcid":"https://orcid.org/0000-0003-2181-8445"},"institutions":[{"id":"https://openalex.org/I1343180700","display_name":"Intel (United States)","ror":"https://ror.org/01ek73717","country_code":"US","type":"company","lineage":["https://openalex.org/I1343180700"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"S. Shah","raw_affiliation_strings":["KAI Software Laboratory, Software Solution Group, Intel Corporation, Champaign, IL, USA"],"affiliations":[{"raw_affiliation_string":"KAI Software Laboratory, Software Solution Group, Intel Corporation, Champaign, IL, USA","institution_ids":["https://openalex.org/I1343180700"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5075964460","display_name":"Douglas Armstrong","orcid":null},"institutions":[{"id":"https://openalex.org/I1343180700","display_name":"Intel (United States)","ror":"https://ror.org/01ek73717","country_code":"US","type":"company","lineage":["https://openalex.org/I1343180700"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"D. Armstrong","raw_affiliation_strings":["KAI Software Laboratory, Software Solution Group, Intel Corporation, Champaign, IL, USA"],"affiliations":[{"raw_affiliation_string":"KAI Software Laboratory, Software Solution Group, Intel Corporation, Champaign, IL, USA","institution_ids":["https://openalex.org/I1343180700"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5113822912","display_name":"Ernesto Su","orcid":null},"institutions":[{"id":"https://openalex.org/I1343180700","display_name":"Intel (United States)","ror":"https://ror.org/01ek73717","country_code":"US","type":"company","lineage":["https://openalex.org/I1343180700"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"E. Su","raw_affiliation_strings":["Intel Compiler Laboratory, Software Solution Group, Intel Corporation, Santa Clara, CA, USA"],"affiliations":[{"raw_affiliation_string":"Intel Compiler Laboratory, Software Solution Group, Intel Corporation, Santa Clara, CA, USA","institution_ids":["https://openalex.org/I1343180700"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5089822344","display_name":"Paul Petersen","orcid":null},"institutions":[{"id":"https://openalex.org/I1343180700","display_name":"Intel (United States)","ror":"https://ror.org/01ek73717","country_code":"US","type":"company","lineage":["https://openalex.org/I1343180700"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"P. Petersen","raw_affiliation_strings":["KAI Software Laboratory, Software Solution Group, Intel Corporation, Champaign, IL, USA"],"affiliations":[{"raw_affiliation_string":"KAI Software Laboratory, Software Solution Group, Intel Corporation, Champaign, IL, USA","institution_ids":["https://openalex.org/I1343180700"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":6,"corresponding_author_ids":["https://openalex.org/A5101131112"],"corresponding_institution_ids":["https://openalex.org/I1343180700"],"apc_list":null,"apc_paid":null,"fwci":0.2633,"has_fulltext":false,"cited_by_count":5,"citation_normalized_percentile":{"value":0.62103615,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":{"min":89,"max":96},"biblio":{"volume":"6","issue":null,"first_page":"9","last_page":"9"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10054","display_name":"Parallel Computing and Optimization Techniques","score":1.0,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10054","display_name":"Parallel Computing and Optimization Techniques","score":1.0,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10715","display_name":"Distributed and Parallel Computing Systems","score":0.9969000220298767,"subfield":{"id":"https://openalex.org/subfields/1705","display_name":"Computer Networks and Communications"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11181","display_name":"Advanced Data Storage Technologies","score":0.9925000071525574,"subfield":{"id":"https://openalex.org/subfields/1705","display_name":"Computer Networks and Communications"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.8693040609359741},{"id":"https://openalex.org/keywords/parallel-computing","display_name":"Parallel computing","score":0.7861543893814087},{"id":"https://openalex.org/keywords/compiler","display_name":"Compiler","score":0.742286741733551},{"id":"https://openalex.org/keywords/pentium","display_name":"Pentium","score":0.7202130556106567},{"id":"https://openalex.org/keywords/thread","display_name":"Thread (computing)","score":0.5513250827789307},{"id":"https://openalex.org/keywords/operating-system","display_name":"Operating system","score":0.4477788805961609},{"id":"https://openalex.org/keywords/interprocedural-optimization","display_name":"Interprocedural optimization","score":0.43680739402770996},{"id":"https://openalex.org/keywords/instruction-set","display_name":"Instruction set","score":0.4117875397205353},{"id":"https://openalex.org/keywords/optimizing-compiler","display_name":"Optimizing compiler","score":0.3789823651313782},{"id":"https://openalex.org/keywords/loop-optimization","display_name":"Loop optimization","score":0.29724419116973877}],"concepts":[{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.8693040609359741},{"id":"https://openalex.org/C173608175","wikidata":"https://www.wikidata.org/wiki/Q232661","display_name":"Parallel computing","level":1,"score":0.7861543893814087},{"id":"https://openalex.org/C169590947","wikidata":"https://www.wikidata.org/wiki/Q47506","display_name":"Compiler","level":2,"score":0.742286741733551},{"id":"https://openalex.org/C46268123","wikidata":"https://www.wikidata.org/wiki/Q214314","display_name":"Pentium","level":2,"score":0.7202130556106567},{"id":"https://openalex.org/C138101251","wikidata":"https://www.wikidata.org/wiki/Q213092","display_name":"Thread (computing)","level":2,"score":0.5513250827789307},{"id":"https://openalex.org/C111919701","wikidata":"https://www.wikidata.org/wiki/Q9135","display_name":"Operating system","level":1,"score":0.4477788805961609},{"id":"https://openalex.org/C111564260","wikidata":"https://www.wikidata.org/wiki/Q4288856","display_name":"Interprocedural optimization","level":5,"score":0.43680739402770996},{"id":"https://openalex.org/C202491316","wikidata":"https://www.wikidata.org/wiki/Q272683","display_name":"Instruction set","level":2,"score":0.4117875397205353},{"id":"https://openalex.org/C190902152","wikidata":"https://www.wikidata.org/wiki/Q1325106","display_name":"Optimizing compiler","level":3,"score":0.3789823651313782},{"id":"https://openalex.org/C29331672","wikidata":"https://www.wikidata.org/wiki/Q3354468","display_name":"Loop optimization","level":4,"score":0.29724419116973877}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/ipdps.2003.1213252","is_oa":false,"landing_page_url":"https://doi.org/10.1109/ipdps.2003.1213252","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"Proceedings International Parallel and Distributed Processing Symposium","raw_type":"proceedings-article"}],"best_oa_location":null,"sustainable_development_goals":[],"awards":[],"funders":[],"has_content":{"grobid_xml":false,"pdf":false},"content_urls":null,"referenced_works_count":6,"referenced_works":["https://openalex.org/W1491993965","https://openalex.org/W1495550651","https://openalex.org/W1993881507","https://openalex.org/W2002427499","https://openalex.org/W2086794688","https://openalex.org/W6629438701"],"related_works":["https://openalex.org/W1980424176","https://openalex.org/W4246454774","https://openalex.org/W2121223013","https://openalex.org/W2038509808","https://openalex.org/W2083681681","https://openalex.org/W4220800565","https://openalex.org/W2053033210","https://openalex.org/W2091689272","https://openalex.org/W1488300410","https://openalex.org/W2099845707"],"abstract_inverted_index":{"Exploiting":[0],"thread-level":[1,110],"parallelism":[2,111],"(TLP)":[3],"is":[4,89],"a":[5,90,132],"promising":[6],"way":[7],"to":[8,82],"improve":[9],"the":[10,15,31,35,54,74,77,85,94,103,116,140],"performance":[11,129,144],"of":[12,17,93,122,131,134],"applications":[13],"with":[14,119],"advent":[16],"general-purpose":[18],"cost":[19],"effective":[20],"uni-processor":[21],"and":[22,39,51,66,149],"shared-memory":[23],"multiprocessor":[24],"systems.":[25,152],"In":[26,80],"this":[27],"paper,":[28],"we":[29],"describe":[30,69],"OpenMP":[32,64,78,86,105,117],"implementation":[33],"in":[34,53,73,102],"Intel/spl":[36,146],"reg/":[37,147],"C++":[38],"Fortran":[40],"compilers":[41],"for":[42,57,76,108],"Intel":[43,55,95,104],"platforms.":[44],"We":[45,68,97],"present":[46,98],"our":[47],"major":[48],"design":[49],"consideration":[50],"decisions":[52],"compiler":[56,75,83],"generating":[58],"efficient":[59],"multithreaded":[60],"codes":[61],"guided":[62],"by":[63],"directives":[65],"pragmas.":[67],"several":[70],"transformation":[71],"phases":[72],"parallelization.":[79],"addition":[81],"support,":[84],"runtime":[87,99,106],"library":[88,107],"critical":[91],"part":[92],"compiler.":[96],"techniques":[100],"developed":[101],"exploiting":[109],"as":[112,114,125],"well":[113],"integrating":[115],"support":[118],"other":[120],"forms":[121],"threading":[123],"termed":[124],"sibling":[126],"parallelism.":[127],"The":[128],"results":[130],"set":[133],"benchmarks":[135],"show":[136],"good":[137],"speedups":[138],"over":[139],"well-optimized":[141],"serial":[142],"code":[143],"on":[145],"Pentium-":[148],"Itanium-processor":[150],"based":[151]},"counts_by_year":[{"year":2016,"cited_by_count":2},{"year":2014,"cited_by_count":1}],"updated_date":"2025-11-06T03:46:38.306776","created_date":"2025-10-10T00:00:00"}
