{"id":"https://openalex.org/W4386211616","doi":"https://doi.org/10.1109/iolts59296.2023.10224863","title":"ERrOR: Improving Performance and Fault Tolerance Using Early Execution","display_name":"ERrOR: Improving Performance and Fault Tolerance Using Early Execution","publication_year":2023,"publication_date":"2023-07-03","ids":{"openalex":"https://openalex.org/W4386211616","doi":"https://doi.org/10.1109/iolts59296.2023.10224863"},"language":"en","primary_location":{"id":"doi:10.1109/iolts59296.2023.10224863","is_oa":false,"landing_page_url":"http://dx.doi.org/10.1109/iolts59296.2023.10224863","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2023 IEEE 29th International Symposium on On-Line Testing and Robust System Design (IOLTS)","raw_type":"proceedings-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5089521059","display_name":"R. K. Choudhary","orcid":"https://orcid.org/0000-0002-1276-0088"},"institutions":[{"id":"https://openalex.org/I162827531","display_name":"Indian Institute of Technology Bombay","ror":"https://ror.org/02qyf5152","country_code":"IN","type":"education","lineage":["https://openalex.org/I162827531"]}],"countries":["IN"],"is_corresponding":true,"raw_author_name":"Raj Kumar Choudhary","raw_affiliation_strings":["Indian Institute of Technology Bombay,Computer Architecture and Dependable Systems Laboratory,India","Computer Architecture and Dependable Systems Laboratory, Indian Institute of Technology Bombay, India"],"affiliations":[{"raw_affiliation_string":"Indian Institute of Technology Bombay,Computer Architecture and Dependable Systems Laboratory,India","institution_ids":["https://openalex.org/I162827531"]},{"raw_affiliation_string":"Computer Architecture and Dependable Systems Laboratory, Indian Institute of Technology Bombay, India","institution_ids":["https://openalex.org/I162827531"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5113157798","display_name":"Janeel Patel","orcid":null},"institutions":[{"id":"https://openalex.org/I162827531","display_name":"Indian Institute of Technology Bombay","ror":"https://ror.org/02qyf5152","country_code":"IN","type":"education","lineage":["https://openalex.org/I162827531"]}],"countries":["IN"],"is_corresponding":false,"raw_author_name":"Janeel Patel","raw_affiliation_strings":["Indian Institute of Technology Bombay,Computer Architecture and Dependable Systems Laboratory,India","Computer Architecture and Dependable Systems Laboratory, Indian Institute of Technology Bombay, India"],"affiliations":[{"raw_affiliation_string":"Indian Institute of Technology Bombay,Computer Architecture and Dependable Systems Laboratory,India","institution_ids":["https://openalex.org/I162827531"]},{"raw_affiliation_string":"Computer Architecture and Dependable Systems Laboratory, Indian Institute of Technology Bombay, India","institution_ids":["https://openalex.org/I162827531"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5073587430","display_name":"Virendra Singh","orcid":"https://orcid.org/0000-0002-7035-7844"},"institutions":[{"id":"https://openalex.org/I162827531","display_name":"Indian Institute of Technology Bombay","ror":"https://ror.org/02qyf5152","country_code":"IN","type":"education","lineage":["https://openalex.org/I162827531"]}],"countries":["IN"],"is_corresponding":false,"raw_author_name":"Virendra Singh","raw_affiliation_strings":["Indian Institute of Technology Bombay,Computer Architecture and Dependable Systems Laboratory,India","Computer Architecture and Dependable Systems Laboratory, Indian Institute of Technology Bombay, India"],"affiliations":[{"raw_affiliation_string":"Indian Institute of Technology Bombay,Computer Architecture and Dependable Systems Laboratory,India","institution_ids":["https://openalex.org/I162827531"]},{"raw_affiliation_string":"Computer Architecture and Dependable Systems Laboratory, Indian Institute of Technology Bombay, India","institution_ids":["https://openalex.org/I162827531"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":3,"corresponding_author_ids":["https://openalex.org/A5089521059"],"corresponding_institution_ids":["https://openalex.org/I162827531"],"apc_list":null,"apc_paid":null,"fwci":0.134,"has_fulltext":false,"cited_by_count":1,"citation_normalized_percentile":{"value":0.43758145,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":{"min":90,"max":94},"biblio":{"volume":null,"issue":null,"first_page":"1","last_page":"3"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T11005","display_name":"Radiation Effects in Electronics","score":0.9998000264167786,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T11005","display_name":"Radiation Effects in Electronics","score":0.9998000264167786,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10054","display_name":"Parallel Computing and Optimization Techniques","score":0.9951000213623047,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10772","display_name":"Distributed systems and fault tolerance","score":0.9944999814033508,"subfield":{"id":"https://openalex.org/subfields/1705","display_name":"Computer Networks and Communications"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.8412277698516846},{"id":"https://openalex.org/keywords/soft-error","display_name":"Soft error","score":0.8383495807647705},{"id":"https://openalex.org/keywords/redundancy","display_name":"Redundancy (engineering)","score":0.6610056161880493},{"id":"https://openalex.org/keywords/microarchitecture","display_name":"Microarchitecture","score":0.6023443937301636},{"id":"https://openalex.org/keywords/interleaving","display_name":"Interleaving","score":0.5728299021720886},{"id":"https://openalex.org/keywords/fault-tolerance","display_name":"Fault tolerance","score":0.5521815419197083},{"id":"https://openalex.org/keywords/error-detection-and-correction","display_name":"Error detection and correction","score":0.49717405438423157},{"id":"https://openalex.org/keywords/overhead","display_name":"Overhead (engineering)","score":0.4969384968280792},{"id":"https://openalex.org/keywords/embedded-system","display_name":"Embedded system","score":0.48580408096313477},{"id":"https://openalex.org/keywords/idle","display_name":"Idle","score":0.47454532980918884},{"id":"https://openalex.org/keywords/out-of-order-execution","display_name":"Out-of-order execution","score":0.4606480896472931},{"id":"https://openalex.org/keywords/parallel-computing","display_name":"Parallel computing","score":0.41926708817481995},{"id":"https://openalex.org/keywords/operating-system","display_name":"Operating system","score":0.23106729984283447}],"concepts":[{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.8412277698516846},{"id":"https://openalex.org/C154474529","wikidata":"https://www.wikidata.org/wiki/Q1658917","display_name":"Soft error","level":2,"score":0.8383495807647705},{"id":"https://openalex.org/C152124472","wikidata":"https://www.wikidata.org/wiki/Q1204361","display_name":"Redundancy (engineering)","level":2,"score":0.6610056161880493},{"id":"https://openalex.org/C107598950","wikidata":"https://www.wikidata.org/wiki/Q259864","display_name":"Microarchitecture","level":2,"score":0.6023443937301636},{"id":"https://openalex.org/C28034677","wikidata":"https://www.wikidata.org/wiki/Q17092530","display_name":"Interleaving","level":2,"score":0.5728299021720886},{"id":"https://openalex.org/C63540848","wikidata":"https://www.wikidata.org/wiki/Q3140932","display_name":"Fault tolerance","level":2,"score":0.5521815419197083},{"id":"https://openalex.org/C103088060","wikidata":"https://www.wikidata.org/wiki/Q1062839","display_name":"Error detection and correction","level":2,"score":0.49717405438423157},{"id":"https://openalex.org/C2779960059","wikidata":"https://www.wikidata.org/wiki/Q7113681","display_name":"Overhead (engineering)","level":2,"score":0.4969384968280792},{"id":"https://openalex.org/C149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","level":1,"score":0.48580408096313477},{"id":"https://openalex.org/C16320812","wikidata":"https://www.wikidata.org/wiki/Q1812200","display_name":"Idle","level":2,"score":0.47454532980918884},{"id":"https://openalex.org/C1793878","wikidata":"https://www.wikidata.org/wiki/Q1153762","display_name":"Out-of-order execution","level":2,"score":0.4606480896472931},{"id":"https://openalex.org/C173608175","wikidata":"https://www.wikidata.org/wiki/Q232661","display_name":"Parallel computing","level":1,"score":0.41926708817481995},{"id":"https://openalex.org/C111919701","wikidata":"https://www.wikidata.org/wiki/Q9135","display_name":"Operating system","level":1,"score":0.23106729984283447},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.0},{"id":"https://openalex.org/C24326235","wikidata":"https://www.wikidata.org/wiki/Q126095","display_name":"Electronic engineering","level":1,"score":0.0},{"id":"https://openalex.org/C11413529","wikidata":"https://www.wikidata.org/wiki/Q8366","display_name":"Algorithm","level":1,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/iolts59296.2023.10224863","is_oa":false,"landing_page_url":"http://dx.doi.org/10.1109/iolts59296.2023.10224863","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2023 IEEE 29th International Symposium on On-Line Testing and Robust System Design (IOLTS)","raw_type":"proceedings-article"}],"best_oa_location":null,"sustainable_development_goals":[],"awards":[],"funders":[],"has_content":{"pdf":false,"grobid_xml":false},"content_urls":null,"referenced_works_count":11,"referenced_works":["https://openalex.org/W1978301594","https://openalex.org/W2034062945","https://openalex.org/W2052839611","https://openalex.org/W2100624635","https://openalex.org/W2150196852","https://openalex.org/W2157128750","https://openalex.org/W2161549238","https://openalex.org/W3005967710","https://openalex.org/W3091730480","https://openalex.org/W3140468928","https://openalex.org/W4234252501"],"related_works":["https://openalex.org/W2111412181","https://openalex.org/W2120628323","https://openalex.org/W4255052811","https://openalex.org/W2121233497","https://openalex.org/W3091730480","https://openalex.org/W2108066628","https://openalex.org/W3080121899","https://openalex.org/W2087838646","https://openalex.org/W4210245450","https://openalex.org/W2524933571"],"abstract_inverted_index":{"Contemporary":[0],"integrated":[1],"circuits":[2],"are":[3,83],"becoming":[4],"increasingly":[5],"susceptible":[6],"to":[7,11,61,101],"soft":[8,30],"errors":[9,31],"due":[10],"single-event":[12],"upsets,":[13],"effectively":[14],"decreasing":[15],"the":[16,25,46,56,77,81,90,106,116],"reliability":[17],"of":[18,48,89,108,120],"operation.":[19],"In":[20],"this":[21],"paper,":[22],"we":[23,74],"propose":[24],"ERrOR":[26,94,135],"microarchitecture,":[27,151],"that":[28,76],"detects":[29],"in":[32,59,80],"processor":[33,57],"operation":[34],"using":[35],"temporal":[36],"redundancy":[37],"with":[38,66,130],"minimal":[39],"hardware":[40],"overhead.":[41],"Previous":[42],"proposals":[43],"have":[44],"explored":[45],"idea":[47],"introducing":[49],"an":[50,147],"Early":[51],"Execution":[52],"Unit":[53],"(EXU)":[54],"at":[55,115],"frontend":[58,98],"order":[60],"expeditiously":[62],"execute":[63],"dynamic":[64,103],"instructions":[65,104],"short":[67],"dependency":[68],"chains":[69],"for":[70,85,105,123,132],"performance":[71,143],"improvement.":[72],"However,":[73],"observe":[75],"functional":[78,99],"units":[79,100],"EXU":[82],"idle":[84,121],"a":[86],"significant":[87],"fraction":[88],"program":[91,128],"execution":[92,125,129],"duration.":[93],"leverages":[95],"these":[96],"inactive":[97],"re-execute":[102],"purpose":[107],"error":[109,133],"detection.":[110,134],"A":[111],"lightweight":[112],"verifier":[113],"introduced":[114],"backend":[117],"makes":[118],"use":[119],"resources":[122],"redundant":[124],"by":[126,144],"interleaving":[127],"re-execution":[131],"provides":[136],"exhaustive":[137],"transient":[138],"fault":[139],"coverage":[140],"while":[141],"improving":[142],"7.5%":[145],"over":[146],"existing":[148],"restricted":[149],"OoO":[150],"Freeflow":[152],"Core.":[153]},"counts_by_year":[{"year":2024,"cited_by_count":1}],"updated_date":"2025-12-21T23:12:01.093139","created_date":"2025-10-10T00:00:00"}
