{"id":"https://openalex.org/W2978031981","doi":"https://doi.org/10.1109/iolts.2019.8854384","title":"Variation-Resilient Design Techniques for Energy-Constrained Systems","display_name":"Variation-Resilient Design Techniques for Energy-Constrained Systems","publication_year":2019,"publication_date":"2019-07-01","ids":{"openalex":"https://openalex.org/W2978031981","doi":"https://doi.org/10.1109/iolts.2019.8854384","mag":"2978031981"},"language":"en","primary_location":{"id":"doi:10.1109/iolts.2019.8854384","is_oa":false,"landing_page_url":"https://doi.org/10.1109/iolts.2019.8854384","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2019 IEEE 25th International Symposium on On-Line Testing and Robust System Design (IOLTS)","raw_type":"proceedings-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5046442535","display_name":"Bing-Chen Wu","orcid":"https://orcid.org/0000-0002-7451-4261"},"institutions":[{"id":"https://openalex.org/I16733864","display_name":"National Taiwan University","ror":"https://ror.org/05bqach95","country_code":"TW","type":"education","lineage":["https://openalex.org/I16733864"]}],"countries":["TW"],"is_corresponding":true,"raw_author_name":"Bing-Chen Wu","raw_affiliation_strings":["Graduate Institute of Electronics Engineering National Taiwan University, Taipei, Taiwan"],"affiliations":[{"raw_affiliation_string":"Graduate Institute of Electronics Engineering National Taiwan University, Taipei, Taiwan","institution_ids":["https://openalex.org/I16733864"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5066241253","display_name":"Tsung-Te Liu","orcid":"https://orcid.org/0000-0002-5433-9830"},"institutions":[{"id":"https://openalex.org/I16733864","display_name":"National Taiwan University","ror":"https://ror.org/05bqach95","country_code":"TW","type":"education","lineage":["https://openalex.org/I16733864"]}],"countries":["TW"],"is_corresponding":false,"raw_author_name":"Tsung-Te Liu","raw_affiliation_strings":["Graduate Institute of Electronics Engineering National Taiwan University, Taipei, Taiwan"],"affiliations":[{"raw_affiliation_string":"Graduate Institute of Electronics Engineering National Taiwan University, Taipei, Taiwan","institution_ids":["https://openalex.org/I16733864"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":2,"corresponding_author_ids":["https://openalex.org/A5046442535"],"corresponding_institution_ids":["https://openalex.org/I16733864"],"apc_list":null,"apc_paid":null,"fwci":0.0,"has_fulltext":false,"cited_by_count":0,"citation_normalized_percentile":{"value":0.09802521,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":null,"biblio":{"volume":"51","issue":null,"first_page":"228","last_page":"231"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10363","display_name":"Low-power high-performance VLSI design","score":1.0,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10363","display_name":"Low-power high-performance VLSI design","score":1.0,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11522","display_name":"VLSI and FPGA Design Techniques","score":0.9998000264167786,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10558","display_name":"Advancements in Semiconductor Devices and Circuit Design","score":0.9994999766349792,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/robustness","display_name":"Robustness (evolution)","score":0.6665065288543701},{"id":"https://openalex.org/keywords/cmos","display_name":"CMOS","score":0.6655850410461426},{"id":"https://openalex.org/keywords/process-variation","display_name":"Process variation","score":0.6444560885429382},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.6251713037490845},{"id":"https://openalex.org/keywords/dynamic-voltage-scaling","display_name":"Dynamic voltage scaling","score":0.5261078476905823},{"id":"https://openalex.org/keywords/integrated-circuit-design","display_name":"Integrated circuit design","score":0.520347535610199},{"id":"https://openalex.org/keywords/very-large-scale-integration","display_name":"Very-large-scale integration","score":0.4882517158985138},{"id":"https://openalex.org/keywords/voltage","display_name":"Voltage","score":0.46806374192237854},{"id":"https://openalex.org/keywords/electronic-engineering","display_name":"Electronic engineering","score":0.4615571200847626},{"id":"https://openalex.org/keywords/scope","display_name":"Scope (computer science)","score":0.44853973388671875},{"id":"https://openalex.org/keywords/efficient-energy-use","display_name":"Efficient energy use","score":0.43592286109924316},{"id":"https://openalex.org/keywords/process","display_name":"Process (computing)","score":0.28396928310394287},{"id":"https://openalex.org/keywords/engineering","display_name":"Engineering","score":0.2544552683830261},{"id":"https://openalex.org/keywords/embedded-system","display_name":"Embedded system","score":0.22773927450180054},{"id":"https://openalex.org/keywords/electrical-engineering","display_name":"Electrical engineering","score":0.14729002118110657}],"concepts":[{"id":"https://openalex.org/C63479239","wikidata":"https://www.wikidata.org/wiki/Q7353546","display_name":"Robustness (evolution)","level":3,"score":0.6665065288543701},{"id":"https://openalex.org/C46362747","wikidata":"https://www.wikidata.org/wiki/Q173431","display_name":"CMOS","level":2,"score":0.6655850410461426},{"id":"https://openalex.org/C93389723","wikidata":"https://www.wikidata.org/wiki/Q7247313","display_name":"Process variation","level":3,"score":0.6444560885429382},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.6251713037490845},{"id":"https://openalex.org/C2776047111","wikidata":"https://www.wikidata.org/wiki/Q632037","display_name":"Dynamic voltage scaling","level":3,"score":0.5261078476905823},{"id":"https://openalex.org/C74524168","wikidata":"https://www.wikidata.org/wiki/Q1074539","display_name":"Integrated circuit design","level":2,"score":0.520347535610199},{"id":"https://openalex.org/C14580979","wikidata":"https://www.wikidata.org/wiki/Q876049","display_name":"Very-large-scale integration","level":2,"score":0.4882517158985138},{"id":"https://openalex.org/C165801399","wikidata":"https://www.wikidata.org/wiki/Q25428","display_name":"Voltage","level":2,"score":0.46806374192237854},{"id":"https://openalex.org/C24326235","wikidata":"https://www.wikidata.org/wiki/Q126095","display_name":"Electronic engineering","level":1,"score":0.4615571200847626},{"id":"https://openalex.org/C2778012447","wikidata":"https://www.wikidata.org/wiki/Q1034415","display_name":"Scope (computer science)","level":2,"score":0.44853973388671875},{"id":"https://openalex.org/C2742236","wikidata":"https://www.wikidata.org/wiki/Q924713","display_name":"Efficient energy use","level":2,"score":0.43592286109924316},{"id":"https://openalex.org/C98045186","wikidata":"https://www.wikidata.org/wiki/Q205663","display_name":"Process (computing)","level":2,"score":0.28396928310394287},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.2544552683830261},{"id":"https://openalex.org/C149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","level":1,"score":0.22773927450180054},{"id":"https://openalex.org/C119599485","wikidata":"https://www.wikidata.org/wiki/Q43035","display_name":"Electrical engineering","level":1,"score":0.14729002118110657},{"id":"https://openalex.org/C104317684","wikidata":"https://www.wikidata.org/wiki/Q7187","display_name":"Gene","level":2,"score":0.0},{"id":"https://openalex.org/C111919701","wikidata":"https://www.wikidata.org/wiki/Q9135","display_name":"Operating system","level":1,"score":0.0},{"id":"https://openalex.org/C185592680","wikidata":"https://www.wikidata.org/wiki/Q2329","display_name":"Chemistry","level":0,"score":0.0},{"id":"https://openalex.org/C55493867","wikidata":"https://www.wikidata.org/wiki/Q7094","display_name":"Biochemistry","level":1,"score":0.0},{"id":"https://openalex.org/C199360897","wikidata":"https://www.wikidata.org/wiki/Q9143","display_name":"Programming language","level":1,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/iolts.2019.8854384","is_oa":false,"landing_page_url":"https://doi.org/10.1109/iolts.2019.8854384","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2019 IEEE 25th International Symposium on On-Line Testing and Robust System Design (IOLTS)","raw_type":"proceedings-article"}],"best_oa_location":null,"sustainable_development_goals":[{"id":"https://metadata.un.org/sdg/7","display_name":"Affordable and clean energy","score":0.8999999761581421}],"awards":[],"funders":[],"has_content":{"pdf":false,"grobid_xml":false},"content_urls":null,"referenced_works_count":29,"referenced_works":["https://openalex.org/W1620991513","https://openalex.org/W1978760319","https://openalex.org/W1996266622","https://openalex.org/W2010635096","https://openalex.org/W2015917466","https://openalex.org/W2025340565","https://openalex.org/W2058066847","https://openalex.org/W2068372672","https://openalex.org/W2086205576","https://openalex.org/W2087107264","https://openalex.org/W2095351656","https://openalex.org/W2107103004","https://openalex.org/W2117648153","https://openalex.org/W2133256259","https://openalex.org/W2146410479","https://openalex.org/W2156667996","https://openalex.org/W2158552598","https://openalex.org/W2159497348","https://openalex.org/W2174721295","https://openalex.org/W2178304595","https://openalex.org/W2220643768","https://openalex.org/W2318181542","https://openalex.org/W2610603505","https://openalex.org/W2761878354","https://openalex.org/W2789665175","https://openalex.org/W2802288775","https://openalex.org/W2908635805","https://openalex.org/W4243737302","https://openalex.org/W6649553657"],"related_works":["https://openalex.org/W2053154428","https://openalex.org/W2146978563","https://openalex.org/W2155832338","https://openalex.org/W2139512173","https://openalex.org/W2101197344","https://openalex.org/W2033560541","https://openalex.org/W2160885012","https://openalex.org/W2126607849","https://openalex.org/W1569991298","https://openalex.org/W2002611358"],"abstract_inverted_index":{"Process,":[0],"voltage,":[1],"and":[2,14,52,58],"temperature":[3],"(PVT)":[4],"variations":[5,37],"substantially":[6],"increase":[7],"the":[8,16,40,70],"variability":[9],"of":[10,43],"digital":[11,44],"CMOS":[12,45],"logics":[13],"reduce":[15],"operation":[17],"robustness,":[18],"especially":[19],"for":[20,34,56,75],"energy-constrained":[21],"systems":[22],"with":[23],"aggressive":[24],"voltage":[25,73],"scaling.":[26],"This":[27],"paper":[28],"reviews":[29],"several":[30],"variation-resilient":[31],"design":[32,54,67],"techniques":[33,55],"addressing":[35],"PVT":[36],"to":[38],"improve":[39],"energy":[41],"efficiency":[42],"VLSI":[46],"circuits.":[47],"The":[48],"scope":[49],"includes":[50],"static":[51],"adaptive":[53,66],"design-time":[57],"run-time":[59],"optimization,":[60],"respectively.":[61],"In":[62],"addition,":[63],"an":[64],"emerging":[65],"strategy":[68],"combining":[69],"fully":[71],"integrated":[72],"regulator":[74],"system-level":[76],"optimization":[77],"is":[78],"also":[79],"introduced.":[80]},"counts_by_year":[],"updated_date":"2025-11-06T03:46:38.306776","created_date":"2025-10-10T00:00:00"}