{"id":"https://openalex.org/W2758301142","doi":"https://doi.org/10.1109/iolts.2017.8046215","title":"Field profiling &amp; monitoring of payload transistors in FPGAs","display_name":"Field profiling &amp; monitoring of payload transistors in FPGAs","publication_year":2017,"publication_date":"2017-07-01","ids":{"openalex":"https://openalex.org/W2758301142","doi":"https://doi.org/10.1109/iolts.2017.8046215","mag":"2758301142"},"language":"en","primary_location":{"id":"doi:10.1109/iolts.2017.8046215","is_oa":false,"landing_page_url":"http://doi.org/10.1109/iolts.2017.8046215","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2017 IEEE 23rd International Symposium on On-Line Testing and Robust System Design (IOLTS)","raw_type":"proceedings-article"},"type":"conference-paper","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5101934239","display_name":"Da Cheng","orcid":"https://orcid.org/0000-0001-7618-3251"},"institutions":[{"id":"https://openalex.org/I32923980","display_name":"Xilinx (United States)","ror":"https://ror.org/01rb7bk56","country_code":"US","type":"company","lineage":["https://openalex.org/I32923980"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Da Cheng","raw_affiliation_strings":["Xilinx Inc., 2100 Logic Dr., San Jose, CA-95124"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Xilinx Inc., 2100 Logic Dr., San Jose, CA-95124","institution_ids":["https://openalex.org/I32923980"]}]},{"author_position":"middle","author":{"id":null,"display_name":"Amitava Majumdar","orcid":null},"institutions":[{"id":"https://openalex.org/I32923980","display_name":"Xilinx (United States)","ror":"https://ror.org/01rb7bk56","country_code":"US","type":"company","lineage":["https://openalex.org/I32923980"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Amitava Majumdar","raw_affiliation_strings":["Xilinx Inc., 2100 Logic Dr., San Jose, CA-95124"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Xilinx Inc., 2100 Logic Dr., San Jose, CA-95124","institution_ids":["https://openalex.org/I32923980"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5049223463","display_name":"Xiaobao Wang","orcid":"https://orcid.org/0000-0002-4653-381X"},"institutions":[{"id":"https://openalex.org/I32923980","display_name":"Xilinx (United States)","ror":"https://ror.org/01rb7bk56","country_code":"US","type":"company","lineage":["https://openalex.org/I32923980"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Xiaobao Wang","raw_affiliation_strings":["Xilinx Inc., 2100 Logic Dr., San Jose, CA-95124"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Xilinx Inc., 2100 Logic Dr., San Jose, CA-95124","institution_ids":["https://openalex.org/I32923980"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5112323390","display_name":"N. Chong","orcid":null},"institutions":[{"id":"https://openalex.org/I32923980","display_name":"Xilinx (United States)","ror":"https://ror.org/01rb7bk56","country_code":"US","type":"company","lineage":["https://openalex.org/I32923980"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Nui Chong","raw_affiliation_strings":["Xilinx Inc., 2100 Logic Dr., San Jose, CA-95124"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Xilinx Inc., 2100 Logic Dr., San Jose, CA-95124","institution_ids":["https://openalex.org/I32923980"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":1,"corresponding_author_ids":[],"corresponding_institution_ids":["https://openalex.org/I32923980"],"apc_list":null,"apc_paid":null,"fwci":0.3792,"has_fulltext":false,"cited_by_count":2,"citation_normalized_percentile":{"value":0.49175154,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":{"min":89,"max":94},"biblio":{"volume":"36","issue":null,"first_page":"180","last_page":"185"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T14117","display_name":"Integrated Circuits and Semiconductor Failure Analysis","score":0.9995999932289124,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T14117","display_name":"Integrated Circuits and Semiconductor Failure Analysis","score":0.9995999932289124,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11032","display_name":"VLSI and Analog Circuit Testing","score":0.9993000030517578,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T12495","display_name":"Electrostatic Discharge in Electronics","score":0.9991999864578247,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/pmos-logic","display_name":"PMOS logic","score":0.7699003219604492},{"id":"https://openalex.org/keywords/nmos-logic","display_name":"NMOS logic","score":0.7695441246032715},{"id":"https://openalex.org/keywords/transistor","display_name":"Transistor","score":0.6909917593002319},{"id":"https://openalex.org/keywords/duty-cycle","display_name":"Duty cycle","score":0.6036033034324646},{"id":"https://openalex.org/keywords/granularity","display_name":"Granularity","score":0.536519467830658},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.5287938714027405},{"id":"https://openalex.org/keywords/field-programmable-gate-array","display_name":"Field-programmable gate array","score":0.5206193923950195},{"id":"https://openalex.org/keywords/payload","display_name":"Payload (computing)","score":0.4612167775630951},{"id":"https://openalex.org/keywords/profiling","display_name":"Profiling (computer programming)","score":0.43035635352134705},{"id":"https://openalex.org/keywords/embedded-system","display_name":"Embedded system","score":0.4116341471672058},{"id":"https://openalex.org/keywords/electronic-engineering","display_name":"Electronic engineering","score":0.4064047634601593},{"id":"https://openalex.org/keywords/electrical-engineering","display_name":"Electrical engineering","score":0.3981710374355316},{"id":"https://openalex.org/keywords/voltage","display_name":"Voltage","score":0.31196579337120056},{"id":"https://openalex.org/keywords/engineering","display_name":"Engineering","score":0.3084225058555603}],"concepts":[{"id":"https://openalex.org/C27050352","wikidata":"https://www.wikidata.org/wiki/Q173605","display_name":"PMOS logic","level":4,"score":0.7699003219604492},{"id":"https://openalex.org/C197162436","wikidata":"https://www.wikidata.org/wiki/Q83908","display_name":"NMOS logic","level":4,"score":0.7695441246032715},{"id":"https://openalex.org/C172385210","wikidata":"https://www.wikidata.org/wiki/Q5339","display_name":"Transistor","level":3,"score":0.6909917593002319},{"id":"https://openalex.org/C199822604","wikidata":"https://www.wikidata.org/wiki/Q557120","display_name":"Duty cycle","level":3,"score":0.6036033034324646},{"id":"https://openalex.org/C177774035","wikidata":"https://www.wikidata.org/wiki/Q1246948","display_name":"Granularity","level":2,"score":0.536519467830658},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.5287938714027405},{"id":"https://openalex.org/C42935608","wikidata":"https://www.wikidata.org/wiki/Q190411","display_name":"Field-programmable gate array","level":2,"score":0.5206193923950195},{"id":"https://openalex.org/C134066672","wikidata":"https://www.wikidata.org/wiki/Q1424639","display_name":"Payload (computing)","level":3,"score":0.4612167775630951},{"id":"https://openalex.org/C187191949","wikidata":"https://www.wikidata.org/wiki/Q1138496","display_name":"Profiling (computer programming)","level":2,"score":0.43035635352134705},{"id":"https://openalex.org/C149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","level":1,"score":0.4116341471672058},{"id":"https://openalex.org/C24326235","wikidata":"https://www.wikidata.org/wiki/Q126095","display_name":"Electronic engineering","level":1,"score":0.4064047634601593},{"id":"https://openalex.org/C119599485","wikidata":"https://www.wikidata.org/wiki/Q43035","display_name":"Electrical engineering","level":1,"score":0.3981710374355316},{"id":"https://openalex.org/C165801399","wikidata":"https://www.wikidata.org/wiki/Q25428","display_name":"Voltage","level":2,"score":0.31196579337120056},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.3084225058555603},{"id":"https://openalex.org/C111919701","wikidata":"https://www.wikidata.org/wiki/Q9135","display_name":"Operating system","level":1,"score":0.0},{"id":"https://openalex.org/C31258907","wikidata":"https://www.wikidata.org/wiki/Q1301371","display_name":"Computer network","level":1,"score":0.0},{"id":"https://openalex.org/C158379750","wikidata":"https://www.wikidata.org/wiki/Q214111","display_name":"Network packet","level":2,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/iolts.2017.8046215","is_oa":false,"landing_page_url":"http://doi.org/10.1109/iolts.2017.8046215","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2017 IEEE 23rd International Symposium on On-Line Testing and Robust System Design (IOLTS)","raw_type":"proceedings-article"}],"best_oa_location":null,"sustainable_development_goals":[],"awards":[],"funders":[],"has_content":{"pdf":false,"grobid_xml":false},"content_urls":null,"referenced_works_count":21,"referenced_works":["https://openalex.org/W306641292","https://openalex.org/W1975647856","https://openalex.org/W1994625839","https://openalex.org/W2028212645","https://openalex.org/W2031068066","https://openalex.org/W2038555165","https://openalex.org/W2052852883","https://openalex.org/W2056378733","https://openalex.org/W2066698193","https://openalex.org/W2105282817","https://openalex.org/W2112414127","https://openalex.org/W2115194774","https://openalex.org/W2144613846","https://openalex.org/W2147524077","https://openalex.org/W2154221003","https://openalex.org/W2160049268","https://openalex.org/W2357582783","https://openalex.org/W4235696082","https://openalex.org/W6664196189","https://openalex.org/W6681812573","https://openalex.org/W6706437497"],"related_works":["https://openalex.org/W4386261925","https://openalex.org/W2048420745","https://openalex.org/W2082944690","https://openalex.org/W2263373136","https://openalex.org/W1914349328","https://openalex.org/W2160067645","https://openalex.org/W2023334077","https://openalex.org/W2005494397","https://openalex.org/W2104885411","https://openalex.org/W2339836056"],"abstract_inverted_index":{"A":[0,23],"new":[1,24,33],"use":[2,96],"for":[3,106,112,119],"ring-oscillators":[4],"(ROs)":[5],"is":[6,30,80],"proposed":[7],"by":[8],"which":[9],"PMOS":[10],"and":[11,18,43,91,104,116],"NMOS":[12],"transistor":[13,121],"strengths":[14],"can":[15,68],"be":[16,69],"measured":[17],"monitored":[19],"in":[20,71],"the":[21,59,72,89,92],"field.":[22],"metric,":[25,34],"based":[26,46,66],"on":[27,47],"RO":[28],"duty-cycle":[29,107],"defined.":[31],"This":[32],"along":[35,57],"with":[36,58,83],"RO-frequency,":[37],"offers":[38],"a":[39,75,101],"way":[40],"to":[41],"profile":[42],"bin":[44],"transistors":[45],"their":[48],"drive":[49],"strengths.":[50],"With":[51],"ROs":[52,99],"configured":[53],"from":[54],"payload":[55,120],"transistors,":[56],"natural":[60],"programmability":[61],"of":[62,77,88,97],"FPGAs,":[63],"this":[64],"strength":[65],"profiling":[67,93],"done":[70],"field":[73],"at":[74],"level":[76],"granularity":[78],"that":[79],"not":[81],"possible":[82],"existing":[84],"methodologies.":[85],"New":[86],"applications":[87],"metrics":[90],"methodology":[94],"include":[95],"on-die":[98],"as":[100],"(a)":[102],"monitor":[103],"control":[105],"sensitive":[108],"designs,":[109],"(b)":[110],"replacement":[111],"scribe-line":[113],"test":[114],"structures,":[115],"(c)":[117],"sensor":[118],"characteristics":[122],"over":[123],"life-time.":[124]},"counts_by_year":[{"year":2022,"cited_by_count":1},{"year":2018,"cited_by_count":1}],"updated_date":"2026-07-29T14:22:42.915294","created_date":"2025-10-10T00:00:00"}
