{"id":"https://openalex.org/W2538538157","doi":"https://doi.org/10.1109/iolts.2016.7604684","title":"Leakage mitigation for low power microcontroller design in 40nm for Internet-of-Things (IoT)","display_name":"Leakage mitigation for low power microcontroller design in 40nm for Internet-of-Things (IoT)","publication_year":2016,"publication_date":"2016-07-01","ids":{"openalex":"https://openalex.org/W2538538157","doi":"https://doi.org/10.1109/iolts.2016.7604684","mag":"2538538157"},"language":"en","primary_location":{"id":"doi:10.1109/iolts.2016.7604684","is_oa":false,"landing_page_url":"https://doi.org/10.1109/iolts.2016.7604684","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2016 IEEE 22nd International Symposium on On-Line Testing and Robust System Design (IOLTS)","raw_type":"proceedings-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5112059852","display_name":"Ajay Kapoor","orcid":null},"institutions":[{"id":"https://openalex.org/I109147379","display_name":"NXP (Netherlands)","ror":"https://ror.org/059be4e97","country_code":"NL","type":"company","lineage":["https://openalex.org/I109147379"]}],"countries":["NL"],"is_corresponding":true,"raw_author_name":"Ajay Kapoor","raw_affiliation_strings":["NXP Semiconductors, Eindhoven, Netherlands"],"affiliations":[{"raw_affiliation_string":"NXP Semiconductors, Eindhoven, Netherlands","institution_ids":["https://openalex.org/I109147379"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5015621274","display_name":"N. Engin","orcid":null},"institutions":[{"id":"https://openalex.org/I109147379","display_name":"NXP (Netherlands)","ror":"https://ror.org/059be4e97","country_code":"NL","type":"company","lineage":["https://openalex.org/I109147379"]}],"countries":["NL"],"is_corresponding":false,"raw_author_name":"Nur Engin","raw_affiliation_strings":["NXP Semiconductors, Eindhoven, Netherlands"],"affiliations":[{"raw_affiliation_string":"NXP Semiconductors, Eindhoven, Netherlands","institution_ids":["https://openalex.org/I109147379"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5085844024","display_name":"J.P.M. Verdaasdonk","orcid":null},"institutions":[{"id":"https://openalex.org/I109147379","display_name":"NXP (Netherlands)","ror":"https://ror.org/059be4e97","country_code":"NL","type":"company","lineage":["https://openalex.org/I109147379"]}],"countries":["NL"],"is_corresponding":false,"raw_author_name":"Johan Verdaasdonk","raw_affiliation_strings":["NXP Semiconductors, Eindhoven, Netherlands"],"affiliations":[{"raw_affiliation_string":"NXP Semiconductors, Eindhoven, Netherlands","institution_ids":["https://openalex.org/I109147379"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":3,"corresponding_author_ids":["https://openalex.org/A5112059852"],"corresponding_institution_ids":["https://openalex.org/I109147379"],"apc_list":null,"apc_paid":null,"fwci":0.1838,"has_fulltext":false,"cited_by_count":1,"citation_normalized_percentile":{"value":0.58793875,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":{"min":90,"max":94},"biblio":{"volume":"3","issue":null,"first_page":"126","last_page":"129"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10363","display_name":"Low-power high-performance VLSI design","score":1.0,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10363","display_name":"Low-power high-performance VLSI design","score":1.0,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11005","display_name":"Radiation Effects in Electronics","score":0.9993000030517578,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10472","display_name":"Semiconductor materials and devices","score":0.9983999729156494,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/nmos-logic","display_name":"NMOS logic","score":0.6921347379684448},{"id":"https://openalex.org/keywords/static-random-access-memory","display_name":"Static random-access memory","score":0.6430904865264893},{"id":"https://openalex.org/keywords/pmos-logic","display_name":"PMOS logic","score":0.6382033228874207},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.5774288177490234},{"id":"https://openalex.org/keywords/leakage","display_name":"Leakage (economics)","score":0.5584560632705688},{"id":"https://openalex.org/keywords/embedded-system","display_name":"Embedded system","score":0.510698139667511},{"id":"https://openalex.org/keywords/electronic-engineering","display_name":"Electronic engineering","score":0.499420166015625},{"id":"https://openalex.org/keywords/duty-cycle","display_name":"Duty cycle","score":0.49638062715530396},{"id":"https://openalex.org/keywords/logic-gate","display_name":"Logic gate","score":0.48959025740623474},{"id":"https://openalex.org/keywords/modbus","display_name":"Modbus","score":0.48039036989212036},{"id":"https://openalex.org/keywords/transistor","display_name":"Transistor","score":0.3789321184158325},{"id":"https://openalex.org/keywords/electrical-engineering","display_name":"Electrical engineering","score":0.3648878335952759},{"id":"https://openalex.org/keywords/voltage","display_name":"Voltage","score":0.31150132417678833},{"id":"https://openalex.org/keywords/engineering","display_name":"Engineering","score":0.2638345956802368},{"id":"https://openalex.org/keywords/computer-hardware","display_name":"Computer hardware","score":0.25491398572921753},{"id":"https://openalex.org/keywords/computer-network","display_name":"Computer network","score":0.14028528332710266},{"id":"https://openalex.org/keywords/communications-protocol","display_name":"Communications protocol","score":0.10136255621910095}],"concepts":[{"id":"https://openalex.org/C197162436","wikidata":"https://www.wikidata.org/wiki/Q83908","display_name":"NMOS logic","level":4,"score":0.6921347379684448},{"id":"https://openalex.org/C68043766","wikidata":"https://www.wikidata.org/wiki/Q267416","display_name":"Static random-access memory","level":2,"score":0.6430904865264893},{"id":"https://openalex.org/C27050352","wikidata":"https://www.wikidata.org/wiki/Q173605","display_name":"PMOS logic","level":4,"score":0.6382033228874207},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.5774288177490234},{"id":"https://openalex.org/C2777042071","wikidata":"https://www.wikidata.org/wiki/Q6509304","display_name":"Leakage (economics)","level":2,"score":0.5584560632705688},{"id":"https://openalex.org/C149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","level":1,"score":0.510698139667511},{"id":"https://openalex.org/C24326235","wikidata":"https://www.wikidata.org/wiki/Q126095","display_name":"Electronic engineering","level":1,"score":0.499420166015625},{"id":"https://openalex.org/C199822604","wikidata":"https://www.wikidata.org/wiki/Q557120","display_name":"Duty cycle","level":3,"score":0.49638062715530396},{"id":"https://openalex.org/C131017901","wikidata":"https://www.wikidata.org/wiki/Q170451","display_name":"Logic gate","level":2,"score":0.48959025740623474},{"id":"https://openalex.org/C2776666747","wikidata":"https://www.wikidata.org/wiki/Q1135322","display_name":"Modbus","level":3,"score":0.48039036989212036},{"id":"https://openalex.org/C172385210","wikidata":"https://www.wikidata.org/wiki/Q5339","display_name":"Transistor","level":3,"score":0.3789321184158325},{"id":"https://openalex.org/C119599485","wikidata":"https://www.wikidata.org/wiki/Q43035","display_name":"Electrical engineering","level":1,"score":0.3648878335952759},{"id":"https://openalex.org/C165801399","wikidata":"https://www.wikidata.org/wiki/Q25428","display_name":"Voltage","level":2,"score":0.31150132417678833},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.2638345956802368},{"id":"https://openalex.org/C9390403","wikidata":"https://www.wikidata.org/wiki/Q3966","display_name":"Computer hardware","level":1,"score":0.25491398572921753},{"id":"https://openalex.org/C31258907","wikidata":"https://www.wikidata.org/wiki/Q1301371","display_name":"Computer network","level":1,"score":0.14028528332710266},{"id":"https://openalex.org/C12269588","wikidata":"https://www.wikidata.org/wiki/Q132364","display_name":"Communications protocol","level":2,"score":0.10136255621910095},{"id":"https://openalex.org/C162324750","wikidata":"https://www.wikidata.org/wiki/Q8134","display_name":"Economics","level":0,"score":0.0},{"id":"https://openalex.org/C139719470","wikidata":"https://www.wikidata.org/wiki/Q39680","display_name":"Macroeconomics","level":1,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/iolts.2016.7604684","is_oa":false,"landing_page_url":"https://doi.org/10.1109/iolts.2016.7604684","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2016 IEEE 22nd International Symposium on On-Line Testing and Robust System Design (IOLTS)","raw_type":"proceedings-article"}],"best_oa_location":null,"sustainable_development_goals":[{"display_name":"Affordable and clean energy","score":0.8799999952316284,"id":"https://metadata.un.org/sdg/7"}],"awards":[],"funders":[],"has_content":{"pdf":false,"grobid_xml":false},"content_urls":null,"referenced_works_count":22,"referenced_works":["https://openalex.org/W1534925464","https://openalex.org/W1876288589","https://openalex.org/W1971130353","https://openalex.org/W1982756257","https://openalex.org/W2019242710","https://openalex.org/W2067268336","https://openalex.org/W2092851441","https://openalex.org/W2116238498","https://openalex.org/W2120702791","https://openalex.org/W2123808925","https://openalex.org/W2125263803","https://openalex.org/W2131862714","https://openalex.org/W2132729131","https://openalex.org/W2140823559","https://openalex.org/W2167188929","https://openalex.org/W2602339822","https://openalex.org/W4238002809","https://openalex.org/W4244758500","https://openalex.org/W6632090173","https://openalex.org/W6676970675","https://openalex.org/W6677719277","https://openalex.org/W7015023743"],"related_works":["https://openalex.org/W4386261925","https://openalex.org/W2048420745","https://openalex.org/W2082944690","https://openalex.org/W2263373136","https://openalex.org/W1914349328","https://openalex.org/W2160067645","https://openalex.org/W2023334077","https://openalex.org/W2005494397","https://openalex.org/W2104885411","https://openalex.org/W2339836056"],"abstract_inverted_index":{"Modern":[0],"systems":[1,31],"for":[2,61,81,106,136],"ubiquitous":[3],"computing":[4,11],"domains":[5],"such":[6,30],"as":[7,174],"Internet-of-things":[8],"(IoT),":[9],"wearable":[10],"etc.":[12],"are":[13],"characterized":[14],"by":[15,23,35,130,134,158,197,201,238,246],"low":[16,19,215],"duty":[17],"cycle,":[18],"operating":[20],"and":[21,56,83,143,165,199,256,263],"stand":[22],"power":[24,133,255],"consumption":[25],"requirements.":[26,46],"The":[27],"design":[28],"of":[29,53,72,221],"is":[32,195,250],"further":[33],"constrained":[34],"increasing":[36,234],"leakages":[37],"due":[38,184,217],"to":[39,94,185,218,223,227],"technology":[40],"scaling":[41],"and/or":[42],"increased":[43,219,264],"data":[44,116,145],"retention":[45,117],"These":[47],"conflicting":[48],"requirements":[49],"make":[50],"leakage":[51,74,128,156,179,222,244,270],"reduction":[52,75],"digital":[54,84,140],"logic":[55,155],"SRAM":[57,82,87],"a":[58],"primary":[59],"objective":[60],"efficient":[62],"system":[63],"realization.":[64],"In":[65],"this":[66],"work,":[67],"we":[68],"discuss":[69],"the":[70,95,115,127,139,154,161,190,211,235,243,259],"effectiveness":[71],"advance":[73],"techniques":[76],"in":[77,160,178,268],"40nm":[78],"(HYT":[79],"technology)":[80],"logic.":[85],"For":[86,138],"memory,":[88],"adding":[89],"error":[90],"correction":[91],"coding":[92],"(ECC)":[93],"memory":[96],"subsystem":[97],"can":[98,152,207,240,266],"provide":[99],"new":[100],"trade-offs":[101],"which":[102],"will":[103,124],"be":[104,171],"advantageous":[105],"these":[107],"low-duty":[108],"cycle":[109],"systems.":[110],"We":[111,230],"show":[112,232],"that":[113,147,233],"decreasing":[114],"voltage":[118],"while":[119,248],"preventing":[120],"errors":[121],"using":[122],"ECC":[123],"help":[125,209,241],"decrease":[126],"current":[129,157,180,245],"45%":[131],"(leakage":[132],"70%":[135],"SRAM).":[137],"logic,":[141],"test":[142],"simulation":[144],"shows":[146],"reverse":[148],"body":[149],"biasing":[150,192],"(RBB)":[151],"reduce":[153,242],"~3x":[159],"worst":[162],"case":[163],"process":[164],"temperature":[166],"conditions.":[167],"However,":[168],"it":[169],"should":[170],"carefully":[172],"implemented":[173],"RBB":[175,206,261],"causes":[176],"increase":[177],"at":[181,214],"nominal":[182],"temperatures":[183],"higher":[186],"junction":[187],"currents.":[188],"Moreover,":[189],"asymmetric":[191,260],"where":[193],"PMOS":[194],"biased":[196],"0.7V":[198],"NMOS":[200],"0.3V":[202],"provides":[203],"optimum":[204],"results.":[205],"also":[208,231],"reducing":[210],"switching":[212],"energy":[213,225],"frequency":[216],"contribution":[220],"total":[224],"compare":[226],"conventional":[228],"technologies.":[229],"gate":[236],"length":[237],"20%":[239],"2x":[247],"there":[249],"minimal":[251],"penalty":[252],"on":[253],"dynamic":[254],"speed.":[257],"Combining":[258],"application":[262],"gate-length":[265],"result":[267],"~6x":[269],"reduction.":[271]},"counts_by_year":[{"year":2017,"cited_by_count":1}],"updated_date":"2025-11-06T03:46:38.306776","created_date":"2025-10-10T00:00:00"}