{"id":"https://openalex.org/W2028705672","doi":"https://doi.org/10.1109/iolts.2014.6873688","title":"Power-aware optimization of software-based self-test for L1 caches in microprocessors","display_name":"Power-aware optimization of software-based self-test for L1 caches in microprocessors","publication_year":2014,"publication_date":"2014-07-01","ids":{"openalex":"https://openalex.org/W2028705672","doi":"https://doi.org/10.1109/iolts.2014.6873688","mag":"2028705672"},"language":"en","primary_location":{"id":"doi:10.1109/iolts.2014.6873688","is_oa":false,"landing_page_url":"https://doi.org/10.1109/iolts.2014.6873688","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2014 IEEE 20th International On-Line Testing Symposium (IOLTS)","raw_type":"proceedings-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5045551074","display_name":"\u0393\u03b5\u03ce\u03c1\u03b3\u03b9\u03bf\u03c2 \u0398\u03b5\u03bf\u03b4\u03ce\u03c1\u03bf\u03c5","orcid":"https://orcid.org/0000-0001-5413-2189"},"institutions":[{"id":"https://openalex.org/I200777214","display_name":"National and Kapodistrian University of Athens","ror":"https://ror.org/04gnjpq42","country_code":"GR","type":"education","lineage":["https://openalex.org/I200777214"]}],"countries":["GR"],"is_corresponding":true,"raw_author_name":"G. Theodorou","raw_affiliation_strings":["Department of Informatics & Telecommunications, University of Athens, Greece","Dept. Of Inf. & Telecommun., Univ. of Athens, Athens, Greece"],"affiliations":[{"raw_affiliation_string":"Department of Informatics & Telecommunications, University of Athens, Greece","institution_ids":["https://openalex.org/I200777214"]},{"raw_affiliation_string":"Dept. Of Inf. & Telecommun., Univ. of Athens, Athens, Greece","institution_ids":["https://openalex.org/I200777214"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5004548184","display_name":"N. Kranitis","orcid":"https://orcid.org/0000-0002-0521-4433"},"institutions":[{"id":"https://openalex.org/I200777214","display_name":"National and Kapodistrian University of Athens","ror":"https://ror.org/04gnjpq42","country_code":"GR","type":"education","lineage":["https://openalex.org/I200777214"]}],"countries":["GR"],"is_corresponding":false,"raw_author_name":"N. Kranitis","raw_affiliation_strings":["Department of Informatics & Telecommunications, University of Athens, Greece","Dept. Of Inf. & Telecommun., Univ. of Athens, Athens, Greece"],"affiliations":[{"raw_affiliation_string":"Department of Informatics & Telecommunications, University of Athens, Greece","institution_ids":["https://openalex.org/I200777214"]},{"raw_affiliation_string":"Dept. Of Inf. & Telecommun., Univ. of Athens, Athens, Greece","institution_ids":["https://openalex.org/I200777214"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5087973205","display_name":"A. Paschalis","orcid":"https://orcid.org/0000-0002-6236-4227"},"institutions":[{"id":"https://openalex.org/I200777214","display_name":"National and Kapodistrian University of Athens","ror":"https://ror.org/04gnjpq42","country_code":"GR","type":"education","lineage":["https://openalex.org/I200777214"]}],"countries":["GR"],"is_corresponding":false,"raw_author_name":"A. Paschalis","raw_affiliation_strings":["Department of Informatics & Telecommunications, University of Athens, Greece","Dept. Of Inf. & Telecommun., Univ. of Athens, Athens, Greece"],"affiliations":[{"raw_affiliation_string":"Department of Informatics & Telecommunications, University of Athens, Greece","institution_ids":["https://openalex.org/I200777214"]},{"raw_affiliation_string":"Dept. Of Inf. & Telecommun., Univ. of Athens, Athens, Greece","institution_ids":["https://openalex.org/I200777214"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5007119083","display_name":"Dimitris Gizopoulos","orcid":"https://orcid.org/0000-0002-1613-9061"},"institutions":[{"id":"https://openalex.org/I200777214","display_name":"National and Kapodistrian University of Athens","ror":"https://ror.org/04gnjpq42","country_code":"GR","type":"education","lineage":["https://openalex.org/I200777214"]}],"countries":["GR"],"is_corresponding":false,"raw_author_name":"D. Gizopoulos","raw_affiliation_strings":["Department of Informatics & Telecommunications, University of Athens, Greece","Dept. Of Inf. & Telecommun., Univ. of Athens, Athens, Greece"],"affiliations":[{"raw_affiliation_string":"Department of Informatics & Telecommunications, University of Athens, Greece","institution_ids":["https://openalex.org/I200777214"]},{"raw_affiliation_string":"Dept. Of Inf. & Telecommun., Univ. of Athens, Athens, Greece","institution_ids":["https://openalex.org/I200777214"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":4,"corresponding_author_ids":["https://openalex.org/A5045551074"],"corresponding_institution_ids":["https://openalex.org/I200777214"],"apc_list":null,"apc_paid":null,"fwci":0.9194,"has_fulltext":false,"cited_by_count":15,"citation_normalized_percentile":{"value":0.74809296,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":{"min":89,"max":98},"biblio":{"volume":null,"issue":null,"first_page":"154","last_page":"159"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T11032","display_name":"VLSI and Analog Circuit Testing","score":1.0,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T11032","display_name":"VLSI and Analog Circuit Testing","score":1.0,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10472","display_name":"Semiconductor materials and devices","score":0.9994999766349792,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T14117","display_name":"Integrated Circuits and Semiconductor Failure Analysis","score":0.9993000030517578,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.7686499357223511},{"id":"https://openalex.org/keywords/embedded-system","display_name":"Embedded system","score":0.7082186937332153},{"id":"https://openalex.org/keywords/microprocessor","display_name":"Microprocessor","score":0.7063880562782288},{"id":"https://openalex.org/keywords/cache","display_name":"Cache","score":0.5742000937461853},{"id":"https://openalex.org/keywords/power","display_name":"Power (physics)","score":0.5525288581848145},{"id":"https://openalex.org/keywords/compiler","display_name":"Compiler","score":0.5446940064430237},{"id":"https://openalex.org/keywords/multi-core-processor","display_name":"Multi-core processor","score":0.5408859848976135},{"id":"https://openalex.org/keywords/reliability","display_name":"Reliability (semiconductor)","score":0.5080158710479736},{"id":"https://openalex.org/keywords/software","display_name":"Software","score":0.4871658980846405},{"id":"https://openalex.org/keywords/power-domains","display_name":"Power domains","score":0.455596923828125},{"id":"https://openalex.org/keywords/computer-hardware","display_name":"Computer hardware","score":0.33732718229293823},{"id":"https://openalex.org/keywords/operating-system","display_name":"Operating system","score":0.28420495986938477}],"concepts":[{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.7686499357223511},{"id":"https://openalex.org/C149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","level":1,"score":0.7082186937332153},{"id":"https://openalex.org/C2780728072","wikidata":"https://www.wikidata.org/wiki/Q5297","display_name":"Microprocessor","level":2,"score":0.7063880562782288},{"id":"https://openalex.org/C115537543","wikidata":"https://www.wikidata.org/wiki/Q165596","display_name":"Cache","level":2,"score":0.5742000937461853},{"id":"https://openalex.org/C163258240","wikidata":"https://www.wikidata.org/wiki/Q25342","display_name":"Power (physics)","level":2,"score":0.5525288581848145},{"id":"https://openalex.org/C169590947","wikidata":"https://www.wikidata.org/wiki/Q47506","display_name":"Compiler","level":2,"score":0.5446940064430237},{"id":"https://openalex.org/C78766204","wikidata":"https://www.wikidata.org/wiki/Q555032","display_name":"Multi-core processor","level":2,"score":0.5408859848976135},{"id":"https://openalex.org/C43214815","wikidata":"https://www.wikidata.org/wiki/Q7310987","display_name":"Reliability (semiconductor)","level":3,"score":0.5080158710479736},{"id":"https://openalex.org/C2777904410","wikidata":"https://www.wikidata.org/wiki/Q7397","display_name":"Software","level":2,"score":0.4871658980846405},{"id":"https://openalex.org/C16021271","wikidata":"https://www.wikidata.org/wiki/Q17152552","display_name":"Power domains","level":3,"score":0.455596923828125},{"id":"https://openalex.org/C9390403","wikidata":"https://www.wikidata.org/wiki/Q3966","display_name":"Computer hardware","level":1,"score":0.33732718229293823},{"id":"https://openalex.org/C111919701","wikidata":"https://www.wikidata.org/wiki/Q9135","display_name":"Operating system","level":1,"score":0.28420495986938477},{"id":"https://openalex.org/C121332964","wikidata":"https://www.wikidata.org/wiki/Q413","display_name":"Physics","level":0,"score":0.0},{"id":"https://openalex.org/C62520636","wikidata":"https://www.wikidata.org/wiki/Q944","display_name":"Quantum mechanics","level":1,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/iolts.2014.6873688","is_oa":false,"landing_page_url":"https://doi.org/10.1109/iolts.2014.6873688","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2014 IEEE 20th International On-Line Testing Symposium (IOLTS)","raw_type":"proceedings-article"}],"best_oa_location":null,"sustainable_development_goals":[{"score":0.7200000286102295,"id":"https://metadata.un.org/sdg/7","display_name":"Affordable and clean energy"}],"awards":[],"funders":[],"has_content":{"grobid_xml":false,"pdf":false},"content_urls":null,"referenced_works_count":23,"referenced_works":["https://openalex.org/W1769210942","https://openalex.org/W1891950198","https://openalex.org/W1965015817","https://openalex.org/W1968989269","https://openalex.org/W2006312753","https://openalex.org/W2084929123","https://openalex.org/W2092919507","https://openalex.org/W2103129423","https://openalex.org/W2104166947","https://openalex.org/W2111185506","https://openalex.org/W2115933959","https://openalex.org/W2119691242","https://openalex.org/W2129137078","https://openalex.org/W2143535677","https://openalex.org/W2147657366","https://openalex.org/W2152640154","https://openalex.org/W2154237597","https://openalex.org/W2156272194","https://openalex.org/W2162696040","https://openalex.org/W2165983700","https://openalex.org/W2170382128","https://openalex.org/W4230793013","https://openalex.org/W6651700774"],"related_works":["https://openalex.org/W2112096947","https://openalex.org/W2026133489","https://openalex.org/W2372170743","https://openalex.org/W2357882629","https://openalex.org/W2090061503","https://openalex.org/W2045015510","https://openalex.org/W1876288589","https://openalex.org/W2376871980","https://openalex.org/W1544050981","https://openalex.org/W2157865779"],"abstract_inverted_index":{"In":[0,103],"the":[1,6,10,20,51,110,123,153,166,187,193,200],"era":[2],"of":[3,109,126,155,168,195],"terascale":[4],"integration,":[5],"\u201creliability":[7],"wall\u201d":[8,12],"and":[9,78,86,130,149,180],"\u201cpower":[11,52],"arise":[13],"as":[14,93],"barriers":[15],"imposing":[16],"significant":[17,174],"challenges":[18],"to":[19,31,69,178,184],"microprocessor":[21],"industry.":[22],"Nowadays,":[23],"on-line":[24,82],"testing":[25,39],"is":[26,48,75,116,199],"essential":[27],"for":[28,81,186,207],"modern":[29],"microprocessors":[30],"detect":[32],"latent":[33],"defects":[34],"that":[35,96,152,203],"either":[36],"escaped":[37],"manufacturing":[38],"or":[40],"appear":[41],"during":[42],"system":[43],"operation.":[44],"Moreover,":[45],"many-core":[46],"scaling":[47],"now":[49,57],"facing":[50],"wall\u201d.":[53],"More":[54],"cores":[55],"can":[56,64,172],"be":[58,65],"placed":[59],"on":[60,147],"a":[61,76,106],"chip":[62],"than":[63],"concurrently":[66],"operating":[67],"due":[68],"energy/power":[70],"limitations.":[71],"Software-Based":[72],"Self-Test":[73,100],"(SBST)":[74],"flexible":[77],"low-cost":[79],"solution":[80],"March":[83,127,136],"test":[84,137],"application":[85,167],"defect":[87],"detection":[88],"in":[89,114,162,210],"small":[90],"memories,":[91],"such":[92],"L1":[94,208],"caches,":[95],"lack":[97],"Memory":[98],"Built-In":[99],"(MBIST)":[101],"hardware.":[102],"this":[104,198],"paper,":[105],"power-aware":[107,205],"optimization":[108],"SBST":[111,128,206],"methodology":[112],"introduced":[113,161],"[10]":[115,163],"presented":[117],"targeting":[118],"Ll":[119],"caches":[120,209],"by":[121],"analyzing":[122],"unique":[124],"characteristics":[125],"routines":[129],"possible":[131],"power":[132,170,175],"optimizations":[133,171],"without":[134],"sacrificing":[135],"quality.":[138],"Experimental":[139],"results":[140],"using":[141],"an":[142],"architectural-level-power":[143],"evaluation":[144],"framework":[145],"based":[146],"GEM5":[148],"McPAT":[150],"show":[151],"exploitation":[154],"Direct":[156],"Cache":[157],"Access":[158],"(DCA)":[159],"instructions":[160],"along":[164],"with":[165],"compiler-based":[169],"achieve":[173],"savings":[176,182],"up":[177,183],"82.27%":[179],"energy":[181],"84,89%":[185],"UltraSPARC":[188],"Tl":[189],"processor":[190],"core.":[191],"To":[192],"best":[194],"our":[196],"knowledge,":[197],"first":[201],"paper":[202],"addresses":[204],"microprocessors.":[211]},"counts_by_year":[{"year":2025,"cited_by_count":5},{"year":2024,"cited_by_count":4},{"year":2023,"cited_by_count":1},{"year":2019,"cited_by_count":1},{"year":2018,"cited_by_count":1},{"year":2016,"cited_by_count":2},{"year":2015,"cited_by_count":1}],"updated_date":"2025-11-06T03:46:38.306776","created_date":"2025-10-10T00:00:00"}