{"id":"https://openalex.org/W2021758419","doi":"https://doi.org/10.1109/iolts.2014.6873674","title":"A placement strategy for reducing the effects of multiple faults in digital circuits","display_name":"A placement strategy for reducing the effects of multiple faults in digital circuits","publication_year":2014,"publication_date":"2014-07-01","ids":{"openalex":"https://openalex.org/W2021758419","doi":"https://doi.org/10.1109/iolts.2014.6873674","mag":"2021758419"},"language":"en","primary_location":{"id":"doi:10.1109/iolts.2014.6873674","is_oa":false,"landing_page_url":"https://doi.org/10.1109/iolts.2014.6873674","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2014 IEEE 20th International On-Line Testing Symposium (IOLTS)","raw_type":"proceedings-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5060594809","display_name":"Samuel Pagliarini","orcid":"https://orcid.org/0000-0002-5294-0606"},"institutions":[{"id":"https://openalex.org/I36234482","display_name":"University of Bristol","ror":"https://ror.org/0524sp257","country_code":"GB","type":"education","lineage":["https://openalex.org/I36234482"]}],"countries":["GB"],"is_corresponding":false,"raw_author_name":"Samuel N. Pagliarini","raw_affiliation_strings":["Department of Computer Science, University of Bristol, Bristol, UK","Department of Computer Science University of Bristol  Bristol UK"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Department of Computer Science, University of Bristol, Bristol, UK","institution_ids":["https://openalex.org/I36234482"]},{"raw_affiliation_string":"Department of Computer Science University of Bristol  Bristol UK","institution_ids":["https://openalex.org/I36234482"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5113458314","display_name":"Dhiraj K. Pradhan","orcid":null},"institutions":[{"id":"https://openalex.org/I36234482","display_name":"University of Bristol","ror":"https://ror.org/0524sp257","country_code":"GB","type":"education","lineage":["https://openalex.org/I36234482"]}],"countries":["GB"],"is_corresponding":false,"raw_author_name":"Dhiraj Pradhan","raw_affiliation_strings":["Department of Computer Science, University of Bristol, Bristol, UK","Department of Computer Science University of Bristol  Bristol UK"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Department of Computer Science, University of Bristol, Bristol, UK","institution_ids":["https://openalex.org/I36234482"]},{"raw_affiliation_string":"Department of Computer Science University of Bristol  Bristol UK","institution_ids":["https://openalex.org/I36234482"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":2,"corresponding_author_ids":[],"corresponding_institution_ids":[],"apc_list":null,"apc_paid":null,"fwci":1.2604,"has_fulltext":false,"cited_by_count":10,"citation_normalized_percentile":{"value":0.79268605,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":{"min":90,"max":97},"biblio":{"volume":"220","issue":null,"first_page":"69","last_page":"74"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T11032","display_name":"VLSI and Analog Circuit Testing","score":1.0,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T11032","display_name":"VLSI and Analog Circuit Testing","score":1.0,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10363","display_name":"Low-power high-performance VLSI design","score":0.9998999834060669,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11005","display_name":"Radiation Effects in Electronics","score":0.9998999834060669,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.6782618165016174},{"id":"https://openalex.org/keywords/routing","display_name":"Routing (electronic design automation)","score":0.6136144399642944},{"id":"https://openalex.org/keywords/electronic-circuit","display_name":"Electronic circuit","score":0.5703972578048706},{"id":"https://openalex.org/keywords/digital-electronics","display_name":"Digital electronics","score":0.5592345595359802},{"id":"https://openalex.org/keywords/placement","display_name":"Placement","score":0.5192106366157532},{"id":"https://openalex.org/keywords/fault","display_name":"Fault (geology)","score":0.5091182589530945},{"id":"https://openalex.org/keywords/chip","display_name":"Chip","score":0.43377017974853516},{"id":"https://openalex.org/keywords/word-error-rate","display_name":"Word error rate","score":0.42605945467948914},{"id":"https://openalex.org/keywords/electronic-engineering","display_name":"Electronic engineering","score":0.3794783353805542},{"id":"https://openalex.org/keywords/computer-engineering","display_name":"Computer engineering","score":0.3511233329772949},{"id":"https://openalex.org/keywords/embedded-system","display_name":"Embedded system","score":0.261309415102005},{"id":"https://openalex.org/keywords/engineering","display_name":"Engineering","score":0.21038013696670532},{"id":"https://openalex.org/keywords/physical-design","display_name":"Physical design","score":0.19039276242256165},{"id":"https://openalex.org/keywords/circuit-design","display_name":"Circuit design","score":0.1437104344367981},{"id":"https://openalex.org/keywords/electrical-engineering","display_name":"Electrical engineering","score":0.11440667510032654},{"id":"https://openalex.org/keywords/telecommunications","display_name":"Telecommunications","score":0.08404800295829773}],"concepts":[{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.6782618165016174},{"id":"https://openalex.org/C74172769","wikidata":"https://www.wikidata.org/wiki/Q1446839","display_name":"Routing (electronic design automation)","level":2,"score":0.6136144399642944},{"id":"https://openalex.org/C134146338","wikidata":"https://www.wikidata.org/wiki/Q1815901","display_name":"Electronic circuit","level":2,"score":0.5703972578048706},{"id":"https://openalex.org/C81843906","wikidata":"https://www.wikidata.org/wiki/Q173156","display_name":"Digital electronics","level":3,"score":0.5592345595359802},{"id":"https://openalex.org/C117690923","wikidata":"https://www.wikidata.org/wiki/Q1484784","display_name":"Placement","level":4,"score":0.5192106366157532},{"id":"https://openalex.org/C175551986","wikidata":"https://www.wikidata.org/wiki/Q47089","display_name":"Fault (geology)","level":2,"score":0.5091182589530945},{"id":"https://openalex.org/C165005293","wikidata":"https://www.wikidata.org/wiki/Q1074500","display_name":"Chip","level":2,"score":0.43377017974853516},{"id":"https://openalex.org/C40969351","wikidata":"https://www.wikidata.org/wiki/Q3516228","display_name":"Word error rate","level":2,"score":0.42605945467948914},{"id":"https://openalex.org/C24326235","wikidata":"https://www.wikidata.org/wiki/Q126095","display_name":"Electronic engineering","level":1,"score":0.3794783353805542},{"id":"https://openalex.org/C113775141","wikidata":"https://www.wikidata.org/wiki/Q428691","display_name":"Computer engineering","level":1,"score":0.3511233329772949},{"id":"https://openalex.org/C149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","level":1,"score":0.261309415102005},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.21038013696670532},{"id":"https://openalex.org/C188817802","wikidata":"https://www.wikidata.org/wiki/Q13426855","display_name":"Physical design","level":3,"score":0.19039276242256165},{"id":"https://openalex.org/C190560348","wikidata":"https://www.wikidata.org/wiki/Q3245116","display_name":"Circuit design","level":2,"score":0.1437104344367981},{"id":"https://openalex.org/C119599485","wikidata":"https://www.wikidata.org/wiki/Q43035","display_name":"Electrical engineering","level":1,"score":0.11440667510032654},{"id":"https://openalex.org/C76155785","wikidata":"https://www.wikidata.org/wiki/Q418","display_name":"Telecommunications","level":1,"score":0.08404800295829773},{"id":"https://openalex.org/C28490314","wikidata":"https://www.wikidata.org/wiki/Q189436","display_name":"Speech recognition","level":1,"score":0.0},{"id":"https://openalex.org/C127313418","wikidata":"https://www.wikidata.org/wiki/Q1069","display_name":"Geology","level":0,"score":0.0},{"id":"https://openalex.org/C165205528","wikidata":"https://www.wikidata.org/wiki/Q83371","display_name":"Seismology","level":1,"score":0.0}],"mesh":[],"locations_count":2,"locations":[{"id":"doi:10.1109/iolts.2014.6873674","is_oa":false,"landing_page_url":"https://doi.org/10.1109/iolts.2014.6873674","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2014 IEEE 20th International On-Line Testing Symposium (IOLTS)","raw_type":"proceedings-article"},{"id":"pmh:oai:research-information.bris.ac.uk:openaire_cris_publications/b2ab4616-8b18-4b5c-8866-1757611e6ca7","is_oa":false,"landing_page_url":"https://research-information.bris.ac.uk/en/publications/b2ab4616-8b18-4b5c-8866-1757611e6ca7","pdf_url":null,"source":{"id":"https://openalex.org/S4306400895","display_name":"Bristol Research (University of Bristol)","issn_l":null,"issn":null,"is_oa":false,"is_in_doaj":false,"is_core":false,"host_organization":"https://openalex.org/I36234482","host_organization_name":"University of Bristol","host_organization_lineage":["https://openalex.org/I36234482"],"host_organization_lineage_names":[],"type":"repository"},"license":null,"license_id":null,"version":"submittedVersion","is_accepted":false,"is_published":false,"raw_source_name":"Pagliarini, S N & Pradhan, D 2014, A placement strategy for reducing the effects of multiple faults in digital circuits. in Proceedings of the 2014 IEEE 20th International On-Line Testing Symposium, IOLTS 2014., 6873674, IEEE Computer Society, pp. 69-74. https://doi.org/10.1109/IOLTS.2014.6873674","raw_type":"contributionToPeriodical"}],"best_oa_location":null,"sustainable_development_goals":[],"awards":[{"id":"https://openalex.org/G4481186863","display_name":null,"funder_award_id":"EP/G032904/1","funder_id":"https://openalex.org/F4320334627","funder_display_name":"Engineering and Physical Sciences Research Council"}],"funders":[{"id":"https://openalex.org/F4320320300","display_name":"European Commission","ror":"https://ror.org/00k4n6c32"},{"id":"https://openalex.org/F4320334627","display_name":"Engineering and Physical Sciences Research Council","ror":"https://ror.org/0439y7842"}],"has_content":{"pdf":false,"grobid_xml":false},"content_urls":null,"referenced_works_count":15,"referenced_works":["https://openalex.org/W1975625139","https://openalex.org/W1977649935","https://openalex.org/W2024060531","https://openalex.org/W2054806199","https://openalex.org/W2083664225","https://openalex.org/W2094042791","https://openalex.org/W2098426274","https://openalex.org/W2120985183","https://openalex.org/W2126693329","https://openalex.org/W2141068710","https://openalex.org/W2160451204","https://openalex.org/W2167950192","https://openalex.org/W3087305330","https://openalex.org/W6674301526","https://openalex.org/W6678797189"],"related_works":["https://openalex.org/W2101607241","https://openalex.org/W1981782019","https://openalex.org/W1909036071","https://openalex.org/W2115378302","https://openalex.org/W1559451661","https://openalex.org/W1693171640","https://openalex.org/W1994265547","https://openalex.org/W2155675690","https://openalex.org/W4206210640","https://openalex.org/W2098150764"],"abstract_inverted_index":{"This":[0],"paper":[1,31],"proposes":[2],"a":[3,14],"fault-aware":[4],"placement":[5,73],"strategy":[6,74],"for":[7],"digital":[8],"circuits.":[9],"Placement":[10],"algorithms":[11],"usually":[12],"have":[13],"goal":[15],"of":[16,37,64],"reducing":[17,34],"the":[18,26,35,58,71],"overall":[19,59],"chip":[20],"area":[21],"and":[22],"routing":[23],"wirelength":[24],"while":[25],"solution":[27],"proposed":[28,72],"in":[29,49,57],"this":[30],"focuses":[32],"on":[33],"effects":[36],"multiple":[38],"faults":[39],"caused":[40],"by":[41],"transients.":[42],"The":[43,62],"target":[44],"circuits":[45],"are":[46],"properly":[47],"analysed":[48],"order":[50],"to":[51],"identify":[52],"scenarios":[53,66],"that":[54,79],"promote":[55],"reductions":[56,83],"error":[60,81],"rate.":[61],"occurrence":[63],"these":[65],"is":[67,75],"then":[68],"maximised":[69],"when":[70],"executed.":[76],"Results":[77],"show":[78],"substantial":[80],"rate":[82],"can":[84],"be":[85],"achieved.":[86]},"counts_by_year":[{"year":2023,"cited_by_count":1},{"year":2021,"cited_by_count":2},{"year":2018,"cited_by_count":3},{"year":2017,"cited_by_count":1},{"year":2016,"cited_by_count":2},{"year":2015,"cited_by_count":1}],"updated_date":"2026-06-11T09:08:48.828518","created_date":"2025-10-10T00:00:00"}
