{"id":"https://openalex.org/W2049272650","doi":"https://doi.org/10.1109/infcom.2012.6195575","title":"Memory-efficient pattern matching architectures using perfect hashing on graphic processing units","display_name":"Memory-efficient pattern matching architectures using perfect hashing on graphic processing units","publication_year":2012,"publication_date":"2012-03-01","ids":{"openalex":"https://openalex.org/W2049272650","doi":"https://doi.org/10.1109/infcom.2012.6195575","mag":"2049272650"},"language":"en","primary_location":{"id":"doi:10.1109/infcom.2012.6195575","is_oa":false,"landing_page_url":"https://doi.org/10.1109/infcom.2012.6195575","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2012 Proceedings IEEE INFOCOM","raw_type":"proceedings-article"},"type":"conference-paper","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5011289357","display_name":"Cheng-Hung Lin","orcid":"https://orcid.org/0000-0003-0044-3840"},"institutions":[{"id":"https://openalex.org/I134161618","display_name":"National Taiwan Normal University","ror":"https://ror.org/059dkdx38","country_code":"TW","type":"education","lineage":["https://openalex.org/I134161618"]}],"countries":["TW"],"is_corresponding":false,"raw_author_name":"Cheng-Hung Lin","raw_affiliation_strings":["National Taiwan Normal University, Taipei, Taiwan","National Taiwan Normal University Taipei, Taiwan"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"National Taiwan Normal University, Taipei, Taiwan","institution_ids":["https://openalex.org/I134161618"]},{"raw_affiliation_string":"National Taiwan Normal University Taipei, Taiwan","institution_ids":["https://openalex.org/I134161618"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5065408419","display_name":"Chen-Hsiung Liu","orcid":null},"institutions":[{"id":"https://openalex.org/I25846049","display_name":"National Tsing Hua University","ror":"https://ror.org/00zdnkx70","country_code":"TW","type":"education","lineage":["https://openalex.org/I25846049"]}],"countries":["TW"],"is_corresponding":false,"raw_author_name":"Chen-Hsiung Liu","raw_affiliation_strings":["Department of Computer Science, National Tsing Hua University, Hsinchu, Taiwan","Department of Computer Science, National Tsing Hua University, Hsinchu, Taiwan#TAB#"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Department of Computer Science, National Tsing Hua University, Hsinchu, Taiwan","institution_ids":["https://openalex.org/I25846049"]},{"raw_affiliation_string":"Department of Computer Science, National Tsing Hua University, Hsinchu, Taiwan#TAB#","institution_ids":["https://openalex.org/I25846049"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5102148020","display_name":"Shih-Chieh Chang","orcid":null},"institutions":[{"id":"https://openalex.org/I25846049","display_name":"National Tsing Hua University","ror":"https://ror.org/00zdnkx70","country_code":"TW","type":"education","lineage":["https://openalex.org/I25846049"]}],"countries":["TW"],"is_corresponding":false,"raw_author_name":"Shih-Chieh Chang","raw_affiliation_strings":["Department of Computer Science, National Tsing Hua University, Hsinchu, Taiwan","Department of Computer Science, National Tsing Hua University, Hsinchu, Taiwan#TAB#"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Department of Computer Science, National Tsing Hua University, Hsinchu, Taiwan","institution_ids":["https://openalex.org/I25846049"]},{"raw_affiliation_string":"Department of Computer Science, National Tsing Hua University, Hsinchu, Taiwan#TAB#","institution_ids":["https://openalex.org/I25846049"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5013112058","display_name":"Wing-Kai Hon","orcid":"https://orcid.org/0000-0002-0570-2904"},"institutions":[{"id":"https://openalex.org/I25846049","display_name":"National Tsing Hua University","ror":"https://ror.org/00zdnkx70","country_code":"TW","type":"education","lineage":["https://openalex.org/I25846049"]}],"countries":["TW"],"is_corresponding":false,"raw_author_name":"Wing-Kai Hon","raw_affiliation_strings":["Department of Computer Science, National Tsing Hua University, Hsinchu, Taiwan","Department of Computer Science, National Tsing Hua University, Hsinchu, Taiwan#TAB#"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Department of Computer Science, National Tsing Hua University, Hsinchu, Taiwan","institution_ids":["https://openalex.org/I25846049"]},{"raw_affiliation_string":"Department of Computer Science, National Tsing Hua University, Hsinchu, Taiwan#TAB#","institution_ids":["https://openalex.org/I25846049"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":2,"corresponding_author_ids":[],"corresponding_institution_ids":[],"apc_list":null,"apc_paid":null,"fwci":1.3239,"has_fulltext":false,"cited_by_count":16,"citation_normalized_percentile":{"value":0.78679716,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":{"min":90,"max":97},"biblio":{"volume":null,"issue":null,"first_page":"1978","last_page":"1986"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T12326","display_name":"Network Packet Processing and Optimization","score":0.9998999834060669,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T12326","display_name":"Network Packet Processing and Optimization","score":0.9998999834060669,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10400","display_name":"Network Security and Intrusion Detection","score":0.9984999895095825,"subfield":{"id":"https://openalex.org/subfields/1705","display_name":"Computer Networks and Communications"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11269","display_name":"Algorithms and Data Compression","score":0.9908000230789185,"subfield":{"id":"https://openalex.org/subfields/1702","display_name":"Artificial Intelligence"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.8498255610466003},{"id":"https://openalex.org/keywords/interleaved-memory","display_name":"Interleaved memory","score":0.7038578987121582},{"id":"https://openalex.org/keywords/flat-memory-model","display_name":"Flat memory model","score":0.6636463403701782},{"id":"https://openalex.org/keywords/memory-map","display_name":"Memory map","score":0.6290839314460754},{"id":"https://openalex.org/keywords/uniform-memory-access","display_name":"Uniform memory access","score":0.6280806660652161},{"id":"https://openalex.org/keywords/registered-memory","display_name":"Registered memory","score":0.5925931334495544},{"id":"https://openalex.org/keywords/memory-architecture","display_name":"Memory architecture","score":0.5397101640701294},{"id":"https://openalex.org/keywords/memory-management","display_name":"Memory management","score":0.5375840663909912},{"id":"https://openalex.org/keywords/parallel-computing","display_name":"Parallel computing","score":0.5294473171234131},{"id":"https://openalex.org/keywords/scalability","display_name":"Scalability","score":0.5186466574668884},{"id":"https://openalex.org/keywords/deep-packet-inspection","display_name":"Deep packet inspection","score":0.5101768970489502},{"id":"https://openalex.org/keywords/cache-only-memory-architecture","display_name":"Cache-only memory architecture","score":0.442507803440094},{"id":"https://openalex.org/keywords/hash-function","display_name":"Hash function","score":0.44219470024108887},{"id":"https://openalex.org/keywords/extended-memory","display_name":"Extended memory","score":0.4153990149497986},{"id":"https://openalex.org/keywords/intrusion-detection-system","display_name":"Intrusion detection system","score":0.41330233216285706},{"id":"https://openalex.org/keywords/network-packet","display_name":"Network packet","score":0.4082396626472473},{"id":"https://openalex.org/keywords/semiconductor-memory","display_name":"Semiconductor memory","score":0.3197062611579895},{"id":"https://openalex.org/keywords/computer-hardware","display_name":"Computer hardware","score":0.2944304943084717},{"id":"https://openalex.org/keywords/shared-memory","display_name":"Shared memory","score":0.27380871772766113},{"id":"https://openalex.org/keywords/computer-network","display_name":"Computer network","score":0.16335561871528625},{"id":"https://openalex.org/keywords/operating-system","display_name":"Operating system","score":0.15573811531066895}],"concepts":[{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.8498255610466003},{"id":"https://openalex.org/C63511323","wikidata":"https://www.wikidata.org/wiki/Q908936","display_name":"Interleaved memory","level":4,"score":0.7038578987121582},{"id":"https://openalex.org/C57863822","wikidata":"https://www.wikidata.org/wiki/Q905488","display_name":"Flat memory model","level":4,"score":0.6636463403701782},{"id":"https://openalex.org/C74426580","wikidata":"https://www.wikidata.org/wiki/Q719484","display_name":"Memory map","level":3,"score":0.6290839314460754},{"id":"https://openalex.org/C51290061","wikidata":"https://www.wikidata.org/wiki/Q1936765","display_name":"Uniform memory access","level":4,"score":0.6280806660652161},{"id":"https://openalex.org/C93446704","wikidata":"https://www.wikidata.org/wiki/Q449328","display_name":"Registered memory","level":3,"score":0.5925931334495544},{"id":"https://openalex.org/C2779602883","wikidata":"https://www.wikidata.org/wiki/Q15544750","display_name":"Memory architecture","level":2,"score":0.5397101640701294},{"id":"https://openalex.org/C176649486","wikidata":"https://www.wikidata.org/wiki/Q2308807","display_name":"Memory management","level":3,"score":0.5375840663909912},{"id":"https://openalex.org/C173608175","wikidata":"https://www.wikidata.org/wiki/Q232661","display_name":"Parallel computing","level":1,"score":0.5294473171234131},{"id":"https://openalex.org/C48044578","wikidata":"https://www.wikidata.org/wiki/Q727490","display_name":"Scalability","level":2,"score":0.5186466574668884},{"id":"https://openalex.org/C204679922","wikidata":"https://www.wikidata.org/wiki/Q734252","display_name":"Deep packet inspection","level":3,"score":0.5101768970489502},{"id":"https://openalex.org/C3720319","wikidata":"https://www.wikidata.org/wiki/Q5015937","display_name":"Cache-only memory architecture","level":5,"score":0.442507803440094},{"id":"https://openalex.org/C99138194","wikidata":"https://www.wikidata.org/wiki/Q183427","display_name":"Hash function","level":2,"score":0.44219470024108887},{"id":"https://openalex.org/C171675096","wikidata":"https://www.wikidata.org/wiki/Q1143380","display_name":"Extended memory","level":4,"score":0.4153990149497986},{"id":"https://openalex.org/C35525427","wikidata":"https://www.wikidata.org/wiki/Q745881","display_name":"Intrusion detection system","level":2,"score":0.41330233216285706},{"id":"https://openalex.org/C158379750","wikidata":"https://www.wikidata.org/wiki/Q214111","display_name":"Network packet","level":2,"score":0.4082396626472473},{"id":"https://openalex.org/C98986596","wikidata":"https://www.wikidata.org/wiki/Q1143031","display_name":"Semiconductor memory","level":2,"score":0.3197062611579895},{"id":"https://openalex.org/C9390403","wikidata":"https://www.wikidata.org/wiki/Q3966","display_name":"Computer hardware","level":1,"score":0.2944304943084717},{"id":"https://openalex.org/C133875982","wikidata":"https://www.wikidata.org/wiki/Q764810","display_name":"Shared memory","level":2,"score":0.27380871772766113},{"id":"https://openalex.org/C31258907","wikidata":"https://www.wikidata.org/wiki/Q1301371","display_name":"Computer network","level":1,"score":0.16335561871528625},{"id":"https://openalex.org/C111919701","wikidata":"https://www.wikidata.org/wiki/Q9135","display_name":"Operating system","level":1,"score":0.15573811531066895},{"id":"https://openalex.org/C124101348","wikidata":"https://www.wikidata.org/wiki/Q172491","display_name":"Data mining","level":1,"score":0.0},{"id":"https://openalex.org/C38652104","wikidata":"https://www.wikidata.org/wiki/Q3510521","display_name":"Computer security","level":1,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/infcom.2012.6195575","is_oa":false,"landing_page_url":"https://doi.org/10.1109/infcom.2012.6195575","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2012 Proceedings IEEE INFOCOM","raw_type":"proceedings-article"}],"best_oa_location":null,"sustainable_development_goals":[],"awards":[],"funders":[],"has_content":{"grobid_xml":false,"pdf":false},"content_urls":null,"referenced_works_count":19,"referenced_works":["https://openalex.org/W1552569371","https://openalex.org/W1674877186","https://openalex.org/W1834037038","https://openalex.org/W2051049045","https://openalex.org/W2096474000","https://openalex.org/W2099964107","https://openalex.org/W2102978741","https://openalex.org/W2106062486","https://openalex.org/W2108522784","https://openalex.org/W2134684274","https://openalex.org/W2150210843","https://openalex.org/W2168707717","https://openalex.org/W2270296902","https://openalex.org/W4242309756","https://openalex.org/W4247093768","https://openalex.org/W6633336852","https://openalex.org/W6637096788","https://openalex.org/W6674967098","https://openalex.org/W6676122042"],"related_works":["https://openalex.org/W3048967625","https://openalex.org/W2587873888","https://openalex.org/W2565280077","https://openalex.org/W4243576563","https://openalex.org/W4321458411","https://openalex.org/W1575240748","https://openalex.org/W2047684617","https://openalex.org/W2168550483","https://openalex.org/W4389371524","https://openalex.org/W2766165550"],"abstract_inverted_index":{"Memory":[0,21],"architectures":[1,22,102,128,132],"have":[2,98],"been":[3],"widely":[4],"adopted":[5],"in":[6,39,87],"network":[7],"intrusion":[8],"detection":[9],"system":[10],"for":[11,55],"inspecting":[12],"malicious":[13],"packets":[14,117],"due":[15],"to":[16,70,84,91],"their":[17],"flexibility":[18],"and":[19,107,115,136],"scalability.":[20],"match":[23],"input":[24,116],"streams":[25],"against":[26],"thousands":[27],"of":[28,46],"attack":[29,47,110],"patterns":[30,111],"by":[31],"traversing":[32],"the":[33,43,92,125],"corresponding":[34],"state":[35,72],"transition":[36,73],"table":[37],"stored":[38],"commodity":[40],"memories.":[41],"With":[42],"increasing":[44],"number":[45],"patterns,":[48],"reducing":[49],"memory":[50,56,65,80,88,95,101,127,131,137],"requirement":[51],"has":[52],"become":[53],"critical":[54],"architectures.":[57],"In":[58],"this":[59],"paper,":[60],"we":[61],"propose":[62],"a":[63],"novel":[64],"architecture":[66,81],"using":[67,109],"perfect":[68],"hashing":[69],"condense":[71],"tables":[74],"without":[75],"hash":[76],"collisions.":[77],"The":[78,120],"proposed":[79,126],"achieves":[82],"up":[83],"99.5%":[85],"improvement":[86],"reduction":[89],"compared":[90],"traditional":[93],"two-dimensional":[94],"architecture.":[96],"We":[97],"implemented":[99],"our":[100],"on":[103,134],"graphic":[104],"processing":[105],"units":[106],"tested":[108],"from":[112],"Snort":[113],"V2.8":[114],"form":[118],"DEFCON.":[119],"experimental":[121],"results":[122],"show":[123],"that":[124],"outperform":[129],"state-of-the-art":[130],"both":[133],"performance":[135],"efficiency.":[138]},"counts_by_year":[{"year":2024,"cited_by_count":1},{"year":2022,"cited_by_count":2},{"year":2018,"cited_by_count":1},{"year":2017,"cited_by_count":2},{"year":2016,"cited_by_count":2},{"year":2015,"cited_by_count":2},{"year":2014,"cited_by_count":2},{"year":2013,"cited_by_count":3}],"updated_date":"2026-07-29T14:22:42.915294","created_date":"2025-10-10T00:00:00"}
