{"id":"https://openalex.org/W2893773143","doi":"https://doi.org/10.1109/indin.2018.8472097","title":"Heapless: Dynamic Data Structures without Dynamic Heap Allocator for Rust","display_name":"Heapless: Dynamic Data Structures without Dynamic Heap Allocator for Rust","publication_year":2018,"publication_date":"2018-07-01","ids":{"openalex":"https://openalex.org/W2893773143","doi":"https://doi.org/10.1109/indin.2018.8472097","mag":"2893773143"},"language":"en","primary_location":{"id":"doi:10.1109/indin.2018.8472097","is_oa":false,"landing_page_url":"https://doi.org/10.1109/indin.2018.8472097","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2018 IEEE 16th International Conference on Industrial Informatics (INDIN)","raw_type":"proceedings-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5061103513","display_name":"Jorge Aparicio Rivera","orcid":null},"institutions":[{"id":"https://openalex.org/I190632392","display_name":"Lule\u00e5 University of Technology","ror":"https://ror.org/016st3p78","country_code":"SE","type":"education","lineage":["https://openalex.org/I190632392"]}],"countries":["SE"],"is_corresponding":true,"raw_author_name":"Jorge Aparicio Rivera","raw_affiliation_strings":["Lule\u00e5 University of Technology"],"affiliations":[{"raw_affiliation_string":"Lule\u00e5 University of Technology","institution_ids":["https://openalex.org/I190632392"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5063221770","display_name":"Marcus Lindner","orcid":null},"institutions":[{"id":"https://openalex.org/I190632392","display_name":"Lule\u00e5 University of Technology","ror":"https://ror.org/016st3p78","country_code":"SE","type":"education","lineage":["https://openalex.org/I190632392"]}],"countries":["SE"],"is_corresponding":false,"raw_author_name":"Marcus Lindner","raw_affiliation_strings":["Lule\u00e5 University of Technology"],"affiliations":[{"raw_affiliation_string":"Lule\u00e5 University of Technology","institution_ids":["https://openalex.org/I190632392"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5009216509","display_name":"Per Lindgren","orcid":"https://orcid.org/0000-0001-6440-8900"},"institutions":[{"id":"https://openalex.org/I190632392","display_name":"Lule\u00e5 University of Technology","ror":"https://ror.org/016st3p78","country_code":"SE","type":"education","lineage":["https://openalex.org/I190632392"]}],"countries":["SE"],"is_corresponding":false,"raw_author_name":"Per Lindgren","raw_affiliation_strings":["Lule\u00e5 University of Technology"],"affiliations":[{"raw_affiliation_string":"Lule\u00e5 University of Technology","institution_ids":["https://openalex.org/I190632392"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":3,"corresponding_author_ids":["https://openalex.org/A5061103513"],"corresponding_institution_ids":["https://openalex.org/I190632392"],"apc_list":null,"apc_paid":null,"fwci":0.1845,"has_fulltext":false,"cited_by_count":3,"citation_normalized_percentile":{"value":0.5571853,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":{"min":90,"max":95},"biblio":{"volume":null,"issue":null,"first_page":"87","last_page":"94"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10772","display_name":"Distributed systems and fault tolerance","score":0.9995999932289124,"subfield":{"id":"https://openalex.org/subfields/1705","display_name":"Computer Networks and Communications"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10772","display_name":"Distributed systems and fault tolerance","score":0.9995999932289124,"subfield":{"id":"https://openalex.org/subfields/1705","display_name":"Computer Networks and Communications"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10054","display_name":"Parallel Computing and Optimization Techniques","score":0.9991999864578247,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11424","display_name":"Security and Verification in Computing","score":0.9987000226974487,"subfield":{"id":"https://openalex.org/subfields/1702","display_name":"Artificial Intelligence"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.8145685195922852},{"id":"https://openalex.org/keywords/allocator","display_name":"Allocator","score":0.6515451669692993},{"id":"https://openalex.org/keywords/heap","display_name":"Heap (data structure)","score":0.6430103778839111},{"id":"https://openalex.org/keywords/memory-safety","display_name":"Memory safety","score":0.5959725379943848},{"id":"https://openalex.org/keywords/serialization","display_name":"Serialization","score":0.5913830995559692},{"id":"https://openalex.org/keywords/c-dynamic-memory-allocation","display_name":"C dynamic memory allocation","score":0.5680040121078491},{"id":"https://openalex.org/keywords/data-structure","display_name":"Data structure","score":0.5451896786689758},{"id":"https://openalex.org/keywords/dynamic-random-access-memory","display_name":"Dynamic random-access memory","score":0.5232462286949158},{"id":"https://openalex.org/keywords/dynamic-data","display_name":"Dynamic data","score":0.5040532350540161},{"id":"https://openalex.org/keywords/multithreading","display_name":"Multithreading","score":0.49649959802627563},{"id":"https://openalex.org/keywords/embedded-system","display_name":"Embedded system","score":0.4716182053089142},{"id":"https://openalex.org/keywords/distributed-computing","display_name":"Distributed computing","score":0.4245131015777588},{"id":"https://openalex.org/keywords/implementation","display_name":"Implementation","score":0.4231816828250885},{"id":"https://openalex.org/keywords/rust","display_name":"Rust (programming language)","score":0.4198797643184662},{"id":"https://openalex.org/keywords/memory-management","display_name":"Memory management","score":0.3701491355895996},{"id":"https://openalex.org/keywords/operating-system","display_name":"Operating system","score":0.33733847737312317},{"id":"https://openalex.org/keywords/thread","display_name":"Thread (computing)","score":0.2841963768005371},{"id":"https://openalex.org/keywords/database","display_name":"Database","score":0.16080814599990845},{"id":"https://openalex.org/keywords/programming-language","display_name":"Programming language","score":0.09966087341308594}],"concepts":[{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.8145685195922852},{"id":"https://openalex.org/C162262903","wikidata":"https://www.wikidata.org/wiki/Q343527","display_name":"Allocator","level":2,"score":0.6515451669692993},{"id":"https://openalex.org/C134757568","wikidata":"https://www.wikidata.org/wiki/Q274089","display_name":"Heap (data structure)","level":2,"score":0.6430103778839111},{"id":"https://openalex.org/C28180684","wikidata":"https://www.wikidata.org/wiki/Q4080983","display_name":"Memory safety","level":3,"score":0.5959725379943848},{"id":"https://openalex.org/C52723943","wikidata":"https://www.wikidata.org/wiki/Q1127410","display_name":"Serialization","level":2,"score":0.5913830995559692},{"id":"https://openalex.org/C34339311","wikidata":"https://www.wikidata.org/wiki/Q1050390","display_name":"C dynamic memory allocation","level":4,"score":0.5680040121078491},{"id":"https://openalex.org/C162319229","wikidata":"https://www.wikidata.org/wiki/Q175263","display_name":"Data structure","level":2,"score":0.5451896786689758},{"id":"https://openalex.org/C118702147","wikidata":"https://www.wikidata.org/wiki/Q189396","display_name":"Dynamic random-access memory","level":3,"score":0.5232462286949158},{"id":"https://openalex.org/C197298091","wikidata":"https://www.wikidata.org/wiki/Q5318963","display_name":"Dynamic data","level":2,"score":0.5040532350540161},{"id":"https://openalex.org/C201410400","wikidata":"https://www.wikidata.org/wiki/Q1064412","display_name":"Multithreading","level":3,"score":0.49649959802627563},{"id":"https://openalex.org/C149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","level":1,"score":0.4716182053089142},{"id":"https://openalex.org/C120314980","wikidata":"https://www.wikidata.org/wiki/Q180634","display_name":"Distributed computing","level":1,"score":0.4245131015777588},{"id":"https://openalex.org/C26713055","wikidata":"https://www.wikidata.org/wiki/Q245962","display_name":"Implementation","level":2,"score":0.4231816828250885},{"id":"https://openalex.org/C197781089","wikidata":"https://www.wikidata.org/wiki/Q575650","display_name":"Rust (programming language)","level":2,"score":0.4198797643184662},{"id":"https://openalex.org/C176649486","wikidata":"https://www.wikidata.org/wiki/Q2308807","display_name":"Memory management","level":3,"score":0.3701491355895996},{"id":"https://openalex.org/C111919701","wikidata":"https://www.wikidata.org/wiki/Q9135","display_name":"Operating system","level":1,"score":0.33733847737312317},{"id":"https://openalex.org/C138101251","wikidata":"https://www.wikidata.org/wiki/Q213092","display_name":"Thread (computing)","level":2,"score":0.2841963768005371},{"id":"https://openalex.org/C77088390","wikidata":"https://www.wikidata.org/wiki/Q8513","display_name":"Database","level":1,"score":0.16080814599990845},{"id":"https://openalex.org/C199360897","wikidata":"https://www.wikidata.org/wiki/Q9143","display_name":"Programming language","level":1,"score":0.09966087341308594},{"id":"https://openalex.org/C98986596","wikidata":"https://www.wikidata.org/wiki/Q1143031","display_name":"Semiconductor memory","level":2,"score":0.0},{"id":"https://openalex.org/C136085584","wikidata":"https://www.wikidata.org/wiki/Q910289","display_name":"Overlay","level":2,"score":0.0},{"id":"https://openalex.org/C2777904410","wikidata":"https://www.wikidata.org/wiki/Q7397","display_name":"Software","level":2,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/indin.2018.8472097","is_oa":false,"landing_page_url":"https://doi.org/10.1109/indin.2018.8472097","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2018 IEEE 16th International Conference on Industrial Informatics (INDIN)","raw_type":"proceedings-article"}],"best_oa_location":null,"sustainable_development_goals":[],"awards":[],"funders":[],"has_content":{"pdf":false,"grobid_xml":false},"content_urls":null,"referenced_works_count":9,"referenced_works":["https://openalex.org/W2013892605","https://openalex.org/W2086070079","https://openalex.org/W2124279666","https://openalex.org/W2167102554","https://openalex.org/W2779850521","https://openalex.org/W2894135852","https://openalex.org/W4235063114","https://openalex.org/W4241006348","https://openalex.org/W6747263394"],"related_works":["https://openalex.org/W2167102554","https://openalex.org/W4252124899","https://openalex.org/W2584932762","https://openalex.org/W2146707680","https://openalex.org/W3022541129","https://openalex.org/W1990421520","https://openalex.org/W4200396687","https://openalex.org/W3008864649","https://openalex.org/W1826158585","https://openalex.org/W2182829270"],"abstract_inverted_index":{"Dynamic":[0],"memory":[1,9,35,107,117],"management":[2],"is":[3],"typically":[4],"implemented":[5],"using":[6],"a":[7,21,41,183],"global":[8,64],"allocator,":[10],"which":[11],"may":[12],"negatively":[13],"impact":[14],"the":[15,77,111,137],"performance,":[16,147,174],"reliability,":[17],"and":[18,50,73,98,126,144,175,186],"predictability":[19],"of":[20,43,63,89,113,130,177],"program;":[22],"in":[23,155],"effect":[24],"standards":[25],"around":[26],"safety-critical":[27],"applications":[28],"often":[29],"discourage":[30],"or":[31,58],"even":[32],"disallow":[33],"dynamic":[34,44],"management.":[36],"This":[37],"paper":[38],"presents":[39],"heapless,":[40],"collection":[42],"data":[45,69,139,159],"structures":[46,70,140,160],"(for":[47],"vectors,":[48],"strings,":[49],"circular":[51,93],"buffers)":[52],"that":[53,136],"can":[54],"be":[55],"either":[56],"stack":[57],"statically":[59],"allocated,":[60],"thus":[61,148],"free":[62],"allocator":[65],"dependencies.":[66],"The":[67,105,172],"proposed":[68],"for":[71,150,189],"vectors":[72],"strings":[74],"closely":[75],"mimic":[76],"Rust":[78,106],"standard":[79],"library":[80,188],"implementations":[81],"while":[82],"adding":[83],"support":[84],"to":[85,165,169],"gracefully":[86],"handling":[87],"cases":[88],"capacity":[90],"exceedance.":[91],"Our":[92],"buffers":[94],"act":[95],"as":[96],"queues":[97],"allowing":[99,163],"channel":[100],"like":[101],"usage":[102],"(by":[103],"splitting).":[104],"model":[108],"together":[109],"with":[110],"ability":[112],"local":[114],"reasoning":[115],"on":[116],"requirements":[118],"(brought":[119],"by":[120,181],"heapless)":[121],"facilitates":[122],"establishing":[123],"robustness/safety":[124],"guarantees":[125],"minimize":[127],"attack":[128],"surfaces":[129],"(industrial)":[131],"IoT":[132,194],"systems.":[133],"We":[134],"show":[135],"heapless":[138,158,178],"are":[141,161,179],"highly":[142],"efficient":[143],"have":[145],"predictable":[146],"suitable":[149],"hard":[151],"real-time":[152],"applications.":[153],"Moreover,":[154],"our":[156],"implementation":[157],"non-relocatable":[162],"mapping":[164],"hardware,":[166],"useful,":[167],"e.g.,":[168],"DMA":[170],"transfers.":[171],"feasibility,":[173],"advantages":[176],"demonstrated":[180],"implementing":[182],"JSON":[184],"serialization":[185],"de-serialization":[187],"an":[190],"ARM":[191],"Cortex-M":[192],"based":[193],"platform.":[195]},"counts_by_year":[{"year":2025,"cited_by_count":1},{"year":2024,"cited_by_count":1},{"year":2019,"cited_by_count":1}],"updated_date":"2025-11-25T21:42:39.735039","created_date":"2025-10-10T00:00:00"}