{"id":"https://openalex.org/W1664525523","doi":"https://doi.org/10.1109/ijcnn.2015.7280700","title":"A modular mixed-signal CVNS neural network architecture","display_name":"A modular mixed-signal CVNS neural network architecture","publication_year":2015,"publication_date":"2015-07-01","ids":{"openalex":"https://openalex.org/W1664525523","doi":"https://doi.org/10.1109/ijcnn.2015.7280700","mag":"1664525523"},"language":"en","primary_location":{"id":"doi:10.1109/ijcnn.2015.7280700","is_oa":false,"landing_page_url":"https://doi.org/10.1109/ijcnn.2015.7280700","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2015 International Joint Conference on Neural Networks (IJCNN)","raw_type":"proceedings-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5006811736","display_name":"Farinoush Saffar","orcid":null},"institutions":[{"id":"https://openalex.org/I74413500","display_name":"University of Windsor","ror":"https://ror.org/01gw3d370","country_code":"CA","type":"education","lineage":["https://openalex.org/I74413500"]}],"countries":["CA"],"is_corresponding":true,"raw_author_name":"Farinoush Saffar","raw_affiliation_strings":["Department of Electrical and Computer Engineering, University of Windsor, Windsor, ON","[Department of Electrical and Computer Engineering, University of Windsor, ON, Canada.]"],"affiliations":[{"raw_affiliation_string":"Department of Electrical and Computer Engineering, University of Windsor, Windsor, ON","institution_ids":["https://openalex.org/I74413500"]},{"raw_affiliation_string":"[Department of Electrical and Computer Engineering, University of Windsor, ON, Canada.]","institution_ids":["https://openalex.org/I74413500"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5042170452","display_name":"Mitra Mirhassani","orcid":"https://orcid.org/0000-0001-8512-6427"},"institutions":[{"id":"https://openalex.org/I74413500","display_name":"University of Windsor","ror":"https://ror.org/01gw3d370","country_code":"CA","type":"education","lineage":["https://openalex.org/I74413500"]}],"countries":["CA"],"is_corresponding":false,"raw_author_name":"Mitra Mirhassani","raw_affiliation_strings":["Department of Electrical and Computer Engineering, University of Windsor, Windsor, ON","[Department of Electrical and Computer Engineering, University of Windsor, ON, Canada.]"],"affiliations":[{"raw_affiliation_string":"Department of Electrical and Computer Engineering, University of Windsor, Windsor, ON","institution_ids":["https://openalex.org/I74413500"]},{"raw_affiliation_string":"[Department of Electrical and Computer Engineering, University of Windsor, ON, Canada.]","institution_ids":["https://openalex.org/I74413500"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5035412745","display_name":"Majid Ahmadi","orcid":"https://orcid.org/0000-0001-5781-6754"},"institutions":[{"id":"https://openalex.org/I74413500","display_name":"University of Windsor","ror":"https://ror.org/01gw3d370","country_code":"CA","type":"education","lineage":["https://openalex.org/I74413500"]}],"countries":["CA"],"is_corresponding":false,"raw_author_name":"Majid Ahmadi","raw_affiliation_strings":["Department of Electrical and Computer Engineering, University of Windsor, Windsor, ON","[Department of Electrical and Computer Engineering, University of Windsor, ON, Canada.]"],"affiliations":[{"raw_affiliation_string":"Department of Electrical and Computer Engineering, University of Windsor, Windsor, ON","institution_ids":["https://openalex.org/I74413500"]},{"raw_affiliation_string":"[Department of Electrical and Computer Engineering, University of Windsor, ON, Canada.]","institution_ids":["https://openalex.org/I74413500"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":3,"corresponding_author_ids":["https://openalex.org/A5006811736"],"corresponding_institution_ids":["https://openalex.org/I74413500"],"apc_list":null,"apc_paid":null,"fwci":0.0,"has_fulltext":false,"cited_by_count":0,"citation_normalized_percentile":{"value":0.0359167,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":null,"biblio":{"volume":"147","issue":null,"first_page":"1","last_page":"6"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T11697","display_name":"Numerical Methods and Algorithms","score":0.9980999827384949,"subfield":{"id":"https://openalex.org/subfields/1703","display_name":"Computational Theory and Mathematics"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T11697","display_name":"Numerical Methods and Algorithms","score":0.9980999827384949,"subfield":{"id":"https://openalex.org/subfields/1703","display_name":"Computational Theory and Mathematics"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10323","display_name":"Analog and Mixed-Signal Circuit Design","score":0.9976000189781189,"subfield":{"id":"https://openalex.org/subfields/2204","display_name":"Biomedical Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10320","display_name":"Neural Networks and Applications","score":0.9969000220298767,"subfield":{"id":"https://openalex.org/subfields/1702","display_name":"Artificial Intelligence"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.6894222497940063},{"id":"https://openalex.org/keywords/modular-design","display_name":"Modular design","score":0.6816998720169067},{"id":"https://openalex.org/keywords/artificial-neural-network","display_name":"Artificial neural network","score":0.5606064796447754},{"id":"https://openalex.org/keywords/network-architecture","display_name":"Network architecture","score":0.47454604506492615},{"id":"https://openalex.org/keywords/synaptic-weight","display_name":"Synaptic weight","score":0.4534606337547302},{"id":"https://openalex.org/keywords/flexibility","display_name":"Flexibility (engineering)","score":0.444845974445343},{"id":"https://openalex.org/keywords/chip","display_name":"Chip","score":0.4201599359512329},{"id":"https://openalex.org/keywords/electronic-engineering","display_name":"Electronic engineering","score":0.38023045659065247},{"id":"https://openalex.org/keywords/computer-hardware","display_name":"Computer hardware","score":0.35774457454681396},{"id":"https://openalex.org/keywords/engineering","display_name":"Engineering","score":0.14683747291564941},{"id":"https://openalex.org/keywords/artificial-intelligence","display_name":"Artificial intelligence","score":0.12515848875045776},{"id":"https://openalex.org/keywords/mathematics","display_name":"Mathematics","score":0.12008035182952881},{"id":"https://openalex.org/keywords/computer-network","display_name":"Computer network","score":0.11292335391044617}],"concepts":[{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.6894222497940063},{"id":"https://openalex.org/C101468663","wikidata":"https://www.wikidata.org/wiki/Q1620158","display_name":"Modular design","level":2,"score":0.6816998720169067},{"id":"https://openalex.org/C50644808","wikidata":"https://www.wikidata.org/wiki/Q192776","display_name":"Artificial neural network","level":2,"score":0.5606064796447754},{"id":"https://openalex.org/C193415008","wikidata":"https://www.wikidata.org/wiki/Q639681","display_name":"Network architecture","level":2,"score":0.47454604506492615},{"id":"https://openalex.org/C66949984","wikidata":"https://www.wikidata.org/wiki/Q7662043","display_name":"Synaptic weight","level":3,"score":0.4534606337547302},{"id":"https://openalex.org/C2780598303","wikidata":"https://www.wikidata.org/wiki/Q65921492","display_name":"Flexibility (engineering)","level":2,"score":0.444845974445343},{"id":"https://openalex.org/C165005293","wikidata":"https://www.wikidata.org/wiki/Q1074500","display_name":"Chip","level":2,"score":0.4201599359512329},{"id":"https://openalex.org/C24326235","wikidata":"https://www.wikidata.org/wiki/Q126095","display_name":"Electronic engineering","level":1,"score":0.38023045659065247},{"id":"https://openalex.org/C9390403","wikidata":"https://www.wikidata.org/wiki/Q3966","display_name":"Computer hardware","level":1,"score":0.35774457454681396},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.14683747291564941},{"id":"https://openalex.org/C154945302","wikidata":"https://www.wikidata.org/wiki/Q11660","display_name":"Artificial intelligence","level":1,"score":0.12515848875045776},{"id":"https://openalex.org/C33923547","wikidata":"https://www.wikidata.org/wiki/Q395","display_name":"Mathematics","level":0,"score":0.12008035182952881},{"id":"https://openalex.org/C31258907","wikidata":"https://www.wikidata.org/wiki/Q1301371","display_name":"Computer network","level":1,"score":0.11292335391044617},{"id":"https://openalex.org/C76155785","wikidata":"https://www.wikidata.org/wiki/Q418","display_name":"Telecommunications","level":1,"score":0.0},{"id":"https://openalex.org/C105795698","wikidata":"https://www.wikidata.org/wiki/Q12483","display_name":"Statistics","level":1,"score":0.0},{"id":"https://openalex.org/C111919701","wikidata":"https://www.wikidata.org/wiki/Q9135","display_name":"Operating system","level":1,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/ijcnn.2015.7280700","is_oa":false,"landing_page_url":"https://doi.org/10.1109/ijcnn.2015.7280700","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2015 International Joint Conference on Neural Networks (IJCNN)","raw_type":"proceedings-article"}],"best_oa_location":null,"sustainable_development_goals":[{"id":"https://metadata.un.org/sdg/7","score":0.7300000190734863,"display_name":"Affordable and clean energy"}],"awards":[],"funders":[],"has_content":{"grobid_xml":false,"pdf":false},"content_urls":null,"referenced_works_count":17,"referenced_works":["https://openalex.org/W1504376254","https://openalex.org/W1978262091","https://openalex.org/W2023745373","https://openalex.org/W2049190259","https://openalex.org/W2054507989","https://openalex.org/W2067184091","https://openalex.org/W2094621017","https://openalex.org/W2101295542","https://openalex.org/W2108077305","https://openalex.org/W2109174029","https://openalex.org/W2118625767","https://openalex.org/W2128140661","https://openalex.org/W2128273462","https://openalex.org/W2134438536","https://openalex.org/W2154766171","https://openalex.org/W2162851503","https://openalex.org/W2167901303"],"related_works":["https://openalex.org/W2378076731","https://openalex.org/W4286888643","https://openalex.org/W3210795196","https://openalex.org/W2088988140","https://openalex.org/W4236696095","https://openalex.org/W3143779693","https://openalex.org/W2103019253","https://openalex.org/W2626808643","https://openalex.org/W2004064826","https://openalex.org/W2951529875"],"abstract_inverted_index":{"In":[0],"this":[1,158],"paper":[2,159],"design":[3,167],"and":[4,53,56,78,86,113,138,154],"implementation":[5,70],"of":[6,92,98,129,152,164],"a":[7,132,139],"modular":[8,105],"mixed-signal":[9],"feed-forward":[10],"neural":[11],"network":[12,16,100,119,145,162,171],"is":[13,17,67,123],"presented.":[14],"The":[15,89,121],"implemented":[18,37],"based":[19],"on":[20,38],"the":[21,32,39,50,59,62,75,93,99,148,161,165],"Continuous":[22],"Valued":[23],"Number":[24],"System":[25],"(CVNS)":[26],"arithmetic":[27],"with":[28],"neurons":[29,94],"distributed":[30,90],"in":[31,71,83,109,157],"network.":[33],"Synapse":[34],"weights":[35],"are":[36,47,54,107,114],"chip":[40],"using":[41,58],"capacitive":[42],"analog":[43],"memories.":[44],"Weight":[45],"values":[46,52],"stored":[48],"as":[49],"CVNS":[51,63],"refreshed":[55],"updated":[57],"overlap":[60],"between":[61],"digits.":[64],"Current-mode":[65],"logic":[66],"used":[68,115,124],"for":[69,96],"order":[72],"to":[73,116,125,146,168],"simplify":[74],"circuit":[76],"design,":[77],"especially":[79],"addition,":[80],"which":[81],"resulted":[82],"reduced":[84],"power":[85],"area":[87],"consumption.":[88],"nature":[91],"allows":[95],"expansion":[97],"into":[101],"larger":[102],"networks.":[103],"Individual":[104],"layers":[106],"fabricated":[108],"TSMC":[110],"CMOS":[111],"180nm,":[112],"form":[117,169],"different":[118],"sizes.":[120],"module":[122],"configure":[126],"two":[127],"proof":[128],"concept":[130],"examples,":[131],"2":[133,135,142],"-":[134,136,141,143],"1":[137,144],"3":[140],"solve":[147],"XOR":[149],"problem.":[150],"Results":[151],"test":[153],"verification":[155],"presented":[156],"show":[160],"flexibility":[163],"proposed":[166],"various":[170],"configurations.":[172]},"counts_by_year":[],"updated_date":"2025-11-06T03:46:38.306776","created_date":"2025-10-10T00:00:00"}
