{"id":"https://openalex.org/W2121963878","doi":"https://doi.org/10.1109/ijcnn.2010.5596924","title":"Visual spike-based convolution processing with a Cellular Automata architecture","display_name":"Visual spike-based convolution processing with a Cellular Automata architecture","publication_year":2010,"publication_date":"2010-07-01","ids":{"openalex":"https://openalex.org/W2121963878","doi":"https://doi.org/10.1109/ijcnn.2010.5596924","mag":"2121963878"},"language":"en","primary_location":{"id":"doi:10.1109/ijcnn.2010.5596924","is_oa":false,"landing_page_url":"https://doi.org/10.1109/ijcnn.2010.5596924","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"The 2010 International Joint Conference on Neural Networks (IJCNN)","raw_type":"proceedings-article"},"type":"conference-paper","indexed_in":["crossref"],"open_access":{"is_oa":true,"oa_status":"green","oa_url":"https://idus.us.es/handle//11441/91249","any_repository_has_fulltext":true},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5090261188","display_name":"M. Rivas-Perez","orcid":"https://orcid.org/0000-0003-1640-2218"},"institutions":[{"id":"https://openalex.org/I79238269","display_name":"Universidad de Sevilla","ror":"https://ror.org/03yxnpp24","country_code":"ES","type":"education","lineage":["https://openalex.org/I79238269"]}],"countries":["ES"],"is_corresponding":false,"raw_author_name":"M. Rivas-Perez","raw_affiliation_strings":["Department of Computer Architecture and Technology, University of Seville, Seville, Spain","Department of Computer Architecture and Technology. University of Seville. Spain"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Department of Computer Architecture and Technology, University of Seville, Seville, Spain","institution_ids":["https://openalex.org/I79238269"]},{"raw_affiliation_string":"Department of Computer Architecture and Technology. University of Seville. Spain","institution_ids":["https://openalex.org/I79238269"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5050129780","display_name":"Alejandro Linares-Barranco","orcid":"https://orcid.org/0000-0002-6056-740X"},"institutions":[{"id":"https://openalex.org/I79238269","display_name":"Universidad de Sevilla","ror":"https://ror.org/03yxnpp24","country_code":"ES","type":"education","lineage":["https://openalex.org/I79238269"]}],"countries":["ES"],"is_corresponding":false,"raw_author_name":"A. Linares-Barranco","raw_affiliation_strings":["Department of Computer Architecture and Technology, University of Seville, Seville, Spain","Department of Computer Architecture and Technology. University of Seville. Spain"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Department of Computer Architecture and Technology, University of Seville, Seville, Spain","institution_ids":["https://openalex.org/I79238269"]},{"raw_affiliation_string":"Department of Computer Architecture and Technology. University of Seville. Spain","institution_ids":["https://openalex.org/I79238269"]}]},{"author_position":"middle","author":{"id":null,"display_name":"J. Cerda","orcid":null},"institutions":[{"id":"https://openalex.org/I16097986","display_name":"Universitat de Val\u00e8ncia","ror":"https://ror.org/043nxc105","country_code":"ES","type":"education","lineage":["https://openalex.org/I16097986"]},{"id":"https://openalex.org/I60053951","display_name":"Universitat Polit\u00e8cnica de Val\u00e8ncia","ror":"https://ror.org/01460j859","country_code":"ES","type":"education","lineage":["https://openalex.org/I60053951"]}],"countries":["ES"],"is_corresponding":false,"raw_author_name":"J. Cerda","raw_affiliation_strings":["Department of Electronic Engineering, Technical University of Valencia, Valencia, Spain","Dept. of Electronic Engineering Tech University of Valencia, SPAIN"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Department of Electronic Engineering, Technical University of Valencia, Valencia, Spain","institution_ids":["https://openalex.org/I60053951"]},{"raw_affiliation_string":"Dept. of Electronic Engineering Tech University of Valencia, SPAIN","institution_ids":["https://openalex.org/I16097986"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5091207033","display_name":"N. Ferrando","orcid":"https://orcid.org/0000-0001-5769-0194"},"institutions":[{"id":"https://openalex.org/I16097986","display_name":"Universitat de Val\u00e8ncia","ror":"https://ror.org/043nxc105","country_code":"ES","type":"education","lineage":["https://openalex.org/I16097986"]},{"id":"https://openalex.org/I79238269","display_name":"Universidad de Sevilla","ror":"https://ror.org/03yxnpp24","country_code":"ES","type":"education","lineage":["https://openalex.org/I79238269"]}],"countries":["ES"],"is_corresponding":false,"raw_author_name":"N. Ferrando","raw_affiliation_strings":["Department of Computer Architecture and Technology, University of Seville, Seville, Spain","Dept. of Electronic Engineering Tech University of Valencia, SPAIN"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Department of Computer Architecture and Technology, University of Seville, Seville, Spain","institution_ids":["https://openalex.org/I79238269"]},{"raw_affiliation_string":"Dept. of Electronic Engineering Tech University of Valencia, SPAIN","institution_ids":["https://openalex.org/I16097986"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5012722971","display_name":"G. Jim\u00e9nez","orcid":"https://orcid.org/0000-0003-4512-6750"},"institutions":[{"id":"https://openalex.org/I79238269","display_name":"Universidad de Sevilla","ror":"https://ror.org/03yxnpp24","country_code":"ES","type":"education","lineage":["https://openalex.org/I79238269"]}],"countries":["ES"],"is_corresponding":false,"raw_author_name":"G. Jimenez","raw_affiliation_strings":["Department of Computer Architecture and Technology, University of Seville, Seville, Spain","Department of Computer Architecture and Technology. University of Seville. Spain"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Department of Computer Architecture and Technology, University of Seville, Seville, Spain","institution_ids":["https://openalex.org/I79238269"]},{"raw_affiliation_string":"Department of Computer Architecture and Technology. University of Seville. Spain","institution_ids":["https://openalex.org/I79238269"]}]},{"author_position":"last","author":{"id":null,"display_name":"A. Civit","orcid":null},"institutions":[{"id":"https://openalex.org/I79238269","display_name":"Universidad de Sevilla","ror":"https://ror.org/03yxnpp24","country_code":"ES","type":"education","lineage":["https://openalex.org/I79238269"]}],"countries":["ES"],"is_corresponding":false,"raw_author_name":"A. Civit","raw_affiliation_strings":["Department of Computer Architecture and Technology, University of Seville, Seville, Spain","Department of Computer Architecture and Technology. University of Seville. Spain"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Department of Computer Architecture and Technology, University of Seville, Seville, Spain","institution_ids":["https://openalex.org/I79238269"]},{"raw_affiliation_string":"Department of Computer Architecture and Technology. University of Seville. Spain","institution_ids":["https://openalex.org/I79238269"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":3,"corresponding_author_ids":[],"corresponding_institution_ids":[],"apc_list":null,"apc_paid":null,"fwci":0.445,"has_fulltext":false,"cited_by_count":4,"citation_normalized_percentile":{"value":0.61662745,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":{"min":89,"max":96},"biblio":{"volume":null,"issue":null,"first_page":"1","last_page":"7"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10502","display_name":"Advanced Memory and Neural Computing","score":1.0,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10502","display_name":"Advanced Memory and Neural Computing","score":1.0,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11601","display_name":"Neuroscience and Neural Engineering","score":0.9991999864578247,"subfield":{"id":"https://openalex.org/subfields/2804","display_name":"Cellular and Molecular Neuroscience"},"field":{"id":"https://openalex.org/fields/28","display_name":"Neuroscience"},"domain":{"id":"https://openalex.org/domains/1","display_name":"Life Sciences"}},{"id":"https://openalex.org/T11992","display_name":"CCD and CMOS Imaging Sensors","score":0.9984999895095825,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/neuromorphic-engineering","display_name":"Neuromorphic engineering","score":0.8714293241500854},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.7466749548912048},{"id":"https://openalex.org/keywords/spike","display_name":"Spike (software development)","score":0.7136996388435364},{"id":"https://openalex.org/keywords/very-large-scale-integration","display_name":"Very-large-scale integration","score":0.6226273775100708},{"id":"https://openalex.org/keywords/asynchronous-communication","display_name":"Asynchronous communication","score":0.6192761063575745},{"id":"https://openalex.org/keywords/signal-processing","display_name":"Signal processing","score":0.5326071977615356},{"id":"https://openalex.org/keywords/cellular-automaton","display_name":"Cellular automaton","score":0.5067508816719055},{"id":"https://openalex.org/keywords/convolution","display_name":"Convolution (computer science)","score":0.4425981640815735},{"id":"https://openalex.org/keywords/computer-architecture","display_name":"Computer architecture","score":0.437904953956604},{"id":"https://openalex.org/keywords/learning-automata","display_name":"Learning automata","score":0.43160033226013184},{"id":"https://openalex.org/keywords/parallel-processing","display_name":"Parallel processing","score":0.4255257248878479},{"id":"https://openalex.org/keywords/computer-hardware","display_name":"Computer hardware","score":0.3714696764945984},{"id":"https://openalex.org/keywords/embedded-system","display_name":"Embedded system","score":0.3446207046508789},{"id":"https://openalex.org/keywords/automaton","display_name":"Automaton","score":0.34065935015678406},{"id":"https://openalex.org/keywords/theoretical-computer-science","display_name":"Theoretical computer science","score":0.28309983015060425},{"id":"https://openalex.org/keywords/artificial-intelligence","display_name":"Artificial intelligence","score":0.2595357894897461},{"id":"https://openalex.org/keywords/digital-signal-processing","display_name":"Digital signal processing","score":0.2508975565433502},{"id":"https://openalex.org/keywords/artificial-neural-network","display_name":"Artificial neural network","score":0.24509665369987488}],"concepts":[{"id":"https://openalex.org/C151927369","wikidata":"https://www.wikidata.org/wiki/Q1981312","display_name":"Neuromorphic engineering","level":3,"score":0.8714293241500854},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.7466749548912048},{"id":"https://openalex.org/C2781390188","wikidata":"https://www.wikidata.org/wiki/Q25203449","display_name":"Spike (software development)","level":2,"score":0.7136996388435364},{"id":"https://openalex.org/C14580979","wikidata":"https://www.wikidata.org/wiki/Q876049","display_name":"Very-large-scale integration","level":2,"score":0.6226273775100708},{"id":"https://openalex.org/C151319957","wikidata":"https://www.wikidata.org/wiki/Q752739","display_name":"Asynchronous communication","level":2,"score":0.6192761063575745},{"id":"https://openalex.org/C104267543","wikidata":"https://www.wikidata.org/wiki/Q208163","display_name":"Signal processing","level":3,"score":0.5326071977615356},{"id":"https://openalex.org/C35527583","wikidata":"https://www.wikidata.org/wiki/Q189156","display_name":"Cellular automaton","level":2,"score":0.5067508816719055},{"id":"https://openalex.org/C45347329","wikidata":"https://www.wikidata.org/wiki/Q5166604","display_name":"Convolution (computer science)","level":3,"score":0.4425981640815735},{"id":"https://openalex.org/C118524514","wikidata":"https://www.wikidata.org/wiki/Q173212","display_name":"Computer architecture","level":1,"score":0.437904953956604},{"id":"https://openalex.org/C2776807809","wikidata":"https://www.wikidata.org/wiki/Q6510160","display_name":"Learning automata","level":3,"score":0.43160033226013184},{"id":"https://openalex.org/C106515295","wikidata":"https://www.wikidata.org/wiki/Q26806595","display_name":"Parallel processing","level":2,"score":0.4255257248878479},{"id":"https://openalex.org/C9390403","wikidata":"https://www.wikidata.org/wiki/Q3966","display_name":"Computer hardware","level":1,"score":0.3714696764945984},{"id":"https://openalex.org/C149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","level":1,"score":0.3446207046508789},{"id":"https://openalex.org/C112505250","wikidata":"https://www.wikidata.org/wiki/Q787116","display_name":"Automaton","level":2,"score":0.34065935015678406},{"id":"https://openalex.org/C80444323","wikidata":"https://www.wikidata.org/wiki/Q2878974","display_name":"Theoretical computer science","level":1,"score":0.28309983015060425},{"id":"https://openalex.org/C154945302","wikidata":"https://www.wikidata.org/wiki/Q11660","display_name":"Artificial intelligence","level":1,"score":0.2595357894897461},{"id":"https://openalex.org/C84462506","wikidata":"https://www.wikidata.org/wiki/Q173142","display_name":"Digital signal processing","level":2,"score":0.2508975565433502},{"id":"https://openalex.org/C50644808","wikidata":"https://www.wikidata.org/wiki/Q192776","display_name":"Artificial neural network","level":2,"score":0.24509665369987488},{"id":"https://openalex.org/C115903868","wikidata":"https://www.wikidata.org/wiki/Q80993","display_name":"Software engineering","level":1,"score":0.0},{"id":"https://openalex.org/C31258907","wikidata":"https://www.wikidata.org/wiki/Q1301371","display_name":"Computer network","level":1,"score":0.0}],"mesh":[],"locations_count":2,"locations":[{"id":"doi:10.1109/ijcnn.2010.5596924","is_oa":false,"landing_page_url":"https://doi.org/10.1109/ijcnn.2010.5596924","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"The 2010 International Joint Conference on Neural Networks (IJCNN)","raw_type":"proceedings-article"},{"id":"pmh:oai:idus.us.es:11441/91249","is_oa":true,"landing_page_url":"https://idus.us.es/handle//11441/91249","pdf_url":null,"source":{"id":"https://openalex.org/S4306401665","display_name":"Deposito de Investigacion Universidad de Sevilla (University of Seville)","issn_l":null,"issn":null,"is_oa":false,"is_in_doaj":false,"is_core":false,"host_organization":"https://openalex.org/I79238269","host_organization_name":"Universidad de Sevilla","host_organization_lineage":["https://openalex.org/I79238269"],"host_organization_lineage_names":[],"type":"repository"},"license":"cc-by-nc-nd","license_id":"https://openalex.org/licenses/cc-by-nc-nd","version":"submittedVersion","is_accepted":false,"is_published":false,"raw_source_name":"","raw_type":"info:eu-repo/semantics/conferenceObject"}],"best_oa_location":{"id":"pmh:oai:idus.us.es:11441/91249","is_oa":true,"landing_page_url":"https://idus.us.es/handle//11441/91249","pdf_url":null,"source":{"id":"https://openalex.org/S4306401665","display_name":"Deposito de Investigacion Universidad de Sevilla (University of Seville)","issn_l":null,"issn":null,"is_oa":false,"is_in_doaj":false,"is_core":false,"host_organization":"https://openalex.org/I79238269","host_organization_name":"Universidad de Sevilla","host_organization_lineage":["https://openalex.org/I79238269"],"host_organization_lineage_names":[],"type":"repository"},"license":"cc-by-nc-nd","license_id":"https://openalex.org/licenses/cc-by-nc-nd","version":"submittedVersion","is_accepted":false,"is_published":false,"raw_source_name":"","raw_type":"info:eu-repo/semantics/conferenceObject"},"sustainable_development_goals":[{"display_name":"Industry, innovation and infrastructure","id":"https://metadata.un.org/sdg/9","score":0.5099999904632568}],"awards":[],"funders":[{"id":"https://openalex.org/F4320321974","display_name":"Universitat de Val\u00e8ncia","ror":"https://ror.org/043nxc105"}],"has_content":{"pdf":false,"grobid_xml":false},"content_urls":null,"referenced_works_count":16,"referenced_works":["https://openalex.org/W175083236","https://openalex.org/W1547056875","https://openalex.org/W1563514727","https://openalex.org/W1591840966","https://openalex.org/W1653079019","https://openalex.org/W1807988891","https://openalex.org/W1818823255","https://openalex.org/W1990315422","https://openalex.org/W2016574277","https://openalex.org/W2063265752","https://openalex.org/W2108704847","https://openalex.org/W2114058683","https://openalex.org/W2149312769","https://openalex.org/W4232588791","https://openalex.org/W6632599965","https://openalex.org/W6638435094"],"related_works":["https://openalex.org/W2986579802","https://openalex.org/W3108691306","https://openalex.org/W4389237622","https://openalex.org/W2166309310","https://openalex.org/W4385753159","https://openalex.org/W4200152843","https://openalex.org/W2012951121","https://openalex.org/W3081559266","https://openalex.org/W3160415743","https://openalex.org/W2794110548"],"abstract_inverted_index":{"This":[0,22,107],"paper":[1],"presents":[2],"a":[3,54,100],"first":[4],"approach":[5,108],"for":[6,33,45,58,104],"implementations":[7,42,68],"which":[8,114],"fuse":[9],"the":[10,15,110,119,126],"Address-Event-Representation":[11],"(AER)":[12],"processing":[13,89,102,111],"with":[14],"Cellular":[16,31,97],"Automata":[17,32,98],"using":[18],"FPGA":[19],"and":[20,76,87,93],"AER-tools.":[21],"new":[23],"strategy":[24],"applies":[25],"spike-based":[26,64],"convolution":[27],"filters":[28],"inspired":[29],"by":[30],"AER":[34,52],"vision":[35],"processing.":[36,51],"Spike-based":[37],"systems":[38,47,75],"are":[39],"neuro-inspired":[40,67],"circuits":[41],"traditionally":[43],"used":[44,79],"sensory":[46],"or":[48],"sensor":[49,82],"signal":[50],"is":[53,99],"neuromorphic":[55,74],"communication":[56],"protocol":[57],"transferring":[59],"asynchronous":[60],"events":[61],"between":[62],"VLSI":[63],"chips.":[65,95],"These":[66],"allow":[69],"developing":[70],"complex,":[71],"multilayer,":[72],"multichip":[73],"have":[77],"been":[78],"to":[80,124],"design":[81],"chips,":[83,90],"such":[84],"as":[85],"retinas":[86],"cochlea,":[88],"e.g.":[91],"filters,":[92],"learning":[94],"Furthermore,":[96],"bio-inspired":[101],"model":[103],"problem":[105],"solving.":[106],"divides":[109],"synchronous":[112],"cells":[113],"change":[115],"their":[116],"states":[117],"at":[118],"same":[120],"time":[121],"in":[122],"order":[123],"get":[125],"solution.":[127]},"counts_by_year":[{"year":2016,"cited_by_count":2},{"year":2014,"cited_by_count":1}],"updated_date":"2026-07-29T14:22:42.915294","created_date":"2025-10-10T00:00:00"}