{"id":"https://openalex.org/W1486195328","doi":"https://doi.org/10.1109/ijcnn.2005.1555909","title":"Hardware implementation of CMAC and B-spline neural networks for embedded applications","display_name":"Hardware implementation of CMAC and B-spline neural networks for embedded applications","publication_year":2006,"publication_date":"2006-01-05","ids":{"openalex":"https://openalex.org/W1486195328","doi":"https://doi.org/10.1109/ijcnn.2005.1555909","mag":"1486195328"},"language":"en","primary_location":{"id":"doi:10.1109/ijcnn.2005.1555909","is_oa":false,"landing_page_url":"https://doi.org/10.1109/ijcnn.2005.1555909","pdf_url":null,"source":{"id":"https://openalex.org/S4363609022","display_name":"Proceedings. 2005 IEEE International Joint Conference on Neural Networks, 2005.","issn_l":null,"issn":null,"is_oa":false,"is_in_doaj":false,"is_core":false,"host_organization":null,"host_organization_name":null,"host_organization_lineage":[],"host_organization_lineage_names":[],"type":"conference"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"Proceedings. 2005 IEEE International Joint Conference on Neural Networks, 2005.","raw_type":"proceedings-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5057659329","display_name":"Qiuye Zhao","orcid":"https://orcid.org/0000-0001-6011-100X"},"institutions":[{"id":"https://openalex.org/I32062511","display_name":"Heriot-Watt University","ror":"https://ror.org/04mghma93","country_code":"GB","type":"education","lineage":["https://openalex.org/I32062511"]}],"countries":["GB"],"is_corresponding":true,"raw_author_name":"Qiuye Zhao","raw_affiliation_strings":["School of Engineering and Physical Sciences, Heriot-Watt University, Edinburgh, UK","Sch. of Eng. & Phys. Sci., Heriot Watt Univ., Edinburgh, UK"],"affiliations":[{"raw_affiliation_string":"School of Engineering and Physical Sciences, Heriot-Watt University, Edinburgh, UK","institution_ids":["https://openalex.org/I32062511"]},{"raw_affiliation_string":"Sch. of Eng. & Phys. Sci., Heriot Watt Univ., Edinburgh, UK","institution_ids":["https://openalex.org/I32062511"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5049064659","display_name":"Donald Reay","orcid":null},"institutions":[{"id":"https://openalex.org/I32062511","display_name":"Heriot-Watt University","ror":"https://ror.org/04mghma93","country_code":"GB","type":"education","lineage":["https://openalex.org/I32062511"]}],"countries":["GB"],"is_corresponding":false,"raw_author_name":"D.S. Reay","raw_affiliation_strings":["School of Engineering and Physical Sciences, Heriot-Watt University, Edinburgh, UK","Sch. of Eng. & Phys. Sci., Heriot Watt Univ., Edinburgh, UK"],"affiliations":[{"raw_affiliation_string":"School of Engineering and Physical Sciences, Heriot-Watt University, Edinburgh, UK","institution_ids":["https://openalex.org/I32062511"]},{"raw_affiliation_string":"Sch. of Eng. & Phys. Sci., Heriot Watt Univ., Edinburgh, UK","institution_ids":["https://openalex.org/I32062511"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":2,"corresponding_author_ids":["https://openalex.org/A5057659329"],"corresponding_institution_ids":["https://openalex.org/I32062511"],"apc_list":null,"apc_paid":null,"fwci":0.4079,"has_fulltext":false,"cited_by_count":1,"citation_normalized_percentile":{"value":0.53083392,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":null,"biblio":{"volume":"2","issue":null,"first_page":"657","last_page":"662"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10320","display_name":"Neural Networks and Applications","score":0.9950000047683716,"subfield":{"id":"https://openalex.org/subfields/1702","display_name":"Artificial Intelligence"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10320","display_name":"Neural Networks and Applications","score":0.9950000047683716,"subfield":{"id":"https://openalex.org/subfields/1702","display_name":"Artificial Intelligence"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10820","display_name":"Fuzzy Logic and Control Systems","score":0.9861000180244446,"subfield":{"id":"https://openalex.org/subfields/1702","display_name":"Artificial Intelligence"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10040","display_name":"Adaptive Control of Nonlinear Systems","score":0.9779999852180481,"subfield":{"id":"https://openalex.org/subfields/2207","display_name":"Control and Systems Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/cerebellar-model-articulation-controller","display_name":"Cerebellar model articulation controller","score":0.8691948056221008},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.7165896892547607},{"id":"https://openalex.org/keywords/field-programmable-gate-array","display_name":"Field-programmable gate array","score":0.6970437169075012},{"id":"https://openalex.org/keywords/schematic","display_name":"Schematic","score":0.6495373845100403},{"id":"https://openalex.org/keywords/hardware-description-language","display_name":"Hardware description language","score":0.5943266153335571},{"id":"https://openalex.org/keywords/artificial-neural-network","display_name":"Artificial neural network","score":0.577314555644989},{"id":"https://openalex.org/keywords/software","display_name":"Software","score":0.4498637020587921},{"id":"https://openalex.org/keywords/vhdl","display_name":"VHDL","score":0.4223533868789673},{"id":"https://openalex.org/keywords/realisation","display_name":"Realisation","score":0.41784435510635376},{"id":"https://openalex.org/keywords/simple","display_name":"Simple (philosophy)","score":0.4167152941226959},{"id":"https://openalex.org/keywords/computer-hardware","display_name":"Computer hardware","score":0.40454214811325073},{"id":"https://openalex.org/keywords/computer-engineering","display_name":"Computer engineering","score":0.3770316243171692},{"id":"https://openalex.org/keywords/computer-architecture","display_name":"Computer architecture","score":0.33785480260849},{"id":"https://openalex.org/keywords/embedded-system","display_name":"Embedded system","score":0.32370030879974365},{"id":"https://openalex.org/keywords/electronic-engineering","display_name":"Electronic engineering","score":0.2072770893573761},{"id":"https://openalex.org/keywords/artificial-intelligence","display_name":"Artificial intelligence","score":0.18316474556922913},{"id":"https://openalex.org/keywords/programming-language","display_name":"Programming language","score":0.1394963562488556},{"id":"https://openalex.org/keywords/engineering","display_name":"Engineering","score":0.12595978379249573}],"concepts":[{"id":"https://openalex.org/C2780576740","wikidata":"https://www.wikidata.org/wiki/Q5064071","display_name":"Cerebellar model articulation controller","level":3,"score":0.8691948056221008},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.7165896892547607},{"id":"https://openalex.org/C42935608","wikidata":"https://www.wikidata.org/wiki/Q190411","display_name":"Field-programmable gate array","level":2,"score":0.6970437169075012},{"id":"https://openalex.org/C192328126","wikidata":"https://www.wikidata.org/wiki/Q4514647","display_name":"Schematic","level":2,"score":0.6495373845100403},{"id":"https://openalex.org/C42143788","wikidata":"https://www.wikidata.org/wiki/Q173341","display_name":"Hardware description language","level":3,"score":0.5943266153335571},{"id":"https://openalex.org/C50644808","wikidata":"https://www.wikidata.org/wiki/Q192776","display_name":"Artificial neural network","level":2,"score":0.577314555644989},{"id":"https://openalex.org/C2777904410","wikidata":"https://www.wikidata.org/wiki/Q7397","display_name":"Software","level":2,"score":0.4498637020587921},{"id":"https://openalex.org/C36941000","wikidata":"https://www.wikidata.org/wiki/Q209455","display_name":"VHDL","level":3,"score":0.4223533868789673},{"id":"https://openalex.org/C2779462738","wikidata":"https://www.wikidata.org/wiki/Q17146409","display_name":"Realisation","level":2,"score":0.41784435510635376},{"id":"https://openalex.org/C2780586882","wikidata":"https://www.wikidata.org/wiki/Q7520643","display_name":"Simple (philosophy)","level":2,"score":0.4167152941226959},{"id":"https://openalex.org/C9390403","wikidata":"https://www.wikidata.org/wiki/Q3966","display_name":"Computer hardware","level":1,"score":0.40454214811325073},{"id":"https://openalex.org/C113775141","wikidata":"https://www.wikidata.org/wiki/Q428691","display_name":"Computer engineering","level":1,"score":0.3770316243171692},{"id":"https://openalex.org/C118524514","wikidata":"https://www.wikidata.org/wiki/Q173212","display_name":"Computer architecture","level":1,"score":0.33785480260849},{"id":"https://openalex.org/C149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","level":1,"score":0.32370030879974365},{"id":"https://openalex.org/C24326235","wikidata":"https://www.wikidata.org/wiki/Q126095","display_name":"Electronic engineering","level":1,"score":0.2072770893573761},{"id":"https://openalex.org/C154945302","wikidata":"https://www.wikidata.org/wiki/Q11660","display_name":"Artificial intelligence","level":1,"score":0.18316474556922913},{"id":"https://openalex.org/C199360897","wikidata":"https://www.wikidata.org/wiki/Q9143","display_name":"Programming language","level":1,"score":0.1394963562488556},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.12595978379249573},{"id":"https://openalex.org/C138885662","wikidata":"https://www.wikidata.org/wiki/Q5891","display_name":"Philosophy","level":0,"score":0.0},{"id":"https://openalex.org/C121332964","wikidata":"https://www.wikidata.org/wiki/Q413","display_name":"Physics","level":0,"score":0.0},{"id":"https://openalex.org/C111472728","wikidata":"https://www.wikidata.org/wiki/Q9471","display_name":"Epistemology","level":1,"score":0.0},{"id":"https://openalex.org/C62520636","wikidata":"https://www.wikidata.org/wiki/Q944","display_name":"Quantum mechanics","level":1,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/ijcnn.2005.1555909","is_oa":false,"landing_page_url":"https://doi.org/10.1109/ijcnn.2005.1555909","pdf_url":null,"source":{"id":"https://openalex.org/S4363609022","display_name":"Proceedings. 2005 IEEE International Joint Conference on Neural Networks, 2005.","issn_l":null,"issn":null,"is_oa":false,"is_in_doaj":false,"is_core":false,"host_organization":null,"host_organization_name":null,"host_organization_lineage":[],"host_organization_lineage_names":[],"type":"conference"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"Proceedings. 2005 IEEE International Joint Conference on Neural Networks, 2005.","raw_type":"proceedings-article"}],"best_oa_location":null,"sustainable_development_goals":[],"awards":[],"funders":[],"has_content":{"grobid_xml":false,"pdf":false},"content_urls":null,"referenced_works_count":12,"referenced_works":["https://openalex.org/W1492468531","https://openalex.org/W1889531669","https://openalex.org/W1940438320","https://openalex.org/W2013815893","https://openalex.org/W2051593996","https://openalex.org/W2101489144","https://openalex.org/W2117592133","https://openalex.org/W2126482285","https://openalex.org/W2127919919","https://openalex.org/W2153246672","https://openalex.org/W2157623201","https://openalex.org/W6683100933"],"related_works":["https://openalex.org/W2110818533","https://openalex.org/W1917852300","https://openalex.org/W2384838054","https://openalex.org/W2139058049","https://openalex.org/W2548456620","https://openalex.org/W2075214143","https://openalex.org/W2376018793","https://openalex.org/W2911649771","https://openalex.org/W2148697719","https://openalex.org/W2070083638"],"abstract_inverted_index":{"The":[0],"cerebellar":[1],"model":[2,42],"articulation":[3],"controller":[4],"(CMAC)":[5],"is":[6,93],"particularly":[7],"well":[8],"suited":[9],"to":[10,41,68,76,106],"real-time":[11],"embedded":[12,101],"applications":[13],"on":[14],"account":[15],"of":[16,24,58],"its":[17,31,107],"fast":[18],"learning,":[19],"local":[20],"generalisation,":[21],"and":[22,38,92,112,127],"ease":[23],"either":[25],"software":[26],"or":[27],"hardware":[28,98,115],"implementation.":[29],"Among":[30],"drawbacks":[32,46],"are":[33,47,125],"a":[34,65,119],"large":[35],"memory":[36],"requirement":[37],"the":[39,50,56,69,86,113],"inability":[40],"function":[43,82],"derivatives.":[44],"These":[45],"addressed":[48],"by":[49],"B-spline":[51],"neural":[52],"network":[53,71],"(BSNN)":[54],"at":[55],"cost":[57],"greater":[59],"computational":[60,88],"complexity.":[61],"This":[62],"paper":[63],"describes":[64],"simple":[66],"modification":[67],"CMAC":[70,91],"that":[72],"yields":[73],"characteristics":[74],"equivalent":[75],"an":[77],"order":[78],"two":[79],"BSNN,":[80],"including":[81],"derivative":[83],"modelling,":[84],"for":[85,95],"same":[87],"complexity":[89],"as":[90],"suitable":[94],"high":[96],"speed":[97],"implementation":[99],"in":[100],"applications.":[102],"Two":[103],"alternative":[104],"approaches":[105],"realisation,":[108],"namely":[109],"schematic":[110],"entry":[111],"Handel-C":[114],"programming":[116],"language,":[117],"using":[118],"field":[120],"programmable":[121],"gate":[122],"array":[123],"(FPGA)":[124],"described":[126],"compared.":[128]},"counts_by_year":[],"updated_date":"2025-11-06T03:46:38.306776","created_date":"2025-10-10T00:00:00"}
