{"id":"https://openalex.org/W1484066561","doi":"https://doi.org/10.1109/ijcnn.2005.1555904","title":"Circuit implementation of multi-thresholded neuron (MTN) using BiCMOS technology","display_name":"Circuit implementation of multi-thresholded neuron (MTN) using BiCMOS technology","publication_year":2006,"publication_date":"2006-01-05","ids":{"openalex":"https://openalex.org/W1484066561","doi":"https://doi.org/10.1109/ijcnn.2005.1555904","mag":"1484066561"},"language":"en","primary_location":{"id":"doi:10.1109/ijcnn.2005.1555904","is_oa":false,"landing_page_url":"https://doi.org/10.1109/ijcnn.2005.1555904","pdf_url":null,"source":{"id":"https://openalex.org/S4363609022","display_name":"Proceedings. 2005 IEEE International Joint Conference on Neural Networks, 2005.","issn_l":null,"issn":null,"is_oa":false,"is_in_doaj":false,"is_core":false,"host_organization":null,"host_organization_name":null,"host_organization_lineage":[],"host_organization_lineage_names":[],"type":"conference"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"Proceedings. 2005 IEEE International Joint Conference on Neural Networks, 2005.","raw_type":"proceedings-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5027236515","display_name":"Xiaolei Zhu","orcid":"https://orcid.org/0000-0001-8141-021X"},"institutions":[{"id":"https://openalex.org/I99065089","display_name":"Tsinghua University","ror":"https://ror.org/03cve4549","country_code":"CN","type":"education","lineage":["https://openalex.org/I99065089"]},{"id":"https://openalex.org/I4210119392","display_name":"Institute of Microelectronics","ror":"https://ror.org/02s6gs133","country_code":"CN","type":"facility","lineage":["https://openalex.org/I19820366","https://openalex.org/I4210119392"]}],"countries":["CN"],"is_corresponding":true,"raw_author_name":"Xiaolei Zhu","raw_affiliation_strings":["Department of Information Science and Electronic Engineering, University of Zhejiang, Hangzhou, Zhejiang, China","Institute of Microelectronics, Tsinghua University, Beijing, China"],"affiliations":[{"raw_affiliation_string":"Department of Information Science and Electronic Engineering, University of Zhejiang, Hangzhou, Zhejiang, China","institution_ids":[]},{"raw_affiliation_string":"Institute of Microelectronics, Tsinghua University, Beijing, China","institution_ids":["https://openalex.org/I99065089","https://openalex.org/I4210119392"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5043025337","display_name":"Jizhong Shen","orcid":"https://orcid.org/0000-0002-9031-2379"},"institutions":[],"countries":[],"is_corresponding":false,"raw_author_name":"Jizhong Shen","raw_affiliation_strings":["Department of Information Science and Electronic Engineering, University of Zhejiang, Hangzhou, Zhejiang, China"],"affiliations":[{"raw_affiliation_string":"Department of Information Science and Electronic Engineering, University of Zhejiang, Hangzhou, Zhejiang, China","institution_ids":[]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5052727227","display_name":"Baoyong Chi","orcid":"https://orcid.org/0000-0003-4399-4423"},"institutions":[{"id":"https://openalex.org/I99065089","display_name":"Tsinghua University","ror":"https://ror.org/03cve4549","country_code":"CN","type":"education","lineage":["https://openalex.org/I99065089"]},{"id":"https://openalex.org/I4210119392","display_name":"Institute of Microelectronics","ror":"https://ror.org/02s6gs133","country_code":"CN","type":"facility","lineage":["https://openalex.org/I19820366","https://openalex.org/I4210119392"]}],"countries":["CN"],"is_corresponding":false,"raw_author_name":"Baoyong Chi","raw_affiliation_strings":["Institute of Microelectronics, Tsinghua University, Beijing, China"],"affiliations":[{"raw_affiliation_string":"Institute of Microelectronics, Tsinghua University, Beijing, China","institution_ids":["https://openalex.org/I99065089","https://openalex.org/I4210119392"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5100356896","display_name":"Zhihua Wang","orcid":"https://orcid.org/0000-0003-3968-4465"},"institutions":[{"id":"https://openalex.org/I99065089","display_name":"Tsinghua University","ror":"https://ror.org/03cve4549","country_code":"CN","type":"education","lineage":["https://openalex.org/I99065089"]},{"id":"https://openalex.org/I4210119392","display_name":"Institute of Microelectronics","ror":"https://ror.org/02s6gs133","country_code":"CN","type":"facility","lineage":["https://openalex.org/I19820366","https://openalex.org/I4210119392"]}],"countries":["CN"],"is_corresponding":false,"raw_author_name":"Zhihua Wang","raw_affiliation_strings":["Institute of Microelectronics, Tsinghua University, Beijing, China"],"affiliations":[{"raw_affiliation_string":"Institute of Microelectronics, Tsinghua University, Beijing, China","institution_ids":["https://openalex.org/I99065089","https://openalex.org/I4210119392"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":4,"corresponding_author_ids":["https://openalex.org/A5027236515"],"corresponding_institution_ids":["https://openalex.org/I4210119392","https://openalex.org/I99065089"],"apc_list":null,"apc_paid":null,"fwci":0.0,"has_fulltext":false,"cited_by_count":2,"citation_normalized_percentile":{"value":0.09915907,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":{"min":90,"max":94},"biblio":{"volume":"2","issue":null,"first_page":"627","last_page":"632"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10320","display_name":"Neural Networks and Applications","score":0.9994000196456909,"subfield":{"id":"https://openalex.org/subfields/1702","display_name":"Artificial Intelligence"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10320","display_name":"Neural Networks and Applications","score":0.9994000196456909,"subfield":{"id":"https://openalex.org/subfields/1702","display_name":"Artificial Intelligence"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10502","display_name":"Advanced Memory and Neural Computing","score":0.9991999864578247,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10323","display_name":"Analog and Mixed-Signal Circuit Design","score":0.9987999796867371,"subfield":{"id":"https://openalex.org/subfields/2204","display_name":"Biomedical Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/bicmos","display_name":"BiCMOS","score":0.695146918296814},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.6748790144920349},{"id":"https://openalex.org/keywords/electronic-engineering","display_name":"Electronic engineering","score":0.615752100944519},{"id":"https://openalex.org/keywords/electronic-circuit","display_name":"Electronic circuit","score":0.5958533883094788},{"id":"https://openalex.org/keywords/signal","display_name":"SIGNAL (programming language)","score":0.5549170970916748},{"id":"https://openalex.org/keywords/transistor","display_name":"Transistor","score":0.5091182589530945},{"id":"https://openalex.org/keywords/voltage","display_name":"Voltage","score":0.4822293221950531},{"id":"https://openalex.org/keywords/logic-gate","display_name":"Logic gate","score":0.4421081244945526},{"id":"https://openalex.org/keywords/current-conveyor","display_name":"Current conveyor","score":0.4207141697406769},{"id":"https://openalex.org/keywords/linearity","display_name":"Linearity","score":0.41047149896621704},{"id":"https://openalex.org/keywords/electrical-engineering","display_name":"Electrical engineering","score":0.3335927128791809},{"id":"https://openalex.org/keywords/engineering","display_name":"Engineering","score":0.23408761620521545},{"id":"https://openalex.org/keywords/resistor","display_name":"Resistor","score":0.09794819355010986}],"concepts":[{"id":"https://openalex.org/C62427370","wikidata":"https://www.wikidata.org/wiki/Q173416","display_name":"BiCMOS","level":4,"score":0.695146918296814},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.6748790144920349},{"id":"https://openalex.org/C24326235","wikidata":"https://www.wikidata.org/wiki/Q126095","display_name":"Electronic engineering","level":1,"score":0.615752100944519},{"id":"https://openalex.org/C134146338","wikidata":"https://www.wikidata.org/wiki/Q1815901","display_name":"Electronic circuit","level":2,"score":0.5958533883094788},{"id":"https://openalex.org/C2779843651","wikidata":"https://www.wikidata.org/wiki/Q7390335","display_name":"SIGNAL (programming language)","level":2,"score":0.5549170970916748},{"id":"https://openalex.org/C172385210","wikidata":"https://www.wikidata.org/wiki/Q5339","display_name":"Transistor","level":3,"score":0.5091182589530945},{"id":"https://openalex.org/C165801399","wikidata":"https://www.wikidata.org/wiki/Q25428","display_name":"Voltage","level":2,"score":0.4822293221950531},{"id":"https://openalex.org/C131017901","wikidata":"https://www.wikidata.org/wiki/Q170451","display_name":"Logic gate","level":2,"score":0.4421081244945526},{"id":"https://openalex.org/C110252649","wikidata":"https://www.wikidata.org/wiki/Q5195095","display_name":"Current conveyor","level":4,"score":0.4207141697406769},{"id":"https://openalex.org/C77170095","wikidata":"https://www.wikidata.org/wiki/Q1753188","display_name":"Linearity","level":2,"score":0.41047149896621704},{"id":"https://openalex.org/C119599485","wikidata":"https://www.wikidata.org/wiki/Q43035","display_name":"Electrical engineering","level":1,"score":0.3335927128791809},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.23408761620521545},{"id":"https://openalex.org/C137488568","wikidata":"https://www.wikidata.org/wiki/Q5321","display_name":"Resistor","level":3,"score":0.09794819355010986},{"id":"https://openalex.org/C199360897","wikidata":"https://www.wikidata.org/wiki/Q9143","display_name":"Programming language","level":1,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/ijcnn.2005.1555904","is_oa":false,"landing_page_url":"https://doi.org/10.1109/ijcnn.2005.1555904","pdf_url":null,"source":{"id":"https://openalex.org/S4363609022","display_name":"Proceedings. 2005 IEEE International Joint Conference on Neural Networks, 2005.","issn_l":null,"issn":null,"is_oa":false,"is_in_doaj":false,"is_core":false,"host_organization":null,"host_organization_name":null,"host_organization_lineage":[],"host_organization_lineage_names":[],"type":"conference"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"Proceedings. 2005 IEEE International Joint Conference on Neural Networks, 2005.","raw_type":"proceedings-article"}],"best_oa_location":null,"sustainable_development_goals":[{"id":"https://metadata.un.org/sdg/7","display_name":"Affordable and clean energy","score":0.75}],"awards":[],"funders":[],"has_content":{"grobid_xml":false,"pdf":false},"content_urls":null,"referenced_works_count":18,"referenced_works":["https://openalex.org/W1481312688","https://openalex.org/W1496032953","https://openalex.org/W1566916904","https://openalex.org/W1578671836","https://openalex.org/W1887222302","https://openalex.org/W1899957707","https://openalex.org/W1913093184","https://openalex.org/W1997324634","https://openalex.org/W2026851144","https://openalex.org/W2101927907","https://openalex.org/W2104305626","https://openalex.org/W2107908542","https://openalex.org/W2111607310","https://openalex.org/W2124884284","https://openalex.org/W2135350127","https://openalex.org/W2151121219","https://openalex.org/W3160343647","https://openalex.org/W6675780011"],"related_works":["https://openalex.org/W2169446943","https://openalex.org/W2536772180","https://openalex.org/W4384377133","https://openalex.org/W2162238648","https://openalex.org/W1960237660","https://openalex.org/W1914394517","https://openalex.org/W2783383343","https://openalex.org/W2381174299","https://openalex.org/W1552470334","https://openalex.org/W2111607310"],"abstract_inverted_index":{"By":[0],"analysing":[1],"the":[2,27,61,101,107],"principle":[3],"of":[4,59],"multi-thresholded":[5,14,78],"neurons":[6],"(MTNs),":[7],"a":[8,37],"methodology":[9],"is":[10,46,52,73,86],"developed":[11],"for":[12,88],"designing":[13],"neuron":[15],"circuits":[16,81,103],"(MTNCs).":[17],"First,":[18],"two":[19],"n-channel":[20],"MOS":[21],"transistors":[22],"are":[23],"employed":[24],"to":[25,64,76],"design":[26,77],"voltage-mode":[28],"synapse":[29],"circuit":[30,41],"with":[31,97],"high":[32],"simplicity":[33],"and":[34],"linearity.":[35],"Second,":[36],"BiCMOS":[38],"technique":[39],"based":[40],"named":[42],"judgement-converting":[43],"switch":[44,93],"(JCS)":[45],"proposed.":[47],"The":[48],"JCS":[49],"whose":[50],"threshold":[51],"voltage-controlled":[53],"current":[54,65],"signal,":[55],"provides":[56],"an":[57,71],"ability":[58],"converting":[60],"voltage":[62],"signal":[63],"signal.":[66],"Based":[67],"on":[68],"this":[69],"possibility,":[70],"approach":[72],"put":[74],"forward":[75],"judgement":[79],"function":[80,110],"(MTJFCs).":[82],"Finally,":[83],"single":[84],"MTNC":[85],"designed":[87,102],"implementing":[89],"XOR":[90],"operation":[91],"at":[92],"level.":[94],"Simulation":[95],"results":[96],"PSPICE":[98],"show":[99],"that":[100],"not":[104],"only":[105],"have":[106],"correct":[108],"logic":[109],"but":[111],"also":[112],"small":[113],"propagation":[114],"delay.":[115]},"counts_by_year":[{"year":2024,"cited_by_count":1},{"year":2017,"cited_by_count":1}],"updated_date":"2025-11-06T03:46:38.306776","created_date":"2025-10-10T00:00:00"}