{"id":"https://openalex.org/W2100856955","doi":"https://doi.org/10.1109/ijcnn.2004.1380863","title":"On-chip contrastive divergence learning in analogue VLSI","display_name":"On-chip contrastive divergence learning in analogue VLSI","publication_year":2005,"publication_date":"2005-01-31","ids":{"openalex":"https://openalex.org/W2100856955","doi":"https://doi.org/10.1109/ijcnn.2004.1380863","mag":"2100856955"},"language":"en","primary_location":{"id":"doi:10.1109/ijcnn.2004.1380863","is_oa":false,"landing_page_url":"https://doi.org/10.1109/ijcnn.2004.1380863","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2004 IEEE International Joint Conference on Neural Networks (IEEE Cat. No.04CH37541)","raw_type":"proceedings-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5073038409","display_name":"Patrice Fleury","orcid":null},"institutions":[{"id":"https://openalex.org/I4210087927","display_name":"National Microelectronics Institute","ror":"https://ror.org/003ck6433","country_code":"GB","type":"nonprofit","lineage":["https://openalex.org/I4210087927"]},{"id":"https://openalex.org/I98677209","display_name":"University of Edinburgh","ror":"https://ror.org/01nrxwf90","country_code":"GB","type":"education","lineage":["https://openalex.org/I98677209"]}],"countries":["GB"],"is_corresponding":true,"raw_author_name":"P. Fleury","raw_affiliation_strings":["Institute for Integrated Micro and Nano Systems, University of Edinburgh, UK","Inst. for Integrated Micro & Nano Syst., Edinburgh Univ., UK"],"affiliations":[{"raw_affiliation_string":"Institute for Integrated Micro and Nano Systems, University of Edinburgh, UK","institution_ids":["https://openalex.org/I4210087927","https://openalex.org/I98677209"]},{"raw_affiliation_string":"Inst. for Integrated Micro & Nano Syst., Edinburgh Univ., UK","institution_ids":["https://openalex.org/I98677209"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5003518605","display_name":"H. Chen","orcid":null},"institutions":[{"id":"https://openalex.org/I4210087927","display_name":"National Microelectronics Institute","ror":"https://ror.org/003ck6433","country_code":"GB","type":"nonprofit","lineage":["https://openalex.org/I4210087927"]},{"id":"https://openalex.org/I98677209","display_name":"University of Edinburgh","ror":"https://ror.org/01nrxwf90","country_code":"GB","type":"education","lineage":["https://openalex.org/I98677209"]}],"countries":["GB"],"is_corresponding":false,"raw_author_name":"H. Chen","raw_affiliation_strings":["Institute for Integrated Micro and Nano Systems, University of Edinburgh, UK","Inst. for Integrated Micro & Nano Syst., Edinburgh Univ., UK"],"affiliations":[{"raw_affiliation_string":"Institute for Integrated Micro and Nano Systems, University of Edinburgh, UK","institution_ids":["https://openalex.org/I4210087927","https://openalex.org/I98677209"]},{"raw_affiliation_string":"Inst. for Integrated Micro & Nano Syst., Edinburgh Univ., UK","institution_ids":["https://openalex.org/I98677209"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5105524416","display_name":"Alan F. Murray","orcid":null},"institutions":[{"id":"https://openalex.org/I4210087927","display_name":"National Microelectronics Institute","ror":"https://ror.org/003ck6433","country_code":"GB","type":"nonprofit","lineage":["https://openalex.org/I4210087927"]},{"id":"https://openalex.org/I98677209","display_name":"University of Edinburgh","ror":"https://ror.org/01nrxwf90","country_code":"GB","type":"education","lineage":["https://openalex.org/I98677209"]}],"countries":["GB"],"is_corresponding":false,"raw_author_name":"A.F. Murray","raw_affiliation_strings":["Institute for Integrated Micro and Nano Systems, University of Edinburgh, UK","Inst. for Integrated Micro & Nano Syst., Edinburgh Univ., UK"],"affiliations":[{"raw_affiliation_string":"Institute for Integrated Micro and Nano Systems, University of Edinburgh, UK","institution_ids":["https://openalex.org/I4210087927","https://openalex.org/I98677209"]},{"raw_affiliation_string":"Inst. for Integrated Micro & Nano Syst., Edinburgh Univ., UK","institution_ids":["https://openalex.org/I98677209"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":3,"corresponding_author_ids":["https://openalex.org/A5073038409"],"corresponding_institution_ids":["https://openalex.org/I4210087927","https://openalex.org/I98677209"],"apc_list":null,"apc_paid":null,"fwci":1.0671,"has_fulltext":false,"cited_by_count":5,"citation_normalized_percentile":{"value":0.79321492,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":null,"biblio":{"volume":"3","issue":null,"first_page":"1723","last_page":"1728"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T14117","display_name":"Integrated Circuits and Semiconductor Failure Analysis","score":0.9980999827384949,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T14117","display_name":"Integrated Circuits and Semiconductor Failure Analysis","score":0.9980999827384949,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10320","display_name":"Neural Networks and Applications","score":0.9976000189781189,"subfield":{"id":"https://openalex.org/subfields/1702","display_name":"Artificial Intelligence"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10323","display_name":"Analog and Mixed-Signal Circuit Design","score":0.9975000023841858,"subfield":{"id":"https://openalex.org/subfields/2204","display_name":"Biomedical Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/very-large-scale-integration","display_name":"Very-large-scale integration","score":0.8140233755111694},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.6308866143226624},{"id":"https://openalex.org/keywords/chip","display_name":"Chip","score":0.623317539691925},{"id":"https://openalex.org/keywords/divergence","display_name":"Divergence (linguistics)","score":0.5781253576278687},{"id":"https://openalex.org/keywords/computer-architecture","display_name":"Computer architecture","score":0.45492783188819885},{"id":"https://openalex.org/keywords/system-on-a-chip","display_name":"System on a chip","score":0.4204868674278259},{"id":"https://openalex.org/keywords/embedded-system","display_name":"Embedded system","score":0.23242107033729553},{"id":"https://openalex.org/keywords/telecommunications","display_name":"Telecommunications","score":0.11058619618415833},{"id":"https://openalex.org/keywords/linguistics","display_name":"Linguistics","score":0.08411484956741333}],"concepts":[{"id":"https://openalex.org/C14580979","wikidata":"https://www.wikidata.org/wiki/Q876049","display_name":"Very-large-scale integration","level":2,"score":0.8140233755111694},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.6308866143226624},{"id":"https://openalex.org/C165005293","wikidata":"https://www.wikidata.org/wiki/Q1074500","display_name":"Chip","level":2,"score":0.623317539691925},{"id":"https://openalex.org/C207390915","wikidata":"https://www.wikidata.org/wiki/Q1230525","display_name":"Divergence (linguistics)","level":2,"score":0.5781253576278687},{"id":"https://openalex.org/C118524514","wikidata":"https://www.wikidata.org/wiki/Q173212","display_name":"Computer architecture","level":1,"score":0.45492783188819885},{"id":"https://openalex.org/C118021083","wikidata":"https://www.wikidata.org/wiki/Q610398","display_name":"System on a chip","level":2,"score":0.4204868674278259},{"id":"https://openalex.org/C149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","level":1,"score":0.23242107033729553},{"id":"https://openalex.org/C76155785","wikidata":"https://www.wikidata.org/wiki/Q418","display_name":"Telecommunications","level":1,"score":0.11058619618415833},{"id":"https://openalex.org/C41895202","wikidata":"https://www.wikidata.org/wiki/Q8162","display_name":"Linguistics","level":1,"score":0.08411484956741333},{"id":"https://openalex.org/C138885662","wikidata":"https://www.wikidata.org/wiki/Q5891","display_name":"Philosophy","level":0,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/ijcnn.2004.1380863","is_oa":false,"landing_page_url":"https://doi.org/10.1109/ijcnn.2004.1380863","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2004 IEEE International Joint Conference on Neural Networks (IEEE Cat. No.04CH37541)","raw_type":"proceedings-article"}],"best_oa_location":null,"sustainable_development_goals":[],"awards":[],"funders":[],"has_content":{"pdf":false,"grobid_xml":false},"content_urls":null,"referenced_works_count":14,"referenced_works":["https://openalex.org/W1770749371","https://openalex.org/W1880474171","https://openalex.org/W1897358947","https://openalex.org/W2026302983","https://openalex.org/W2079182758","https://openalex.org/W2085779969","https://openalex.org/W2098085676","https://openalex.org/W2099707809","https://openalex.org/W2104305626","https://openalex.org/W2107683532","https://openalex.org/W2116064496","https://openalex.org/W2123969927","https://openalex.org/W2130313186","https://openalex.org/W6675780011"],"related_works":["https://openalex.org/W2098218272","https://openalex.org/W2134640991","https://openalex.org/W3027318491","https://openalex.org/W1979789826","https://openalex.org/W1986774039","https://openalex.org/W4244547561","https://openalex.org/W2065289416","https://openalex.org/W2502691491","https://openalex.org/W2017236304","https://openalex.org/W2115579119"],"abstract_inverted_index":{"We":[0],"have":[1],"mapped":[2],"the":[3,9],"contrastive":[4],"divergence":[5],"learning":[6,39],"scheme":[7],"of":[8,11],"product":[10],"experts":[12],"(PoE)":[13],"onto":[14],"electrical":[15],"circuits.":[16],"The":[17,37],"issues":[18],"raised":[19],"during":[20],"that":[21],"hardware":[22],"translation":[23],"are":[24,35,60],"discussed":[25],"in":[26,43],"This":[27],"work":[28],"and":[29,58],"some":[30],"circuits":[31],"presenting":[32],"our":[33,56],"solutions":[34],"described.":[36],"entire":[38],"rule":[40],"is":[41],"implemented":[42],"mixed-signal":[44],"VLSI":[45],"on":[46],"a":[47],"0.6":[48],"/spl":[49],"mu/m":[50],"CMOS":[51],"process.":[52],"Chips":[53],"results":[54],"validating":[55],"approach":[57],"methodology":[59],"also":[61],"presented.":[62]},"counts_by_year":[],"updated_date":"2025-11-06T03:46:38.306776","created_date":"2025-10-10T00:00:00"}