{"id":"https://openalex.org/W2106122737","doi":"https://doi.org/10.1109/igcc.2011.6008601","title":"Sequence pair based voltage island floorplanning","display_name":"Sequence pair based voltage island floorplanning","publication_year":2011,"publication_date":"2011-07-01","ids":{"openalex":"https://openalex.org/W2106122737","doi":"https://doi.org/10.1109/igcc.2011.6008601","mag":"2106122737"},"language":"en","primary_location":{"id":"doi:10.1109/igcc.2011.6008601","is_oa":false,"landing_page_url":"https://doi.org/10.1109/igcc.2011.6008601","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2011 International Green Computing Conference and Workshops","raw_type":"proceedings-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5084943434","display_name":"Dipanjan Sengupta","orcid":null},"institutions":[{"id":"https://openalex.org/I185261750","display_name":"University of Toronto","ror":"https://ror.org/03dbr7087","country_code":"CA","type":"education","lineage":["https://openalex.org/I185261750"]}],"countries":["CA"],"is_corresponding":true,"raw_author_name":"Dipanjan Sengupta","raw_affiliation_strings":["ECE Department, University of Toronto, Toronto, ONT, Canada","University of Toronto, ECE Department, ON M5S 3G4, Canada"],"affiliations":[{"raw_affiliation_string":"ECE Department, University of Toronto, Toronto, ONT, Canada","institution_ids":["https://openalex.org/I185261750"]},{"raw_affiliation_string":"University of Toronto, ECE Department, ON M5S 3G4, Canada","institution_ids":["https://openalex.org/I185261750"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5009841786","display_name":"Andreas Veneris","orcid":"https://orcid.org/0000-0002-6309-8821"},"institutions":[{"id":"https://openalex.org/I185261750","display_name":"University of Toronto","ror":"https://ror.org/03dbr7087","country_code":"CA","type":"education","lineage":["https://openalex.org/I185261750"]}],"countries":["CA"],"is_corresponding":false,"raw_author_name":"Andreas Veneris","raw_affiliation_strings":["ECE Department, University of Toronto, Toronto, ONT, Canada","University of Toronto, ECE Department, ON M5S 3G4, Canada"],"affiliations":[{"raw_affiliation_string":"ECE Department, University of Toronto, Toronto, ONT, Canada","institution_ids":["https://openalex.org/I185261750"]},{"raw_affiliation_string":"University of Toronto, ECE Department, ON M5S 3G4, Canada","institution_ids":["https://openalex.org/I185261750"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5013246362","display_name":"Steven J. E. Wilton","orcid":"https://orcid.org/0000-0002-1241-6690"},"institutions":[{"id":"https://openalex.org/I141945490","display_name":"University of British Columbia","ror":"https://ror.org/03rmrcq20","country_code":"CA","type":"education","lineage":["https://openalex.org/I141945490"]}],"countries":["CA"],"is_corresponding":false,"raw_author_name":"Steve Wilton","raw_affiliation_strings":["ECE Department, University of British Columbia, Vancouver, BC, Canada","University of British Columbia, ECE Department, Vancouver, V6T 1Z4, Canada"],"affiliations":[{"raw_affiliation_string":"ECE Department, University of British Columbia, Vancouver, BC, Canada","institution_ids":["https://openalex.org/I141945490"]},{"raw_affiliation_string":"University of British Columbia, ECE Department, Vancouver, V6T 1Z4, Canada","institution_ids":["https://openalex.org/I141945490"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5062724257","display_name":"A. Ivanov","orcid":"https://orcid.org/0000-0002-0882-6750"},"institutions":[{"id":"https://openalex.org/I141945490","display_name":"University of British Columbia","ror":"https://ror.org/03rmrcq20","country_code":"CA","type":"education","lineage":["https://openalex.org/I141945490"]}],"countries":["CA"],"is_corresponding":false,"raw_author_name":"Andre Ivanov","raw_affiliation_strings":["ECE Department, University of British Columbia, Vancouver, BC, Canada","University of British Columbia, ECE Department, Vancouver, V6T 1Z4, Canada"],"affiliations":[{"raw_affiliation_string":"ECE Department, University of British Columbia, Vancouver, BC, Canada","institution_ids":["https://openalex.org/I141945490"]},{"raw_affiliation_string":"University of British Columbia, ECE Department, Vancouver, V6T 1Z4, Canada","institution_ids":["https://openalex.org/I141945490"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5110200528","display_name":"Res Saleh","orcid":null},"institutions":[{"id":"https://openalex.org/I141945490","display_name":"University of British Columbia","ror":"https://ror.org/03rmrcq20","country_code":"CA","type":"education","lineage":["https://openalex.org/I141945490"]}],"countries":["CA"],"is_corresponding":false,"raw_author_name":"Res Saleh","raw_affiliation_strings":["ECE Department, University of British Columbia, Vancouver, BC, Canada","University of British Columbia, ECE Department, Vancouver, V6T 1Z4, Canada"],"affiliations":[{"raw_affiliation_string":"ECE Department, University of British Columbia, Vancouver, BC, Canada","institution_ids":["https://openalex.org/I141945490"]},{"raw_affiliation_string":"University of British Columbia, ECE Department, Vancouver, V6T 1Z4, Canada","institution_ids":["https://openalex.org/I141945490"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":5,"corresponding_author_ids":["https://openalex.org/A5084943434"],"corresponding_institution_ids":["https://openalex.org/I185261750"],"apc_list":null,"apc_paid":null,"fwci":0.2702,"has_fulltext":false,"cited_by_count":11,"citation_normalized_percentile":{"value":0.63492103,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":{"min":89,"max":96},"biblio":{"volume":"2005","issue":null,"first_page":"1","last_page":"6"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10363","display_name":"Low-power high-performance VLSI design","score":0.9998999834060669,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10363","display_name":"Low-power high-performance VLSI design","score":0.9998999834060669,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11522","display_name":"VLSI and FPGA Design Techniques","score":0.9998999834060669,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11032","display_name":"VLSI and Analog Circuit Testing","score":0.9968000054359436,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/floorplan","display_name":"Floorplan","score":0.9800057411193848},{"id":"https://openalex.org/keywords/voltage","display_name":"Voltage","score":0.6923056840896606},{"id":"https://openalex.org/keywords/chip","display_name":"Chip","score":0.6209821701049805},{"id":"https://openalex.org/keywords/overhead","display_name":"Overhead (engineering)","score":0.6153034567832947},{"id":"https://openalex.org/keywords/integrated-circuit-layout","display_name":"Integrated circuit layout","score":0.6100075244903564},{"id":"https://openalex.org/keywords/very-large-scale-integration","display_name":"Very-large-scale integration","score":0.57928466796875},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.5552536249160767},{"id":"https://openalex.org/keywords/block","display_name":"Block (permutation group theory)","score":0.5257064700126648},{"id":"https://openalex.org/keywords/power","display_name":"Power (physics)","score":0.43842944502830505},{"id":"https://openalex.org/keywords/integrated-circuit-design","display_name":"Integrated circuit design","score":0.4263712763786316},{"id":"https://openalex.org/keywords/electronic-engineering","display_name":"Electronic engineering","score":0.4197220504283905},{"id":"https://openalex.org/keywords/engineering","display_name":"Engineering","score":0.3205640912055969},{"id":"https://openalex.org/keywords/electrical-engineering","display_name":"Electrical engineering","score":0.30564936995506287},{"id":"https://openalex.org/keywords/integrated-circuit","display_name":"Integrated circuit","score":0.28474128246307373},{"id":"https://openalex.org/keywords/embedded-system","display_name":"Embedded system","score":0.265320748090744},{"id":"https://openalex.org/keywords/telecommunications","display_name":"Telecommunications","score":0.08355814218521118},{"id":"https://openalex.org/keywords/mathematics","display_name":"Mathematics","score":0.0729275643825531}],"concepts":[{"id":"https://openalex.org/C130145326","wikidata":"https://www.wikidata.org/wiki/Q1553985","display_name":"Floorplan","level":2,"score":0.9800057411193848},{"id":"https://openalex.org/C165801399","wikidata":"https://www.wikidata.org/wiki/Q25428","display_name":"Voltage","level":2,"score":0.6923056840896606},{"id":"https://openalex.org/C165005293","wikidata":"https://www.wikidata.org/wiki/Q1074500","display_name":"Chip","level":2,"score":0.6209821701049805},{"id":"https://openalex.org/C2779960059","wikidata":"https://www.wikidata.org/wiki/Q7113681","display_name":"Overhead (engineering)","level":2,"score":0.6153034567832947},{"id":"https://openalex.org/C2765594","wikidata":"https://www.wikidata.org/wiki/Q2624187","display_name":"Integrated circuit layout","level":3,"score":0.6100075244903564},{"id":"https://openalex.org/C14580979","wikidata":"https://www.wikidata.org/wiki/Q876049","display_name":"Very-large-scale integration","level":2,"score":0.57928466796875},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.5552536249160767},{"id":"https://openalex.org/C2777210771","wikidata":"https://www.wikidata.org/wiki/Q4927124","display_name":"Block (permutation group theory)","level":2,"score":0.5257064700126648},{"id":"https://openalex.org/C163258240","wikidata":"https://www.wikidata.org/wiki/Q25342","display_name":"Power (physics)","level":2,"score":0.43842944502830505},{"id":"https://openalex.org/C74524168","wikidata":"https://www.wikidata.org/wiki/Q1074539","display_name":"Integrated circuit design","level":2,"score":0.4263712763786316},{"id":"https://openalex.org/C24326235","wikidata":"https://www.wikidata.org/wiki/Q126095","display_name":"Electronic engineering","level":1,"score":0.4197220504283905},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.3205640912055969},{"id":"https://openalex.org/C119599485","wikidata":"https://www.wikidata.org/wiki/Q43035","display_name":"Electrical engineering","level":1,"score":0.30564936995506287},{"id":"https://openalex.org/C530198007","wikidata":"https://www.wikidata.org/wiki/Q80831","display_name":"Integrated circuit","level":2,"score":0.28474128246307373},{"id":"https://openalex.org/C149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","level":1,"score":0.265320748090744},{"id":"https://openalex.org/C76155785","wikidata":"https://www.wikidata.org/wiki/Q418","display_name":"Telecommunications","level":1,"score":0.08355814218521118},{"id":"https://openalex.org/C33923547","wikidata":"https://www.wikidata.org/wiki/Q395","display_name":"Mathematics","level":0,"score":0.0729275643825531},{"id":"https://openalex.org/C121332964","wikidata":"https://www.wikidata.org/wiki/Q413","display_name":"Physics","level":0,"score":0.0},{"id":"https://openalex.org/C2524010","wikidata":"https://www.wikidata.org/wiki/Q8087","display_name":"Geometry","level":1,"score":0.0},{"id":"https://openalex.org/C62520636","wikidata":"https://www.wikidata.org/wiki/Q944","display_name":"Quantum mechanics","level":1,"score":0.0}],"mesh":[],"locations_count":2,"locations":[{"id":"doi:10.1109/igcc.2011.6008601","is_oa":false,"landing_page_url":"https://doi.org/10.1109/igcc.2011.6008601","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2011 International Green Computing Conference and Workshops","raw_type":"proceedings-article"},{"id":"pmh:oai:CiteSeerX.psu:10.1.1.228.3326","is_oa":false,"landing_page_url":"http://citeseerx.ist.psu.edu/viewdoc/summary?doi=10.1.1.228.3326","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"submittedVersion","is_accepted":false,"is_published":false,"raw_source_name":"http://www.eecg.utoronto.ca/%7Eveneris/igcc11.pdf","raw_type":"text"}],"best_oa_location":null,"sustainable_development_goals":[],"awards":[],"funders":[],"has_content":{"grobid_xml":false,"pdf":false},"content_urls":null,"referenced_works_count":28,"referenced_works":["https://openalex.org/W1483017465","https://openalex.org/W1967985871","https://openalex.org/W2007916227","https://openalex.org/W2060898124","https://openalex.org/W2082348718","https://openalex.org/W2095550547","https://openalex.org/W2098143668","https://openalex.org/W2110514755","https://openalex.org/W2110721922","https://openalex.org/W2113451265","https://openalex.org/W2114772983","https://openalex.org/W2139524433","https://openalex.org/W2154462472","https://openalex.org/W2156974682","https://openalex.org/W2164251937","https://openalex.org/W2166295488","https://openalex.org/W2168300107","https://openalex.org/W2168908650","https://openalex.org/W2169082930","https://openalex.org/W4236940316","https://openalex.org/W4238088618","https://openalex.org/W4238906052","https://openalex.org/W4238954159","https://openalex.org/W4240309467","https://openalex.org/W4242812063","https://openalex.org/W4250230299","https://openalex.org/W6676809168","https://openalex.org/W6684805869"],"related_works":["https://openalex.org/W2899084033","https://openalex.org/W2110276530","https://openalex.org/W2150722449","https://openalex.org/W2138401961","https://openalex.org/W2077973709","https://openalex.org/W2086461565","https://openalex.org/W2206836185","https://openalex.org/W2067418616","https://openalex.org/W2115502122","https://openalex.org/W2138433944"],"abstract_inverted_index":{"In":[0,88],"the":[1,39,75,99,108,113,121,131,136,146,149,152,158,164,168,179],"nanometer":[2],"era":[3],"of":[4,110,130,138,148,167],"VLSI":[5],"design,":[6],"high":[7],"power":[8,127,182],"consumption":[9],"is":[10],"considered":[11],"to":[12,45,57,61,84,125,141,155],"be":[13,58],"a":[14,25,70,93],"\u201cshow-stopper\u201d":[15],"for":[16,28,118,185],"many":[17],"applications.":[18],"Voltage":[19],"Island":[20],"design":[21,82],"has":[22],"emerged":[23],"as":[24],"popular":[26],"method":[27],"addressing":[29],"this":[30,89],"issue.":[31],"This":[32],"technique":[33],"requires":[34],"multiple":[35],"supply":[36,47,55,72,115,143],"voltages":[37,56,144],"on":[38,98,161],"same":[40],"chip":[41,169],"with":[42,53,172],"blocks":[43,52,106,140,150],"assigned":[44],"different":[46,142,186],"voltages.":[48],"Implementation":[49],"challenges":[50],"force":[51],"similar":[54],"placed":[59],"contiguous":[60],"one":[62],"another,":[63],"thereby":[64],"creating":[65],"\u201cislands\u201d.":[66],"Classical":[67],"floorplanners":[68],"assume":[69],"single":[71],"voltage":[73,86,116],"in":[74,107,151],"entire":[76],"SoC":[77],"and":[78,128,145,183],"thus":[79],"require":[80],"additional":[81],"steps":[83],"realize":[85],"islands.":[87,111],"paper":[90],"we":[91,177],"present":[92],"new":[94],"floorplanning":[95],"algorithm":[96],"based":[97],"sequence":[100],"pair":[101],"representation":[102],"that":[103],"can":[104],"floorplan":[105,187],"form":[109],"Given":[112],"possible":[114],"choices":[117],"each":[119],"block,":[120],"floorplanner":[122,134,160],"simultaneously":[123],"attempts":[124],"reduce":[126],"area":[129,165,184],"chip.":[132,153],"Our":[133],"integrates":[135],"tasks":[137],"assigning":[139],"placing":[147],"Compared":[154],"previous":[156],"work,":[157],"proposed":[159],"average":[162],"reduces":[163],"overhead":[166],"by":[170],"13.5%":[171],"34%":[173],"runtime":[174],"improvement.":[175],"Additionally":[176],"explore":[178],"tradeoff":[180],"between":[181],"solutions.":[188]},"counts_by_year":[{"year":2023,"cited_by_count":2},{"year":2022,"cited_by_count":1},{"year":2018,"cited_by_count":2},{"year":2017,"cited_by_count":2},{"year":2016,"cited_by_count":1},{"year":2015,"cited_by_count":2},{"year":2013,"cited_by_count":1}],"updated_date":"2026-04-05T17:49:38.594831","created_date":"2025-10-10T00:00:00"}