{"id":"https://openalex.org/W7140573993","doi":"https://doi.org/10.1109/ieeeconf67917.2025.11443674","title":"Enhancing Channel Decoding Through Full-Custom Hardware Design","display_name":"Enhancing Channel Decoding Through Full-Custom Hardware Design","publication_year":2025,"publication_date":"2025-10-26","ids":{"openalex":"https://openalex.org/W7140573993","doi":"https://doi.org/10.1109/ieeeconf67917.2025.11443674"},"language":null,"primary_location":{"id":"doi:10.1109/ieeeconf67917.2025.11443674","is_oa":false,"landing_page_url":"https://doi.org/10.1109/ieeeconf67917.2025.11443674","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2025 59th Asilomar Conference on Signals, Systems, and Computers","raw_type":"proceedings-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5106929836","display_name":"Ludovic Damien Blanc","orcid":"https://orcid.org/0009-0009-0548-9005"},"institutions":[{"id":"https://openalex.org/I5124864","display_name":"\u00c9cole Polytechnique F\u00e9d\u00e9rale de Lausanne","ror":"https://ror.org/02s376052","country_code":"CH","type":"education","lineage":["https://openalex.org/I2799323385","https://openalex.org/I5124864"]}],"countries":["CH"],"is_corresponding":true,"raw_author_name":"Ludovic D. Blanc","raw_affiliation_strings":["École Polytechnique Fédérale de Lausanne,Telecommunication Circuits Laboratory,Switzerland"],"affiliations":[{"raw_affiliation_string":"École Polytechnique Fédérale de Lausanne,Telecommunication Circuits Laboratory,Switzerland","institution_ids":["https://openalex.org/I5124864"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5004640121","display_name":"Alessandro Cardinale","orcid":null},"institutions":[{"id":"https://openalex.org/I5124864","display_name":"\u00c9cole Polytechnique F\u00e9d\u00e9rale de Lausanne","ror":"https://ror.org/02s376052","country_code":"CH","type":"education","lineage":["https://openalex.org/I2799323385","https://openalex.org/I5124864"]}],"countries":["CH"],"is_corresponding":false,"raw_author_name":"Alessandro Cardinale","raw_affiliation_strings":["École Polytechnique Fédérale de Lausanne,Telecommunication Circuits Laboratory,Switzerland"],"affiliations":[{"raw_affiliation_string":"École Polytechnique Fédérale de Lausanne,Telecommunication Circuits Laboratory,Switzerland","institution_ids":["https://openalex.org/I5124864"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5035766448","display_name":"Wenqing Song","orcid":"https://orcid.org/0000-0002-8806-8717"},"institutions":[{"id":"https://openalex.org/I5124864","display_name":"\u00c9cole Polytechnique F\u00e9d\u00e9rale de Lausanne","ror":"https://ror.org/02s376052","country_code":"CH","type":"education","lineage":["https://openalex.org/I2799323385","https://openalex.org/I5124864"]}],"countries":["CH"],"is_corresponding":false,"raw_author_name":"Wenqing Song","raw_affiliation_strings":["École Polytechnique Fédérale de Lausanne,Telecommunication Circuits Laboratory,Switzerland"],"affiliations":[{"raw_affiliation_string":"École Polytechnique Fédérale de Lausanne,Telecommunication Circuits Laboratory,Switzerland","institution_ids":["https://openalex.org/I5124864"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5101694397","display_name":"Yifei Shen","orcid":"https://orcid.org/0000-0003-4745-9145"},"institutions":[{"id":"https://openalex.org/I5124864","display_name":"\u00c9cole Polytechnique F\u00e9d\u00e9rale de Lausanne","ror":"https://ror.org/02s376052","country_code":"CH","type":"education","lineage":["https://openalex.org/I2799323385","https://openalex.org/I5124864"]}],"countries":["CH"],"is_corresponding":false,"raw_author_name":"Yifei Shen","raw_affiliation_strings":["École Polytechnique Fédérale de Lausanne,Telecommunication Circuits Laboratory,Switzerland"],"affiliations":[{"raw_affiliation_string":"École Polytechnique Fédérale de Lausanne,Telecommunication Circuits Laboratory,Switzerland","institution_ids":["https://openalex.org/I5124864"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5090996622","display_name":"Christoph Muller","orcid":null},"institutions":[{"id":"https://openalex.org/I5124864","display_name":"\u00c9cole Polytechnique F\u00e9d\u00e9rale de Lausanne","ror":"https://ror.org/02s376052","country_code":"CH","type":"education","lineage":["https://openalex.org/I2799323385","https://openalex.org/I5124864"]}],"countries":["CH"],"is_corresponding":false,"raw_author_name":"Christoph M\u00fcller","raw_affiliation_strings":["École Polytechnique Fédérale de Lausanne,Telecommunication Circuits Laboratory,Switzerland"],"affiliations":[{"raw_affiliation_string":"École Polytechnique Fédérale de Lausanne,Telecommunication Circuits Laboratory,Switzerland","institution_ids":["https://openalex.org/I5124864"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5059133771","display_name":"Andreas Burg","orcid":"https://orcid.org/0000-0002-7270-5558"},"institutions":[{"id":"https://openalex.org/I5124864","display_name":"\u00c9cole Polytechnique F\u00e9d\u00e9rale de Lausanne","ror":"https://ror.org/02s376052","country_code":"CH","type":"education","lineage":["https://openalex.org/I2799323385","https://openalex.org/I5124864"]}],"countries":["CH"],"is_corresponding":false,"raw_author_name":"Andreas Burg","raw_affiliation_strings":["École Polytechnique Fédérale de Lausanne,Telecommunication Circuits Laboratory,Switzerland"],"affiliations":[{"raw_affiliation_string":"École Polytechnique Fédérale de Lausanne,Telecommunication Circuits Laboratory,Switzerland","institution_ids":["https://openalex.org/I5124864"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":6,"corresponding_author_ids":["https://openalex.org/A5106929836"],"corresponding_institution_ids":["https://openalex.org/I5124864"],"apc_list":null,"apc_paid":null,"fwci":0.0,"has_fulltext":false,"cited_by_count":0,"citation_normalized_percentile":{"value":0.67383648,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":null,"biblio":{"volume":null,"issue":null,"first_page":"1750","last_page":"1754"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10363","display_name":"Low-power high-performance VLSI design","score":0.36579999327659607,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10363","display_name":"Low-power high-performance VLSI design","score":0.36579999327659607,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10904","display_name":"Embedded Systems Design Techniques","score":0.07840000092983246,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10125","display_name":"Advanced Wireless Communication Techniques","score":0.06840000301599503,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/decoding-methods","display_name":"Decoding methods","score":0.5647000074386597},{"id":"https://openalex.org/keywords/channel","display_name":"Channel (broadcasting)","score":0.47040000557899475},{"id":"https://openalex.org/keywords/encoding","display_name":"Encoding (memory)","score":0.34450000524520874},{"id":"https://openalex.org/keywords/key","display_name":"Key (lock)","score":0.3127000033855438},{"id":"https://openalex.org/keywords/circuit-design","display_name":"Circuit design","score":0.2912999987602234}],"concepts":[{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.6301000118255615},{"id":"https://openalex.org/C57273362","wikidata":"https://www.wikidata.org/wiki/Q576722","display_name":"Decoding methods","level":2,"score":0.5647000074386597},{"id":"https://openalex.org/C9390403","wikidata":"https://www.wikidata.org/wiki/Q3966","display_name":"Computer hardware","level":1,"score":0.5570999979972839},{"id":"https://openalex.org/C127162648","wikidata":"https://www.wikidata.org/wiki/Q16858953","display_name":"Channel (broadcasting)","level":2,"score":0.47040000557899475},{"id":"https://openalex.org/C149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","level":1,"score":0.3871000111103058},{"id":"https://openalex.org/C125411270","wikidata":"https://www.wikidata.org/wiki/Q18653","display_name":"Encoding (memory)","level":2,"score":0.34450000524520874},{"id":"https://openalex.org/C26517878","wikidata":"https://www.wikidata.org/wiki/Q228039","display_name":"Key (lock)","level":2,"score":0.3127000033855438},{"id":"https://openalex.org/C190560348","wikidata":"https://www.wikidata.org/wiki/Q3245116","display_name":"Circuit design","level":2,"score":0.2912999987602234},{"id":"https://openalex.org/C99498987","wikidata":"https://www.wikidata.org/wiki/Q2210247","display_name":"Noise (video)","level":3,"score":0.2872999906539917},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.2831999957561493},{"id":"https://openalex.org/C530198007","wikidata":"https://www.wikidata.org/wiki/Q80831","display_name":"Integrated circuit","level":2,"score":0.25440001487731934}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/ieeeconf67917.2025.11443674","is_oa":false,"landing_page_url":"https://doi.org/10.1109/ieeeconf67917.2025.11443674","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2025 59th Asilomar Conference on Signals, Systems, and Computers","raw_type":"proceedings-article"}],"best_oa_location":null,"sustainable_development_goals":[],"awards":[],"funders":[],"has_content":{"pdf":false,"grobid_xml":false},"content_urls":null,"referenced_works_count":17,"referenced_works":["https://openalex.org/W2106045225","https://openalex.org/W2137813581","https://openalex.org/W2141389982","https://openalex.org/W2156938362","https://openalex.org/W2588191434","https://openalex.org/W2802559652","https://openalex.org/W2997799346","https://openalex.org/W3059813204","https://openalex.org/W3162667157","https://openalex.org/W3212772463","https://openalex.org/W4253300605","https://openalex.org/W4293025042","https://openalex.org/W4396982322","https://openalex.org/W4403677349","https://openalex.org/W4404788572","https://openalex.org/W4410492443","https://openalex.org/W4410738567"],"related_works":[],"abstract_inverted_index":{"Forward":[0],"error":[1],"correction":[2],"(FEC)":[3],"codes":[4],"are":[5,37,66,135],"essential":[6],"components":[7],"of":[8,23,46,54,131],"both":[9],"wired":[10],"and":[11,40,48,109,115,124],"wireless":[12],"communication":[13,25],"systems.":[14],"High-throughput":[15],"decoding":[16],"is":[17],"necessary":[18],"to":[19,42,105],"meet":[20],"the":[21,52,55,91,95],"demands":[22],"modern":[24],"links":[26],"operating":[27],"at":[28],"multiple":[29],"gigabits":[30],"per":[31],"second.":[32],"However,":[33],"these":[34,61],"advanced":[35,57],"algorithms":[36],"often":[38,88],"complex":[39],"costly":[41],"implement":[43],"in":[44,138],"terms":[45],"power":[47,97],"area,":[49],"which":[50],"pushes":[51],"limits":[53],"most":[56],"technology":[58],"nodes.":[59],"Traditionally,":[60],"demanding":[62],"signal":[63],"processing":[64],"tasks":[65],"realized":[67],"using":[68],"semi-custom,":[69],"synchronous":[70],"design":[71,81,110],"principles":[72],"with":[73],"hardware":[74],"description":[75],"languages":[76],"(HDLs),":[77],"synthesized":[78],"through":[79],"electronic":[80],"automation":[82],"(EDA)":[83],"tools.":[84],"This":[85],"conservative":[86],"approach":[87],"cannot":[89],"achieve":[90],"highest":[92],"performance":[93],"or":[94],"lowest":[96],"consumption.":[98],"To":[99],"address":[100],"this":[101],"challenge,":[102],"we":[103],"propose":[104],"use":[106],"alternative":[107],"circuit":[108],"paradigms":[111],"based":[112],"on":[113],"full-custom":[114],"mixed-signal":[116],"techniques":[117],"for":[118],"critical":[119],"blocks.":[120],"We":[121],"present":[122],"sorters":[123],"parallel":[125],"syndrome":[126],"checks":[127],"(SCs)":[128],"as":[129],"examples":[130],"such":[132],"blocks":[133],"that":[134],"used":[136],"frequently":[137],"FEC.":[139]},"counts_by_year":[],"updated_date":"2026-03-28T06:11:35.319607","created_date":"2026-03-27T00:00:00"}