{"id":"https://openalex.org/W2907756718","doi":"https://doi.org/10.1109/iecon.2018.8591619","title":"384 TMAC/s FIR filtering on an Artix-7 FPGA using Prism signal processing","display_name":"384 TMAC/s FIR filtering on an Artix-7 FPGA using Prism signal processing","publication_year":2018,"publication_date":"2018-10-01","ids":{"openalex":"https://openalex.org/W2907756718","doi":"https://doi.org/10.1109/iecon.2018.8591619","mag":"2907756718"},"language":"en","primary_location":{"id":"doi:10.1109/iecon.2018.8591619","is_oa":false,"landing_page_url":"https://doi.org/10.1109/iecon.2018.8591619","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"IECON 2018 - 44th Annual Conference of the IEEE Industrial Electronics Society","raw_type":"proceedings-article"},"type":"conference-paper","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5006058405","display_name":"John Owen","orcid":null},"institutions":[],"countries":[],"is_corresponding":false,"raw_author_name":"John Owen","raw_affiliation_strings":["Entegra Solutions Ltd, Guildford, UK"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Entegra Solutions Ltd, Guildford, UK","institution_ids":[]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5073723674","display_name":"Manus Henry","orcid":"https://orcid.org/0000-0002-9677-1234"},"institutions":[{"id":"https://openalex.org/I40120149","display_name":"University of Oxford","ror":"https://ror.org/052gg0110","country_code":"GB","type":"education","lineage":["https://openalex.org/I40120149"]},{"id":"https://openalex.org/I4210146410","display_name":"Science Oxford","ror":"https://ror.org/04j8yhy50","country_code":"GB","type":"nonprofit","lineage":["https://openalex.org/I4210146410"]}],"countries":["GB"],"is_corresponding":false,"raw_author_name":"Manus Henry","raw_affiliation_strings":["Department of Engineering, Science University of Oxford, Oxford, UK"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Department of Engineering, Science University of Oxford, Oxford, UK","institution_ids":["https://openalex.org/I40120149","https://openalex.org/I4210146410"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":2,"corresponding_author_ids":[],"corresponding_institution_ids":[],"apc_list":null,"apc_paid":null,"fwci":1.4432,"has_fulltext":false,"cited_by_count":9,"citation_normalized_percentile":{"value":0.84096447,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":{"min":90,"max":97},"biblio":{"volume":null,"issue":null,"first_page":"2659","last_page":"2664"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T11034","display_name":"Digital Filter Design and Implementation","score":0.9993000030517578,"subfield":{"id":"https://openalex.org/subfields/1711","display_name":"Signal Processing"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T11034","display_name":"Digital Filter Design and Implementation","score":0.9993000030517578,"subfield":{"id":"https://openalex.org/subfields/1711","display_name":"Signal Processing"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11233","display_name":"Advanced Adaptive Filtering Techniques","score":0.9993000030517578,"subfield":{"id":"https://openalex.org/subfields/2206","display_name":"Computational Mechanics"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10323","display_name":"Analog and Mixed-Signal Circuit Design","score":0.9973999857902527,"subfield":{"id":"https://openalex.org/subfields/2204","display_name":"Biomedical Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/finite-impulse-response","display_name":"Finite impulse response","score":0.7676473259925842},{"id":"https://openalex.org/keywords/field-programmable-gate-array","display_name":"Field-programmable gate array","score":0.7407959699630737},{"id":"https://openalex.org/keywords/digital-signal-processing","display_name":"Digital signal processing","score":0.7056735157966614},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.6363427042961121},{"id":"https://openalex.org/keywords/signal-processing","display_name":"Signal processing","score":0.5313924551010132},{"id":"https://openalex.org/keywords/filter","display_name":"Filter (signal processing)","score":0.5128624439239502},{"id":"https://openalex.org/keywords/signal","display_name":"SIGNAL (programming language)","score":0.4796181619167328},{"id":"https://openalex.org/keywords/computer-hardware","display_name":"Computer hardware","score":0.45019131898880005},{"id":"https://openalex.org/keywords/electronic-engineering","display_name":"Electronic engineering","score":0.34083521366119385},{"id":"https://openalex.org/keywords/algorithm","display_name":"Algorithm","score":0.2444593608379364},{"id":"https://openalex.org/keywords/engineering","display_name":"Engineering","score":0.16747817397117615}],"concepts":[{"id":"https://openalex.org/C198386975","wikidata":"https://www.wikidata.org/wiki/Q117785","display_name":"Finite impulse response","level":2,"score":0.7676473259925842},{"id":"https://openalex.org/C42935608","wikidata":"https://www.wikidata.org/wiki/Q190411","display_name":"Field-programmable gate array","level":2,"score":0.7407959699630737},{"id":"https://openalex.org/C84462506","wikidata":"https://www.wikidata.org/wiki/Q173142","display_name":"Digital signal processing","level":2,"score":0.7056735157966614},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.6363427042961121},{"id":"https://openalex.org/C104267543","wikidata":"https://www.wikidata.org/wiki/Q208163","display_name":"Signal processing","level":3,"score":0.5313924551010132},{"id":"https://openalex.org/C106131492","wikidata":"https://www.wikidata.org/wiki/Q3072260","display_name":"Filter (signal processing)","level":2,"score":0.5128624439239502},{"id":"https://openalex.org/C2779843651","wikidata":"https://www.wikidata.org/wiki/Q7390335","display_name":"SIGNAL (programming language)","level":2,"score":0.4796181619167328},{"id":"https://openalex.org/C9390403","wikidata":"https://www.wikidata.org/wiki/Q3966","display_name":"Computer hardware","level":1,"score":0.45019131898880005},{"id":"https://openalex.org/C24326235","wikidata":"https://www.wikidata.org/wiki/Q126095","display_name":"Electronic engineering","level":1,"score":0.34083521366119385},{"id":"https://openalex.org/C11413529","wikidata":"https://www.wikidata.org/wiki/Q8366","display_name":"Algorithm","level":1,"score":0.2444593608379364},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.16747817397117615},{"id":"https://openalex.org/C199360897","wikidata":"https://www.wikidata.org/wiki/Q9143","display_name":"Programming language","level":1,"score":0.0},{"id":"https://openalex.org/C31972630","wikidata":"https://www.wikidata.org/wiki/Q844240","display_name":"Computer vision","level":1,"score":0.0}],"mesh":[],"locations_count":2,"locations":[{"id":"doi:10.1109/iecon.2018.8591619","is_oa":false,"landing_page_url":"https://doi.org/10.1109/iecon.2018.8591619","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"IECON 2018 - 44th Annual Conference of the IEEE Industrial Electronics Society","raw_type":"proceedings-article"},{"id":"pmh:oai:ora.ox.ac.uk:uuid:c0bfc13c-30c2-47ee-b392-d20b0b236c25","is_oa":false,"landing_page_url":"https://ora.ox.ac.uk/objects/uuid:c0bfc13c-30c2-47ee-b392-d20b0b236c25","pdf_url":null,"source":{"id":"https://openalex.org/S4306402636","display_name":"Oxford University Research Archive (ORA) (University of Oxford)","issn_l":null,"issn":null,"is_oa":false,"is_in_doaj":false,"is_core":false,"host_organization":"https://openalex.org/I40120149","host_organization_name":"University of Oxford","host_organization_lineage":["https://openalex.org/I40120149"],"host_organization_lineage_names":[],"type":"repository"},"license":null,"license_id":null,"version":"submittedVersion","is_accepted":false,"is_published":false,"raw_source_name":"","raw_type":"Conference item"}],"best_oa_location":null,"sustainable_development_goals":[{"score":0.46000000834465027,"display_name":"Industry, innovation and infrastructure","id":"https://metadata.un.org/sdg/9"}],"awards":[],"funders":[],"has_content":{"pdf":false,"grobid_xml":false},"content_urls":null,"referenced_works_count":11,"referenced_works":["https://openalex.org/W1579705346","https://openalex.org/W2025224408","https://openalex.org/W2043624659","https://openalex.org/W2109256542","https://openalex.org/W2113491138","https://openalex.org/W2127658432","https://openalex.org/W2282086183","https://openalex.org/W2760734766","https://openalex.org/W2778341865","https://openalex.org/W2883271082","https://openalex.org/W2911858876"],"related_works":["https://openalex.org/W1876592433","https://openalex.org/W2083269738","https://openalex.org/W4387951306","https://openalex.org/W2352374383","https://openalex.org/W1980880153","https://openalex.org/W4210376836","https://openalex.org/W4210925376","https://openalex.org/W1633995705","https://openalex.org/W2596211269","https://openalex.org/W197862639"],"abstract_inverted_index":{"The":[0],"Xilinx":[1],"Artix-7":[2,27],"family":[3],"of":[4,11,44,54,87,92],"FPGAs":[5],"has":[6,62],"a":[7,18,69,79],"peak":[8],"DSP":[9,56],"performance":[10,43],"approximately":[12],"1":[13],"TMAC/s.":[14],"This":[15,61],"paper":[16],"describes":[17],"floating":[19],"point":[20],"FIR":[21,72],"bandpass":[22],"filter":[23,89],"instantiation":[24],"on":[25,58],"an":[26,41],"with":[28],"up":[29,36,45],"to":[30,37,46],"192":[31],"million":[32],"taps,":[33],"updated":[34],"at":[35],"2":[38],"MHz,":[39],"delivering":[40],"equivalent":[42],"384":[47],"TMAC/s,":[48],"while":[49],"using":[50,65],"only":[51],"one":[52],"third":[53],"the":[55,59,84],"resources":[57],"FPGA.":[60],"been":[63],"achieved":[64],"Prism":[66],"signal":[67],"processing,":[68],"new":[70,88],"recursive":[71],"filtering":[73],"technique.":[74],"Filter":[75],"design":[76],"is":[77],"simple;":[78],"PC":[80],"host":[81],"HMI":[82],"facilitates":[83],"immediate":[85],"creation":[86],"implementations.":[90],"Examples":[91],"experimental":[93],"results":[94],"are":[95],"provided.":[96]},"counts_by_year":[{"year":2023,"cited_by_count":1},{"year":2021,"cited_by_count":3},{"year":2020,"cited_by_count":2},{"year":2019,"cited_by_count":2},{"year":2018,"cited_by_count":1}],"updated_date":"2026-07-29T14:22:42.915294","created_date":"2025-10-10T00:00:00"}
