{"id":"https://openalex.org/W2568712364","doi":"https://doi.org/10.1109/iecon.2016.7793886","title":"Towards LabVIEW and system on module for power electronics and drives control applications","display_name":"Towards LabVIEW and system on module for power electronics and drives control applications","publication_year":2016,"publication_date":"2016-10-01","ids":{"openalex":"https://openalex.org/W2568712364","doi":"https://doi.org/10.1109/iecon.2016.7793886","mag":"2568712364"},"language":"en","primary_location":{"id":"doi:10.1109/iecon.2016.7793886","is_oa":false,"landing_page_url":"https://doi.org/10.1109/iecon.2016.7793886","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"IECON 2016 - 42nd Annual Conference of the IEEE Industrial Electronics Society","raw_type":"proceedings-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5029689556","display_name":"Alessandro Lidozzi","orcid":"https://orcid.org/0000-0002-8706-8117"},"institutions":[],"countries":[],"is_corresponding":false,"raw_author_name":"A. Lidozzi","raw_affiliation_strings":["Department of Engineering, C-PED (Center for Power Electronics and Drives), Roma, Italy"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Department of Engineering, C-PED (Center for Power Electronics and Drives), Roma, Italy","institution_ids":[]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5038080136","display_name":"Marco Di Benedetto","orcid":"https://orcid.org/0000-0002-5914-5824"},"institutions":[],"countries":[],"is_corresponding":false,"raw_author_name":"M. Di Benedetto","raw_affiliation_strings":["Department of Engineering, C-PED (Center for Power Electronics and Drives), Roma, Italy"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Department of Engineering, C-PED (Center for Power Electronics and Drives), Roma, Italy","institution_ids":[]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5052692861","display_name":"V. Sabatini","orcid":"https://orcid.org/0000-0001-5616-9057"},"institutions":[],"countries":[],"is_corresponding":false,"raw_author_name":"V. Sabatini","raw_affiliation_strings":["Department of Engineering, C-PED (Center for Power Electronics and Drives), Roma, Italy"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Department of Engineering, C-PED (Center for Power Electronics and Drives), Roma, Italy","institution_ids":[]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5075209643","display_name":"Luca Solero","orcid":"https://orcid.org/0000-0001-8390-4627"},"institutions":[],"countries":[],"is_corresponding":false,"raw_author_name":"L. Solero","raw_affiliation_strings":["Department of Engineering, C-PED (Center for Power Electronics and Drives), Roma, Italy"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Department of Engineering, C-PED (Center for Power Electronics and Drives), Roma, Italy","institution_ids":[]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5003556622","display_name":"Fabio Crescimbini","orcid":"https://orcid.org/0000-0001-8598-1749"},"institutions":[],"countries":[],"is_corresponding":false,"raw_author_name":"F. Crescimbini","raw_affiliation_strings":["Department of Engineering, C-PED (Center for Power Electronics and Drives), Roma, Italy"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Department of Engineering, C-PED (Center for Power Electronics and Drives), Roma, Italy","institution_ids":[]}]}],"institutions":[],"countries_distinct_count":0,"institutions_distinct_count":5,"corresponding_author_ids":[],"corresponding_institution_ids":[],"apc_list":null,"apc_paid":null,"fwci":2.4303,"has_fulltext":false,"cited_by_count":22,"citation_normalized_percentile":{"value":0.89966613,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":{"min":90,"max":98},"biblio":{"volume":null,"issue":null,"first_page":"4995","last_page":"5000"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T12810","display_name":"Real-time simulation and control systems","score":0.9995999932289124,"subfield":{"id":"https://openalex.org/subfields/2207","display_name":"Control and Systems Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T12810","display_name":"Real-time simulation and control systems","score":0.9995999932289124,"subfield":{"id":"https://openalex.org/subfields/2207","display_name":"Control and Systems Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10904","display_name":"Embedded Systems Design Techniques","score":0.9955000281333923,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10504","display_name":"Sensorless Control of Electric Motors","score":0.995199978351593,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/field-programmable-gate-array","display_name":"Field-programmable gate array","score":0.7589580416679382},{"id":"https://openalex.org/keywords/vhdl","display_name":"VHDL","score":0.7533679008483887},{"id":"https://openalex.org/keywords/microprocessor","display_name":"Microprocessor","score":0.6867024898529053},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.6818912625312805},{"id":"https://openalex.org/keywords/verilog","display_name":"Verilog","score":0.6345477104187012},{"id":"https://openalex.org/keywords/embedded-system","display_name":"Embedded system","score":0.630685567855835},{"id":"https://openalex.org/keywords/power-electronics","display_name":"Power electronics","score":0.5655503869056702},{"id":"https://openalex.org/keywords/field","display_name":"Field (mathematics)","score":0.5333545207977295},{"id":"https://openalex.org/keywords/electronics","display_name":"Electronics","score":0.5155767798423767},{"id":"https://openalex.org/keywords/hardware-description-language","display_name":"Hardware description language","score":0.49974822998046875},{"id":"https://openalex.org/keywords/computer-hardware","display_name":"Computer hardware","score":0.43342095613479614},{"id":"https://openalex.org/keywords/control","display_name":"Control (management)","score":0.42455899715423584},{"id":"https://openalex.org/keywords/electrical-engineering","display_name":"Electrical engineering","score":0.22817683219909668},{"id":"https://openalex.org/keywords/engineering","display_name":"Engineering","score":0.22071212530136108}],"concepts":[{"id":"https://openalex.org/C42935608","wikidata":"https://www.wikidata.org/wiki/Q190411","display_name":"Field-programmable gate array","level":2,"score":0.7589580416679382},{"id":"https://openalex.org/C36941000","wikidata":"https://www.wikidata.org/wiki/Q209455","display_name":"VHDL","level":3,"score":0.7533679008483887},{"id":"https://openalex.org/C2780728072","wikidata":"https://www.wikidata.org/wiki/Q5297","display_name":"Microprocessor","level":2,"score":0.6867024898529053},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.6818912625312805},{"id":"https://openalex.org/C2779030575","wikidata":"https://www.wikidata.org/wiki/Q827773","display_name":"Verilog","level":3,"score":0.6345477104187012},{"id":"https://openalex.org/C149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","level":1,"score":0.630685567855835},{"id":"https://openalex.org/C178911571","wikidata":"https://www.wikidata.org/wiki/Q593143","display_name":"Power electronics","level":3,"score":0.5655503869056702},{"id":"https://openalex.org/C9652623","wikidata":"https://www.wikidata.org/wiki/Q190109","display_name":"Field (mathematics)","level":2,"score":0.5333545207977295},{"id":"https://openalex.org/C138331895","wikidata":"https://www.wikidata.org/wiki/Q11650","display_name":"Electronics","level":2,"score":0.5155767798423767},{"id":"https://openalex.org/C42143788","wikidata":"https://www.wikidata.org/wiki/Q173341","display_name":"Hardware description language","level":3,"score":0.49974822998046875},{"id":"https://openalex.org/C9390403","wikidata":"https://www.wikidata.org/wiki/Q3966","display_name":"Computer hardware","level":1,"score":0.43342095613479614},{"id":"https://openalex.org/C2775924081","wikidata":"https://www.wikidata.org/wiki/Q55608371","display_name":"Control (management)","level":2,"score":0.42455899715423584},{"id":"https://openalex.org/C119599485","wikidata":"https://www.wikidata.org/wiki/Q43035","display_name":"Electrical engineering","level":1,"score":0.22817683219909668},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.22071212530136108},{"id":"https://openalex.org/C202444582","wikidata":"https://www.wikidata.org/wiki/Q837863","display_name":"Pure mathematics","level":1,"score":0.0},{"id":"https://openalex.org/C33923547","wikidata":"https://www.wikidata.org/wiki/Q395","display_name":"Mathematics","level":0,"score":0.0},{"id":"https://openalex.org/C154945302","wikidata":"https://www.wikidata.org/wiki/Q11660","display_name":"Artificial intelligence","level":1,"score":0.0},{"id":"https://openalex.org/C165801399","wikidata":"https://www.wikidata.org/wiki/Q25428","display_name":"Voltage","level":2,"score":0.0}],"mesh":[],"locations_count":2,"locations":[{"id":"doi:10.1109/iecon.2016.7793886","is_oa":false,"landing_page_url":"https://doi.org/10.1109/iecon.2016.7793886","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"IECON 2016 - 42nd Annual Conference of the IEEE Industrial Electronics Society","raw_type":"proceedings-article"},{"id":"pmh:oai:iris.uniroma3.it:11590/311454","is_oa":false,"landing_page_url":"http://hdl.handle.net/11590/311454","pdf_url":null,"source":{"id":"https://openalex.org/S4377196120","display_name":"Iris (Roma Tre University)","issn_l":null,"issn":null,"is_oa":false,"is_in_doaj":false,"is_core":false,"host_organization":"https://openalex.org/I119003972","host_organization_name":"Roma Tre University","host_organization_lineage":["https://openalex.org/I119003972"],"host_organization_lineage_names":[],"type":"repository"},"license":null,"license_id":null,"version":"submittedVersion","is_accepted":false,"is_published":false,"raw_source_name":"","raw_type":"info:eu-repo/semantics/conferenceObject"}],"best_oa_location":null,"sustainable_development_goals":[],"awards":[],"funders":[],"has_content":{"pdf":false,"grobid_xml":false},"content_urls":null,"referenced_works_count":24,"referenced_works":["https://openalex.org/W1570141825","https://openalex.org/W1659155635","https://openalex.org/W1966329705","https://openalex.org/W1986039791","https://openalex.org/W2015936172","https://openalex.org/W2017826820","https://openalex.org/W2021058029","https://openalex.org/W2031416662","https://openalex.org/W2046284518","https://openalex.org/W2059131003","https://openalex.org/W2082744949","https://openalex.org/W2091949395","https://openalex.org/W2102330273","https://openalex.org/W2113763400","https://openalex.org/W2129788823","https://openalex.org/W2130518577","https://openalex.org/W2156180725","https://openalex.org/W2164687455","https://openalex.org/W2168306830","https://openalex.org/W2319074571","https://openalex.org/W2324799728","https://openalex.org/W4230912004","https://openalex.org/W6655154101","https://openalex.org/W6662246689"],"related_works":["https://openalex.org/W2110818533","https://openalex.org/W1917852300","https://openalex.org/W2384838054","https://openalex.org/W2139058049","https://openalex.org/W2548456620","https://openalex.org/W2075214143","https://openalex.org/W2376018793","https://openalex.org/W2911649771","https://openalex.org/W2148697719","https://openalex.org/W2111408175"],"abstract_inverted_index":{"This":[0],"paper":[1],"deals":[2],"with":[3,34,72],"the":[4,16,29,37,43],"usage":[5],"of":[6,18,28,65],"National":[7],"Instruments":[8],"LabVIEW":[9],"and":[10,21,42,53,59,70,81],"its":[11],"dedicated":[12],"control":[13,24],"platforms":[14],"in":[15],"field":[17,31],"Power":[19],"Electronics":[20],"Drives":[22],"(PED)":[23],"applications.":[25],"Specific":[26],"requests":[27],"PED":[30],"are":[32,62,68],"covered":[33],"respect":[35],"to":[36],"Real-Time":[38],"target,":[39],"formally":[40],"microprocessor,":[41],"on-board":[44],"FPGA.":[45],"Paper":[46],"is":[47],"focused":[48],"mainly":[49],"on":[50],"algorithm":[51],"implementation":[52],"testing,":[54],"as":[55,57,79],"well":[56],"performance":[58],"resource":[60],"utilization":[61],"discussed.":[63],"Benefits":[64],"graphical":[66],"programming":[67],"highlighted":[69],"compared":[71],"conventional":[73],"text-based":[74],"code":[75],"editing":[76],"methods,":[77],"such":[78],"VHDL":[80],"Verilog.":[82]},"counts_by_year":[{"year":2024,"cited_by_count":1},{"year":2022,"cited_by_count":3},{"year":2021,"cited_by_count":3},{"year":2020,"cited_by_count":6},{"year":2019,"cited_by_count":4},{"year":2018,"cited_by_count":5}],"updated_date":"2026-06-11T09:08:48.828518","created_date":"2025-10-10T00:00:00"}
