{"id":"https://openalex.org/W2044432382","doi":"https://doi.org/10.1109/idt.2014.7038580","title":"iJTAG integration of complex digital embedded instruments","display_name":"iJTAG integration of complex digital embedded instruments","publication_year":2014,"publication_date":"2014-12-01","ids":{"openalex":"https://openalex.org/W2044432382","doi":"https://doi.org/10.1109/idt.2014.7038580","mag":"2044432382"},"language":"en","primary_location":{"id":"doi:10.1109/idt.2014.7038580","is_oa":false,"landing_page_url":"https://doi.org/10.1109/idt.2014.7038580","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2014 9th International Design and Test Symposium (IDT)","raw_type":"proceedings-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5072586234","display_name":"Ahmed Ibrahim","orcid":"https://orcid.org/0000-0002-7520-2171"},"institutions":[{"id":"https://openalex.org/I94624287","display_name":"University of Twente","ror":"https://ror.org/006hf6230","country_code":"NL","type":"education","lineage":["https://openalex.org/I94624287"]}],"countries":["NL"],"is_corresponding":true,"raw_author_name":"Ahmed Ibrahim","raw_affiliation_strings":["Testable Design and Test of Integrated Systems Group, University of Twente, the Netherlands","Testable Design and Test of Integrated Systems Group, Centre of Telematics and Information Technology (CTIT), University of Twente, Enschede, the Netherlands"],"affiliations":[{"raw_affiliation_string":"Testable Design and Test of Integrated Systems Group, University of Twente, the Netherlands","institution_ids":["https://openalex.org/I94624287"]},{"raw_affiliation_string":"Testable Design and Test of Integrated Systems Group, Centre of Telematics and Information Technology (CTIT), University of Twente, Enschede, the Netherlands","institution_ids":["https://openalex.org/I94624287"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5063280452","display_name":"Hans G. Kerkhoff","orcid":null},"institutions":[{"id":"https://openalex.org/I94624287","display_name":"University of Twente","ror":"https://ror.org/006hf6230","country_code":"NL","type":"education","lineage":["https://openalex.org/I94624287"]}],"countries":["NL"],"is_corresponding":false,"raw_author_name":"Hans G. Kerkhoff","raw_affiliation_strings":["Testable Design and Test of Integrated Systems Group, University of Twente, the Netherlands","Testable Design and Test of Integrated Systems Group, Centre of Telematics and Information Technology (CTIT), University of Twente, Enschede, the Netherlands"],"affiliations":[{"raw_affiliation_string":"Testable Design and Test of Integrated Systems Group, University of Twente, the Netherlands","institution_ids":["https://openalex.org/I94624287"]},{"raw_affiliation_string":"Testable Design and Test of Integrated Systems Group, Centre of Telematics and Information Technology (CTIT), University of Twente, Enschede, the Netherlands","institution_ids":["https://openalex.org/I94624287"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":2,"corresponding_author_ids":["https://openalex.org/A5072586234"],"corresponding_institution_ids":["https://openalex.org/I94624287"],"apc_list":null,"apc_paid":null,"fwci":1.10872547,"has_fulltext":false,"cited_by_count":10,"citation_normalized_percentile":{"value":0.80248164,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":{"min":89,"max":98},"biblio":{"volume":null,"issue":null,"first_page":"18","last_page":"23"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T11032","display_name":"VLSI and Analog Circuit Testing","score":1.0,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T11032","display_name":"VLSI and Analog Circuit Testing","score":1.0,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T14117","display_name":"Integrated Circuits and Semiconductor Failure Analysis","score":0.9998999834060669,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T13293","display_name":"Engineering and Test Systems","score":0.9994000196456909,"subfield":{"id":"https://openalex.org/subfields/2207","display_name":"Control and Systems Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/control-reconfiguration","display_name":"Control reconfiguration","score":0.816890299320221},{"id":"https://openalex.org/keywords/mpsoc","display_name":"MPSoC","score":0.7837847471237183},{"id":"https://openalex.org/keywords/dependability","display_name":"Dependability","score":0.782914400100708},{"id":"https://openalex.org/keywords/embedded-system","display_name":"Embedded system","score":0.7211523056030273},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.5824683308601379},{"id":"https://openalex.org/keywords/port","display_name":"Port (circuit theory)","score":0.5548732876777649},{"id":"https://openalex.org/keywords/system-on-a-chip","display_name":"System on a chip","score":0.3607146739959717},{"id":"https://openalex.org/keywords/computer-architecture","display_name":"Computer architecture","score":0.3550895154476166},{"id":"https://openalex.org/keywords/engineering","display_name":"Engineering","score":0.307917058467865},{"id":"https://openalex.org/keywords/software-engineering","display_name":"Software engineering","score":0.1442289650440216},{"id":"https://openalex.org/keywords/electronic-engineering","display_name":"Electronic engineering","score":0.11952850222587585}],"concepts":[{"id":"https://openalex.org/C119701452","wikidata":"https://www.wikidata.org/wiki/Q5165881","display_name":"Control reconfiguration","level":2,"score":0.816890299320221},{"id":"https://openalex.org/C2777187653","wikidata":"https://www.wikidata.org/wiki/Q975106","display_name":"MPSoC","level":3,"score":0.7837847471237183},{"id":"https://openalex.org/C77019957","wikidata":"https://www.wikidata.org/wiki/Q2689057","display_name":"Dependability","level":2,"score":0.782914400100708},{"id":"https://openalex.org/C149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","level":1,"score":0.7211523056030273},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.5824683308601379},{"id":"https://openalex.org/C32802771","wikidata":"https://www.wikidata.org/wiki/Q2443617","display_name":"Port (circuit theory)","level":2,"score":0.5548732876777649},{"id":"https://openalex.org/C118021083","wikidata":"https://www.wikidata.org/wiki/Q610398","display_name":"System on a chip","level":2,"score":0.3607146739959717},{"id":"https://openalex.org/C118524514","wikidata":"https://www.wikidata.org/wiki/Q173212","display_name":"Computer architecture","level":1,"score":0.3550895154476166},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.307917058467865},{"id":"https://openalex.org/C115903868","wikidata":"https://www.wikidata.org/wiki/Q80993","display_name":"Software engineering","level":1,"score":0.1442289650440216},{"id":"https://openalex.org/C24326235","wikidata":"https://www.wikidata.org/wiki/Q126095","display_name":"Electronic engineering","level":1,"score":0.11952850222587585}],"mesh":[],"locations_count":3,"locations":[{"id":"doi:10.1109/idt.2014.7038580","is_oa":false,"landing_page_url":"https://doi.org/10.1109/idt.2014.7038580","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2014 9th International Design and Test Symposium (IDT)","raw_type":"proceedings-article"},{"id":"pmh:oai:ris.utwente.nl:openaire_cris_publications/3532720d-fab0-463c-9dbd-a92ddb85dd1a","is_oa":false,"landing_page_url":"https://research.utwente.nl/en/publications/3532720d-fab0-463c-9dbd-a92ddb85dd1a","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"Ibrahim, A M Y & Kerkhoff, H G 2014, iJTAG integration of complex digital embedded instruments. in 9th International Design & Test Symposium, IDT 2014. IEEE, USA, pp. 18-23, 9th International Design & Test Symposium, IDT 2014, Algiers, Algeria, 16/12/14. https://doi.org/10.1109/IDT.2014.7038580","raw_type":"info:eu-repo/semantics/publishedVersion"},{"id":"pmh:oai:ris.utwente.nl:publications/3532720d-fab0-463c-9dbd-a92ddb85dd1a","is_oa":false,"landing_page_url":"http://eprints.eemcs.utwente.nl/secure2/25382/01/iJTAG_Integration_of_Complex_Digital_Embedded_Instruments.pdf","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"submittedVersion","is_accepted":false,"is_published":false,"raw_source_name":"","raw_type":""}],"best_oa_location":null,"sustainable_development_goals":[],"awards":[],"funders":[],"has_content":{"grobid_xml":false,"pdf":false},"content_urls":null,"referenced_works_count":5,"referenced_works":["https://openalex.org/W1977408845","https://openalex.org/W2110398091","https://openalex.org/W2144033909","https://openalex.org/W2152477723","https://openalex.org/W2153973228"],"related_works":["https://openalex.org/W2058450550","https://openalex.org/W107614760","https://openalex.org/W795270372","https://openalex.org/W2137412894","https://openalex.org/W2502691491","https://openalex.org/W1976012348","https://openalex.org/W2002682434","https://openalex.org/W2137671689","https://openalex.org/W4387782849","https://openalex.org/W2012131147"],"abstract_inverted_index":{"Embedded":[0],"instruments":[1,28,57,64],"are":[2,75],"becoming":[3],"used":[4,65],"more":[5],"often":[6],"in":[7],"modern":[8],"SoCs":[9],"for":[10,26,46],"different":[11],"testing":[12],"and":[13,30,51,81,97],"measurement":[14],"purposes.":[15],"IEEE":[16,22,36],"1687":[17],"(iJTAG)":[18],"is":[19,89,99],"a":[20,67,78],"newly":[21],"approved":[23],"draft":[24],"standard":[25],"embedded":[27,56,63],"access":[29,88],"control":[31],"based":[32],"on":[33],"the":[34,43,82,93],"widespread":[35],"1149.1":[37],"TAP":[38],"port.":[39],"In":[40],"this":[41],"paper":[42],"work":[44,83],"done":[45,84],"enabling":[47],"iJTAG":[48,87,94],"control,":[49,95],"observation":[50,96],"reconfiguration":[52,98],"of":[53,69,92],"complex":[54],"digital":[55,62],"will":[58],"be":[59],"discussed.":[60],"Two":[61],"as":[66,77],"part":[68],"an":[70],"MPSoC":[71],"dependability":[72],"management":[73],"solution":[74],"presented":[76],"case":[79],"study,":[80],"to":[85],"enable":[86],"illustrated.":[90],"Verification":[91],"also":[100],"presented.":[101]},"counts_by_year":[{"year":2023,"cited_by_count":1},{"year":2019,"cited_by_count":4},{"year":2018,"cited_by_count":1},{"year":2017,"cited_by_count":1},{"year":2016,"cited_by_count":3}],"updated_date":"2025-11-06T03:46:38.306776","created_date":"2025-10-10T00:00:00"}
