{"id":"https://openalex.org/W2547002542","doi":"https://doi.org/10.1109/idt.2013.6727119","title":"The optimum Booth radix for low power integer multipliers","display_name":"The optimum Booth radix for low power integer multipliers","publication_year":2013,"publication_date":"2013-12-01","ids":{"openalex":"https://openalex.org/W2547002542","doi":"https://doi.org/10.1109/idt.2013.6727119","mag":"2547002542"},"language":"en","primary_location":{"id":"doi:10.1109/idt.2013.6727119","is_oa":false,"landing_page_url":"https://doi.org/10.1109/idt.2013.6727119","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2013 8th IEEE Design and Test Symposium","raw_type":"proceedings-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5078108496","display_name":"Hani Saleh","orcid":"https://orcid.org/0000-0002-7185-0278"},"institutions":[],"countries":[],"is_corresponding":true,"raw_author_name":"Hani H. Saleh","raw_affiliation_strings":["ECE Department, Technology and research, Abu Dhabi, UAE"],"affiliations":[{"raw_affiliation_string":"ECE Department, Technology and research, Abu Dhabi, UAE","institution_ids":[]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5013814572","display_name":"Baker Mohammad","orcid":"https://orcid.org/0000-0002-6063-473X"},"institutions":[],"countries":[],"is_corresponding":false,"raw_author_name":"Baker S. Mohammad","raw_affiliation_strings":["ECE Department, Technology and research, Abu Dhabi, UAE"],"affiliations":[{"raw_affiliation_string":"ECE Department, Technology and research, Abu Dhabi, UAE","institution_ids":[]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5028439610","display_name":"Earl E. Swartzlander","orcid":"https://orcid.org/0000-0002-8699-5277"},"institutions":[{"id":"https://openalex.org/I86519309","display_name":"The University of Texas at Austin","ror":"https://ror.org/00hj54h04","country_code":"US","type":"education","lineage":["https://openalex.org/I86519309"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Earl E. Swartzlander","raw_affiliation_strings":["ECE Department, University of Texas at Austin, Austin, TX, USA"],"affiliations":[{"raw_affiliation_string":"ECE Department, University of Texas at Austin, Austin, TX, USA","institution_ids":["https://openalex.org/I86519309"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":3,"corresponding_author_ids":["https://openalex.org/A5078108496"],"corresponding_institution_ids":[],"apc_list":null,"apc_paid":null,"fwci":0.2365,"has_fulltext":false,"cited_by_count":4,"citation_normalized_percentile":{"value":0.65485871,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":{"min":89,"max":94},"biblio":{"volume":"34","issue":null,"first_page":"1","last_page":"4"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10363","display_name":"Low-power high-performance VLSI design","score":1.0,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10363","display_name":"Low-power high-performance VLSI design","score":1.0,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10054","display_name":"Parallel Computing and Optimization Techniques","score":0.9973000288009644,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10904","display_name":"Embedded Systems Design Techniques","score":0.9970999956130981,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/radix","display_name":"Radix (gastropod)","score":0.8030188083648682},{"id":"https://openalex.org/keywords/application-specific-integrated-circuit","display_name":"Application-specific integrated circuit","score":0.673041820526123},{"id":"https://openalex.org/keywords/standard-cell","display_name":"Standard cell","score":0.6300477981567383},{"id":"https://openalex.org/keywords/cmos","display_name":"CMOS","score":0.5835385322570801},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.5564127564430237},{"id":"https://openalex.org/keywords/leakage","display_name":"Leakage (economics)","score":0.5036424994468689},{"id":"https://openalex.org/keywords/leakage-power","display_name":"Leakage power","score":0.48567140102386475},{"id":"https://openalex.org/keywords/power-analysis","display_name":"Power analysis","score":0.46547314524650574},{"id":"https://openalex.org/keywords/speedup","display_name":"Speedup","score":0.45310091972351074},{"id":"https://openalex.org/keywords/multiplier","display_name":"Multiplier (economics)","score":0.4498884677886963},{"id":"https://openalex.org/keywords/integer","display_name":"Integer (computer science)","score":0.4459644854068756},{"id":"https://openalex.org/keywords/booths-multiplication-algorithm","display_name":"Booth's multiplication algorithm","score":0.43870723247528076},{"id":"https://openalex.org/keywords/adder","display_name":"Adder","score":0.4272758364677429},{"id":"https://openalex.org/keywords/arithmetic","display_name":"Arithmetic","score":0.42432183027267456},{"id":"https://openalex.org/keywords/power","display_name":"Power (physics)","score":0.41449999809265137},{"id":"https://openalex.org/keywords/computer-hardware","display_name":"Computer hardware","score":0.39771270751953125},{"id":"https://openalex.org/keywords/electronic-engineering","display_name":"Electronic engineering","score":0.3879563808441162},{"id":"https://openalex.org/keywords/parallel-computing","display_name":"Parallel computing","score":0.3834778368473053},{"id":"https://openalex.org/keywords/mathematics","display_name":"Mathematics","score":0.3197375535964966},{"id":"https://openalex.org/keywords/algorithm","display_name":"Algorithm","score":0.2381976842880249},{"id":"https://openalex.org/keywords/voltage","display_name":"Voltage","score":0.23700755834579468},{"id":"https://openalex.org/keywords/electrical-engineering","display_name":"Electrical engineering","score":0.2244119644165039},{"id":"https://openalex.org/keywords/engineering","display_name":"Engineering","score":0.22079381346702576},{"id":"https://openalex.org/keywords/integrated-circuit","display_name":"Integrated circuit","score":0.21045252680778503},{"id":"https://openalex.org/keywords/transistor","display_name":"Transistor","score":0.10596930980682373},{"id":"https://openalex.org/keywords/physics","display_name":"Physics","score":0.06787905097007751}],"concepts":[{"id":"https://openalex.org/C2779091547","wikidata":"https://www.wikidata.org/wiki/Q287565","display_name":"Radix (gastropod)","level":2,"score":0.8030188083648682},{"id":"https://openalex.org/C77390884","wikidata":"https://www.wikidata.org/wiki/Q217302","display_name":"Application-specific integrated circuit","level":2,"score":0.673041820526123},{"id":"https://openalex.org/C78401558","wikidata":"https://www.wikidata.org/wiki/Q464496","display_name":"Standard cell","level":3,"score":0.6300477981567383},{"id":"https://openalex.org/C46362747","wikidata":"https://www.wikidata.org/wiki/Q173431","display_name":"CMOS","level":2,"score":0.5835385322570801},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.5564127564430237},{"id":"https://openalex.org/C2777042071","wikidata":"https://www.wikidata.org/wiki/Q6509304","display_name":"Leakage (economics)","level":2,"score":0.5036424994468689},{"id":"https://openalex.org/C2987719587","wikidata":"https://www.wikidata.org/wiki/Q1811428","display_name":"Leakage power","level":4,"score":0.48567140102386475},{"id":"https://openalex.org/C71743495","wikidata":"https://www.wikidata.org/wiki/Q2845210","display_name":"Power analysis","level":3,"score":0.46547314524650574},{"id":"https://openalex.org/C68339613","wikidata":"https://www.wikidata.org/wiki/Q1549489","display_name":"Speedup","level":2,"score":0.45310091972351074},{"id":"https://openalex.org/C124584101","wikidata":"https://www.wikidata.org/wiki/Q1053266","display_name":"Multiplier (economics)","level":2,"score":0.4498884677886963},{"id":"https://openalex.org/C97137487","wikidata":"https://www.wikidata.org/wiki/Q729138","display_name":"Integer (computer science)","level":2,"score":0.4459644854068756},{"id":"https://openalex.org/C72475854","wikidata":"https://www.wikidata.org/wiki/Q477049","display_name":"Booth's multiplication algorithm","level":4,"score":0.43870723247528076},{"id":"https://openalex.org/C164620267","wikidata":"https://www.wikidata.org/wiki/Q376953","display_name":"Adder","level":3,"score":0.4272758364677429},{"id":"https://openalex.org/C94375191","wikidata":"https://www.wikidata.org/wiki/Q11205","display_name":"Arithmetic","level":1,"score":0.42432183027267456},{"id":"https://openalex.org/C163258240","wikidata":"https://www.wikidata.org/wiki/Q25342","display_name":"Power (physics)","level":2,"score":0.41449999809265137},{"id":"https://openalex.org/C9390403","wikidata":"https://www.wikidata.org/wiki/Q3966","display_name":"Computer hardware","level":1,"score":0.39771270751953125},{"id":"https://openalex.org/C24326235","wikidata":"https://www.wikidata.org/wiki/Q126095","display_name":"Electronic engineering","level":1,"score":0.3879563808441162},{"id":"https://openalex.org/C173608175","wikidata":"https://www.wikidata.org/wiki/Q232661","display_name":"Parallel computing","level":1,"score":0.3834778368473053},{"id":"https://openalex.org/C33923547","wikidata":"https://www.wikidata.org/wiki/Q395","display_name":"Mathematics","level":0,"score":0.3197375535964966},{"id":"https://openalex.org/C11413529","wikidata":"https://www.wikidata.org/wiki/Q8366","display_name":"Algorithm","level":1,"score":0.2381976842880249},{"id":"https://openalex.org/C165801399","wikidata":"https://www.wikidata.org/wiki/Q25428","display_name":"Voltage","level":2,"score":0.23700755834579468},{"id":"https://openalex.org/C119599485","wikidata":"https://www.wikidata.org/wiki/Q43035","display_name":"Electrical engineering","level":1,"score":0.2244119644165039},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.22079381346702576},{"id":"https://openalex.org/C530198007","wikidata":"https://www.wikidata.org/wiki/Q80831","display_name":"Integrated circuit","level":2,"score":0.21045252680778503},{"id":"https://openalex.org/C172385210","wikidata":"https://www.wikidata.org/wiki/Q5339","display_name":"Transistor","level":3,"score":0.10596930980682373},{"id":"https://openalex.org/C121332964","wikidata":"https://www.wikidata.org/wiki/Q413","display_name":"Physics","level":0,"score":0.06787905097007751},{"id":"https://openalex.org/C162324750","wikidata":"https://www.wikidata.org/wiki/Q8134","display_name":"Economics","level":0,"score":0.0},{"id":"https://openalex.org/C62520636","wikidata":"https://www.wikidata.org/wiki/Q944","display_name":"Quantum mechanics","level":1,"score":0.0},{"id":"https://openalex.org/C139719470","wikidata":"https://www.wikidata.org/wiki/Q39680","display_name":"Macroeconomics","level":1,"score":0.0},{"id":"https://openalex.org/C111919701","wikidata":"https://www.wikidata.org/wiki/Q9135","display_name":"Operating system","level":1,"score":0.0},{"id":"https://openalex.org/C199360897","wikidata":"https://www.wikidata.org/wiki/Q9143","display_name":"Programming language","level":1,"score":0.0},{"id":"https://openalex.org/C59822182","wikidata":"https://www.wikidata.org/wiki/Q441","display_name":"Botany","level":1,"score":0.0},{"id":"https://openalex.org/C178489894","wikidata":"https://www.wikidata.org/wiki/Q8789","display_name":"Cryptography","level":2,"score":0.0},{"id":"https://openalex.org/C86803240","wikidata":"https://www.wikidata.org/wiki/Q420","display_name":"Biology","level":0,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/idt.2013.6727119","is_oa":false,"landing_page_url":"https://doi.org/10.1109/idt.2013.6727119","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2013 8th IEEE Design and Test Symposium","raw_type":"proceedings-article"}],"best_oa_location":null,"sustainable_development_goals":[{"score":0.8500000238418579,"display_name":"Affordable and clean energy","id":"https://metadata.un.org/sdg/7"}],"awards":[],"funders":[],"has_content":{"grobid_xml":false,"pdf":false},"content_urls":null,"referenced_works_count":5,"referenced_works":["https://openalex.org/W2052363354","https://openalex.org/W2100993550","https://openalex.org/W2117442011","https://openalex.org/W2139937726","https://openalex.org/W2171843705"],"related_works":["https://openalex.org/W3139630586","https://openalex.org/W2153081350","https://openalex.org/W3118477396","https://openalex.org/W2348831282","https://openalex.org/W2002284362","https://openalex.org/W2076676192","https://openalex.org/W2356501027","https://openalex.org/W2540014409","https://openalex.org/W3035529485","https://openalex.org/W2352425504"],"abstract_inverted_index":{"This":[0],"paper":[1],"investigates":[2],"the":[3,35,74,82,86,90,95,104,121],"optimum":[4],"Booth":[5,12,87],"integer":[6],"multiplier":[7],"for":[8,19,77,130],"low":[9,53,78],"power":[10,23,69,79,98,116,119,131],"applications.":[11],"radix-4,":[13],"radix-8":[14,112,136],"and":[15,22,29,44,61,68,99,117,133,148],"radix-16":[16],"were":[17,38,70],"compared":[18,71],"area,":[20,66,97],"speed":[21,67,102],"using":[24,47,126],"standard-cell":[25,49],"ASIC":[26],"design":[27],"flow":[28],"28nm":[30,48],"CMOS":[31],"technology.":[32],"All":[33],"of":[34,109,144],"investigated":[36,84],"designs":[37,123],"implemented":[39,125],"in":[40],"RTL,":[41],"fully":[42],"verified":[43],"then":[45],"synthesized":[46],"libraries":[50],"which":[51],"have":[52],"leakage":[54,58,115],"slow":[55],"cells,":[56],"regular":[57],"average-speed":[59],"cells":[60],"high-leakage":[62],"fast-speed":[63],"cells.":[64,128],"The":[65],"to":[72],"determine":[73],"best":[75,91],"choice":[76,141],"designs.":[80],"Among":[81],"three":[83,122],"designs,":[85],"radix-4":[88],"was":[89],"choice,":[92],"it":[93],"had":[94,113],"lowest":[96],"fastest":[100],"execution":[101],"among":[103,120],"3-choices.":[105],"It":[106],"is":[107],"worthy":[108],"note":[110],"that":[111],"lower":[114],"overall":[118],"when":[124],"LVT":[127],"So":[129],"sensitive":[132],"high-speed":[134],"applications":[135],"could":[137],"be":[138],"a":[139],"better":[140],"with":[142],"overhead":[143],"about":[145],"18%":[146],"area":[147],"3%":[149],"slower.":[150]},"counts_by_year":[{"year":2023,"cited_by_count":1},{"year":2018,"cited_by_count":1},{"year":2017,"cited_by_count":1},{"year":2016,"cited_by_count":1}],"updated_date":"2025-11-06T03:46:38.306776","created_date":"2025-10-10T00:00:00"}