{"id":"https://openalex.org/W2124320401","doi":"https://doi.org/10.1109/icvd.2004.1260973","title":"System-on-chip (SoC): clocking and synchronization issues","display_name":"System-on-chip (SoC): clocking and synchronization issues","publication_year":2004,"publication_date":"2004-06-21","ids":{"openalex":"https://openalex.org/W2124320401","doi":"https://doi.org/10.1109/icvd.2004.1260973","mag":"2124320401"},"language":"en","primary_location":{"id":"doi:10.1109/icvd.2004.1260973","is_oa":false,"landing_page_url":"https://doi.org/10.1109/icvd.2004.1260973","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"17th International Conference on VLSI Design. Proceedings.","raw_type":"proceedings-article"},"type":"conference-paper","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5080965835","display_name":"R. Sridhar","orcid":"https://orcid.org/0009-0006-8070-5511"},"institutions":[{"id":"https://openalex.org/I63190737","display_name":"University at Buffalo, State University of New York","ror":"https://ror.org/01y64my43","country_code":"US","type":"education","lineage":["https://openalex.org/I63190737"]}],"countries":["US"],"is_corresponding":true,"raw_author_name":"R. Sridhar","raw_affiliation_strings":["Department of Computer Science and Engineering, University of Buffallo, Buffalo, NY, USA","Department of Computer Science & Engineering, University at Buffalo, NY, USA"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Department of Computer Science and Engineering, University of Buffallo, Buffalo, NY, USA","institution_ids":["https://openalex.org/I63190737"]},{"raw_affiliation_string":"Department of Computer Science & Engineering, University at Buffalo, NY, USA","institution_ids":["https://openalex.org/I63190737"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":1,"corresponding_author_ids":["https://openalex.org/A5080965835"],"corresponding_institution_ids":["https://openalex.org/I63190737"],"apc_list":null,"apc_paid":null,"fwci":0.4137,"has_fulltext":false,"cited_by_count":1,"citation_normalized_percentile":{"value":0.60892957,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":null,"biblio":{"volume":"2","issue":null,"first_page":"520","last_page":"527"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10363","display_name":"Low-power high-performance VLSI design","score":1.0,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10363","display_name":"Low-power high-performance VLSI design","score":1.0,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10829","display_name":"Interconnection Networks and Systems","score":1.0,"subfield":{"id":"https://openalex.org/subfields/1705","display_name":"Computer Networks and Communications"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10904","display_name":"Embedded Systems Design Techniques","score":0.9997000098228455,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/synchronization","display_name":"Synchronization (alternating current)","score":0.7604988813400269},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.7269245386123657},{"id":"https://openalex.org/keywords/system-on-a-chip","display_name":"System on a chip","score":0.6584185361862183},{"id":"https://openalex.org/keywords/scaling","display_name":"Scaling","score":0.5762271285057068},{"id":"https://openalex.org/keywords/transistor","display_name":"Transistor","score":0.5119146108627319},{"id":"https://openalex.org/keywords/abstraction","display_name":"Abstraction","score":0.5079222321510315},{"id":"https://openalex.org/keywords/chip","display_name":"Chip","score":0.4927509129047394},{"id":"https://openalex.org/keywords/embedded-system","display_name":"Embedded system","score":0.4911164939403534},{"id":"https://openalex.org/keywords/electronic-engineering","display_name":"Electronic engineering","score":0.4825989007949829},{"id":"https://openalex.org/keywords/noise","display_name":"Noise (video)","score":0.471571147441864},{"id":"https://openalex.org/keywords/integrated-circuit-design","display_name":"Integrated circuit design","score":0.44947901368141174},{"id":"https://openalex.org/keywords/electronic-circuit","display_name":"Electronic circuit","score":0.42076021432876587},{"id":"https://openalex.org/keywords/computer-architecture","display_name":"Computer architecture","score":0.3344177007675171},{"id":"https://openalex.org/keywords/electrical-engineering","display_name":"Electrical engineering","score":0.17358171939849854},{"id":"https://openalex.org/keywords/engineering","display_name":"Engineering","score":0.16415417194366455},{"id":"https://openalex.org/keywords/telecommunications","display_name":"Telecommunications","score":0.11899638175964355},{"id":"https://openalex.org/keywords/voltage","display_name":"Voltage","score":0.07807838916778564}],"concepts":[{"id":"https://openalex.org/C2778562939","wikidata":"https://www.wikidata.org/wiki/Q1298791","display_name":"Synchronization (alternating current)","level":3,"score":0.7604988813400269},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.7269245386123657},{"id":"https://openalex.org/C118021083","wikidata":"https://www.wikidata.org/wiki/Q610398","display_name":"System on a chip","level":2,"score":0.6584185361862183},{"id":"https://openalex.org/C99844830","wikidata":"https://www.wikidata.org/wiki/Q102441924","display_name":"Scaling","level":2,"score":0.5762271285057068},{"id":"https://openalex.org/C172385210","wikidata":"https://www.wikidata.org/wiki/Q5339","display_name":"Transistor","level":3,"score":0.5119146108627319},{"id":"https://openalex.org/C124304363","wikidata":"https://www.wikidata.org/wiki/Q673661","display_name":"Abstraction","level":2,"score":0.5079222321510315},{"id":"https://openalex.org/C165005293","wikidata":"https://www.wikidata.org/wiki/Q1074500","display_name":"Chip","level":2,"score":0.4927509129047394},{"id":"https://openalex.org/C149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","level":1,"score":0.4911164939403534},{"id":"https://openalex.org/C24326235","wikidata":"https://www.wikidata.org/wiki/Q126095","display_name":"Electronic engineering","level":1,"score":0.4825989007949829},{"id":"https://openalex.org/C99498987","wikidata":"https://www.wikidata.org/wiki/Q2210247","display_name":"Noise (video)","level":3,"score":0.471571147441864},{"id":"https://openalex.org/C74524168","wikidata":"https://www.wikidata.org/wiki/Q1074539","display_name":"Integrated circuit design","level":2,"score":0.44947901368141174},{"id":"https://openalex.org/C134146338","wikidata":"https://www.wikidata.org/wiki/Q1815901","display_name":"Electronic circuit","level":2,"score":0.42076021432876587},{"id":"https://openalex.org/C118524514","wikidata":"https://www.wikidata.org/wiki/Q173212","display_name":"Computer architecture","level":1,"score":0.3344177007675171},{"id":"https://openalex.org/C119599485","wikidata":"https://www.wikidata.org/wiki/Q43035","display_name":"Electrical engineering","level":1,"score":0.17358171939849854},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.16415417194366455},{"id":"https://openalex.org/C76155785","wikidata":"https://www.wikidata.org/wiki/Q418","display_name":"Telecommunications","level":1,"score":0.11899638175964355},{"id":"https://openalex.org/C165801399","wikidata":"https://www.wikidata.org/wiki/Q25428","display_name":"Voltage","level":2,"score":0.07807838916778564},{"id":"https://openalex.org/C33923547","wikidata":"https://www.wikidata.org/wiki/Q395","display_name":"Mathematics","level":0,"score":0.0},{"id":"https://openalex.org/C154945302","wikidata":"https://www.wikidata.org/wiki/Q11660","display_name":"Artificial intelligence","level":1,"score":0.0},{"id":"https://openalex.org/C127162648","wikidata":"https://www.wikidata.org/wiki/Q16858953","display_name":"Channel (broadcasting)","level":2,"score":0.0},{"id":"https://openalex.org/C111472728","wikidata":"https://www.wikidata.org/wiki/Q9471","display_name":"Epistemology","level":1,"score":0.0},{"id":"https://openalex.org/C2524010","wikidata":"https://www.wikidata.org/wiki/Q8087","display_name":"Geometry","level":1,"score":0.0},{"id":"https://openalex.org/C115961682","wikidata":"https://www.wikidata.org/wiki/Q860623","display_name":"Image (mathematics)","level":2,"score":0.0},{"id":"https://openalex.org/C138885662","wikidata":"https://www.wikidata.org/wiki/Q5891","display_name":"Philosophy","level":0,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/icvd.2004.1260973","is_oa":false,"landing_page_url":"https://doi.org/10.1109/icvd.2004.1260973","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"17th International Conference on VLSI Design. Proceedings.","raw_type":"proceedings-article"}],"best_oa_location":null,"sustainable_development_goals":[{"id":"https://metadata.un.org/sdg/7","score":0.8999999761581421,"display_name":"Affordable and clean energy"}],"awards":[],"funders":[],"has_content":{"pdf":false,"grobid_xml":false},"content_urls":null,"referenced_works_count":30,"referenced_works":["https://openalex.org/W1555253106","https://openalex.org/W1609287256","https://openalex.org/W1943426535","https://openalex.org/W1977539293","https://openalex.org/W1986322294","https://openalex.org/W2012155933","https://openalex.org/W2015667701","https://openalex.org/W2031494418","https://openalex.org/W2052006175","https://openalex.org/W2108368155","https://openalex.org/W2111207983","https://openalex.org/W2120480196","https://openalex.org/W2128728233","https://openalex.org/W2128967676","https://openalex.org/W2131896644","https://openalex.org/W2137807823","https://openalex.org/W2144225549","https://openalex.org/W2152753377","https://openalex.org/W2153903472","https://openalex.org/W2160587268","https://openalex.org/W2169910642","https://openalex.org/W2495761699","https://openalex.org/W2534012653","https://openalex.org/W3103339143","https://openalex.org/W4229823398","https://openalex.org/W4238068322","https://openalex.org/W4251013638","https://openalex.org/W6633376247","https://openalex.org/W6636576922","https://openalex.org/W6683178885"],"related_works":["https://openalex.org/W2065289416","https://openalex.org/W2017236304","https://openalex.org/W2115579119","https://openalex.org/W2136854845","https://openalex.org/W1929041301","https://openalex.org/W2038859986","https://openalex.org/W2104315811","https://openalex.org/W2142217172","https://openalex.org/W4230312832","https://openalex.org/W1982273910"],"abstract_inverted_index":{"Technology":[0],"scaling":[1,59],"continues":[2],"to":[3,9,76],"improve":[4],"transistor":[5],"performance":[6],"and":[7,13,57,66,72,84],"integration":[8],"realize":[10],"complex":[11],"systems":[12],"added":[14],"functionality":[15],"in":[16,51,61],"SoC":[17,62],"designs.":[18],"This":[19,68],"reduces":[20],"the":[21,48,58],"energy":[22],"consumed":[23],"with":[24,36],"a":[25],"30%":[26],"speed":[27],"improvement":[28],"per":[29],"technology":[30],"generation.":[31],"The":[32],"scaling,":[33],"however,":[34],"comes":[35],"some":[37],"adverse":[38],"effects":[39],"posing":[40],"perceived":[41],"barriers.":[42],"In":[43],"this":[44],"paper,":[45],"we":[46],"discuss":[47],"design":[49],"challenges":[50],"Ultra":[52],"Deep":[53],"Submicron":[54],"(UDSM)":[55],"technologies":[56],"problems":[60],"circuits":[63],"for":[64],"clocking":[65,83],"synchronization.":[67],"includes":[69],"delay":[70],"variations":[71],"functional":[73],"errors":[74],"due":[75],"various":[77],"types":[78],"of":[79,97],"noise":[80],"sources.":[81],"Correct":[82],"synchronization":[85],"can":[86],"be":[87],"achieved":[88],"through":[89],"innovative":[90],"strategies":[91],"that":[92],"work":[93],"at":[94],"all":[95],"levels":[96],"abstraction.":[98]},"counts_by_year":[],"updated_date":"2026-07-29T14:22:42.915294","created_date":"2025-10-10T00:00:00"}
