{"id":"https://openalex.org/W2120219963","doi":"https://doi.org/10.1109/icvd.2003.1183195","title":"Optimal code and data layout in embedded systems","display_name":"Optimal code and data layout in embedded systems","publication_year":2003,"publication_date":"2003-08-27","ids":{"openalex":"https://openalex.org/W2120219963","doi":"https://doi.org/10.1109/icvd.2003.1183195","mag":"2120219963"},"language":"en","primary_location":{"id":"doi:10.1109/icvd.2003.1183195","is_oa":false,"landing_page_url":"https://doi.org/10.1109/icvd.2003.1183195","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"16th International Conference on VLSI Design, 2003. Proceedings.","raw_type":"proceedings-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5039029625","display_name":"T.S. Rajesh Kumar","orcid":"https://orcid.org/0000-0002-9569-3449"},"institutions":[{"id":"https://openalex.org/I4210109535","display_name":"Texas Instruments (India)","ror":"https://ror.org/01t305n31","country_code":"IN","type":"company","lineage":["https://openalex.org/I4210109535","https://openalex.org/I74760111"]}],"countries":["IN"],"is_corresponding":false,"raw_author_name":"T.S.R. Kumar","raw_affiliation_strings":["Texas Instruments India Ltd., Bangalore, India"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Texas Instruments India Ltd., Bangalore, India","institution_ids":["https://openalex.org/I4210109535"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5113510967","display_name":"R. Govindarajan","orcid":null},"institutions":[{"id":"https://openalex.org/I59270414","display_name":"Indian Institute of Science Bangalore","ror":"https://ror.org/04dese585","country_code":"IN","type":"education","lineage":["https://openalex.org/I59270414"]}],"countries":["IN"],"is_corresponding":false,"raw_author_name":"R. Govindarajan","raw_affiliation_strings":["Supercomputer Education & Research Centre, Indian Institute of Science, Bangalore, India"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Supercomputer Education & Research Centre, Indian Institute of Science, Bangalore, India","institution_ids":["https://openalex.org/I59270414"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5108896743","display_name":"C Praveen Kumar","orcid":null},"institutions":[{"id":"https://openalex.org/I4210109535","display_name":"Texas Instruments (India)","ror":"https://ror.org/01t305n31","country_code":"IN","type":"company","lineage":["https://openalex.org/I4210109535","https://openalex.org/I74760111"]}],"countries":["IN"],"is_corresponding":false,"raw_author_name":"C.P.R. Kumar","raw_affiliation_strings":["Texas Instruments India Ltd., Bangalore, India"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Texas Instruments India Ltd., Bangalore, India","institution_ids":["https://openalex.org/I4210109535"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":3,"corresponding_author_ids":[],"corresponding_institution_ids":[],"apc_list":null,"apc_paid":null,"fwci":0.0,"has_fulltext":false,"cited_by_count":3,"citation_normalized_percentile":{"value":0.17861153,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":{"min":90,"max":94},"biblio":{"volume":null,"issue":null,"first_page":"573","last_page":"578"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10054","display_name":"Parallel Computing and Optimization Techniques","score":1.0,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10054","display_name":"Parallel Computing and Optimization Techniques","score":1.0,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10904","display_name":"Embedded Systems Design Techniques","score":0.9997000098228455,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11181","display_name":"Advanced Data Storage Technologies","score":0.9994999766349792,"subfield":{"id":"https://openalex.org/subfields/1705","display_name":"Computer Networks and Communications"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/overlay","display_name":"Overlay","score":0.8560045957565308},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.7858939170837402},{"id":"https://openalex.org/keywords/code","display_name":"Code (set theory)","score":0.6345678567886353},{"id":"https://openalex.org/keywords/chip","display_name":"Chip","score":0.6049082279205322},{"id":"https://openalex.org/keywords/porting","display_name":"Porting","score":0.5687564015388489},{"id":"https://openalex.org/keywords/parallel-computing","display_name":"Parallel computing","score":0.5385746359825134},{"id":"https://openalex.org/keywords/embedded-system","display_name":"Embedded system","score":0.5102028846740723},{"id":"https://openalex.org/keywords/system-on-a-chip","display_name":"System on a chip","score":0.4884280264377594},{"id":"https://openalex.org/keywords/computer-hardware","display_name":"Computer hardware","score":0.3908420205116272},{"id":"https://openalex.org/keywords/operating-system","display_name":"Operating system","score":0.18847054243087769},{"id":"https://openalex.org/keywords/programming-language","display_name":"Programming language","score":0.15674921870231628},{"id":"https://openalex.org/keywords/software","display_name":"Software","score":0.11448207497596741}],"concepts":[{"id":"https://openalex.org/C136085584","wikidata":"https://www.wikidata.org/wiki/Q910289","display_name":"Overlay","level":2,"score":0.8560045957565308},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.7858939170837402},{"id":"https://openalex.org/C2776760102","wikidata":"https://www.wikidata.org/wiki/Q5139990","display_name":"Code (set theory)","level":3,"score":0.6345678567886353},{"id":"https://openalex.org/C165005293","wikidata":"https://www.wikidata.org/wiki/Q1074500","display_name":"Chip","level":2,"score":0.6049082279205322},{"id":"https://openalex.org/C106251023","wikidata":"https://www.wikidata.org/wiki/Q851989","display_name":"Porting","level":3,"score":0.5687564015388489},{"id":"https://openalex.org/C173608175","wikidata":"https://www.wikidata.org/wiki/Q232661","display_name":"Parallel computing","level":1,"score":0.5385746359825134},{"id":"https://openalex.org/C149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","level":1,"score":0.5102028846740723},{"id":"https://openalex.org/C118021083","wikidata":"https://www.wikidata.org/wiki/Q610398","display_name":"System on a chip","level":2,"score":0.4884280264377594},{"id":"https://openalex.org/C9390403","wikidata":"https://www.wikidata.org/wiki/Q3966","display_name":"Computer hardware","level":1,"score":0.3908420205116272},{"id":"https://openalex.org/C111919701","wikidata":"https://www.wikidata.org/wiki/Q9135","display_name":"Operating system","level":1,"score":0.18847054243087769},{"id":"https://openalex.org/C199360897","wikidata":"https://www.wikidata.org/wiki/Q9143","display_name":"Programming language","level":1,"score":0.15674921870231628},{"id":"https://openalex.org/C2777904410","wikidata":"https://www.wikidata.org/wiki/Q7397","display_name":"Software","level":2,"score":0.11448207497596741},{"id":"https://openalex.org/C76155785","wikidata":"https://www.wikidata.org/wiki/Q418","display_name":"Telecommunications","level":1,"score":0.0},{"id":"https://openalex.org/C177264268","wikidata":"https://www.wikidata.org/wiki/Q1514741","display_name":"Set (abstract data type)","level":2,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/icvd.2003.1183195","is_oa":false,"landing_page_url":"https://doi.org/10.1109/icvd.2003.1183195","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"16th International Conference on VLSI Design, 2003. Proceedings.","raw_type":"proceedings-article"}],"best_oa_location":null,"sustainable_development_goals":[{"id":"https://metadata.un.org/sdg/7","display_name":"Affordable and clean energy","score":0.8100000023841858}],"awards":[],"funders":[],"has_content":{"grobid_xml":false,"pdf":false},"content_urls":null,"referenced_works_count":15,"referenced_works":["https://openalex.org/W1559272609","https://openalex.org/W1591862370","https://openalex.org/W1851406565","https://openalex.org/W2032297914","https://openalex.org/W2086329118","https://openalex.org/W2086807722","https://openalex.org/W2105560756","https://openalex.org/W2106716308","https://openalex.org/W2117894736","https://openalex.org/W2156427650","https://openalex.org/W2160664825","https://openalex.org/W2163754777","https://openalex.org/W2532974476","https://openalex.org/W4242644858","https://openalex.org/W4246649484"],"related_works":["https://openalex.org/W2356602486","https://openalex.org/W2351992668","https://openalex.org/W2324828474","https://openalex.org/W2374315191","https://openalex.org/W2391207559","https://openalex.org/W2384715785","https://openalex.org/W2065289416","https://openalex.org/W2017236304","https://openalex.org/W2115579119","https://openalex.org/W2136854845"],"abstract_inverted_index":{"Efficient":[0],"layout":[1,45,131],"of":[2,10,78,84,121],"code":[3,41,85],"and":[4,31,42,61,71,81,86,116,123],"data":[5,43,79,87],"sections":[6],"in":[7,12,119],"various":[8],"types/levels":[9],"memory":[11,67,125],"an":[13,48],"embedded":[14,99],"system":[15],"is":[16],"very":[17],"critical":[18],"not":[19],"only":[20,109],"for":[21,27,95],"achieving":[22],"real-time":[23],"performance,":[24],"but":[25],"also":[26],"reducing":[28],"its":[29],"cost":[30],"power":[32],"consumption.":[33],"In":[34],"this":[35],"paper":[36],"we":[37],"formulate":[38],"the":[39,101],"optimal":[40,102],"section":[44],"problem":[46],"as":[47],"integer":[49],"linear":[50],"programming":[51],"(ILP)":[52],"problem.":[53],"The":[54],"proposed":[55],"formulation":[56,107],"can":[57],"handle:":[58],"(i)":[59],"on-chip":[60,66,74,124],"off-chip":[62],"memory,":[63],"(ii)":[64],"multiple":[65],"banks,":[68],"(iii)":[69],"single":[70],"dual":[72],"ported":[73],"RAMS,":[75],"(iv)":[76],"overlay":[77],"sections,":[80],"(v)":[82],"swapping":[83],"(from/to":[88],"external":[89],"memory).":[90],"Our":[91],"experiments":[92],"demonstrate":[93],"that,":[94],"a":[96,110,114,128],"moderately":[97],"complex":[98],"system,":[100],"results":[103],"produced":[104],"by":[105],"our":[106],"took":[108,133],"few":[111],"minutes":[112],"on":[113],"PC,":[115],"it":[117],"matches,":[118],"terms":[120],"performance":[122],"size,":[126],"with":[127],"hand-optimized":[129],"code/data":[130],"which":[132],"1":[134],"man-month.":[135]},"counts_by_year":[{"year":2015,"cited_by_count":1}],"updated_date":"2026-06-11T09:08:48.828518","created_date":"2025-10-10T00:00:00"}
